xref: /freebsd/sys/contrib/device-tree/Bindings/clock/nxp,lpc1850-ccu.yaml (revision 833e5d42ab135b0238e61c5b3c19b8619677cbfa)
1*833e5d42SEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*833e5d42SEmmanuel Vadot%YAML 1.2
3*833e5d42SEmmanuel Vadot---
4*833e5d42SEmmanuel Vadot$id: http://devicetree.org/schemas/clock/nxp,lpc1850-ccu.yaml#
5*833e5d42SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml#
6*833e5d42SEmmanuel Vadot
7*833e5d42SEmmanuel Vadottitle: NXP LPC1850 Clock Control Unit (CCU)
8*833e5d42SEmmanuel Vadot
9*833e5d42SEmmanuel Vadotdescription:
10*833e5d42SEmmanuel Vadot  Each CGU base clock has several clock branches which can be turned on
11*833e5d42SEmmanuel Vadot  or off independently by the Clock Control Units CCU1 or CCU2. The
12*833e5d42SEmmanuel Vadot  branch clocks are distributed between CCU1 and CCU2.
13*833e5d42SEmmanuel Vadot
14*833e5d42SEmmanuel Vadot  Above text taken from NXP LPC1850 User Manual
15*833e5d42SEmmanuel Vadot
16*833e5d42SEmmanuel Vadotmaintainers:
17*833e5d42SEmmanuel Vadot  - Frank Li <Frank.Li@nxp.com>
18*833e5d42SEmmanuel Vadot
19*833e5d42SEmmanuel Vadotproperties:
20*833e5d42SEmmanuel Vadot  compatible:
21*833e5d42SEmmanuel Vadot    const: nxp,lpc1850-ccu
22*833e5d42SEmmanuel Vadot
23*833e5d42SEmmanuel Vadot  reg:
24*833e5d42SEmmanuel Vadot    maxItems: 1
25*833e5d42SEmmanuel Vadot
26*833e5d42SEmmanuel Vadot  '#clock-cells':
27*833e5d42SEmmanuel Vadot    const: 1
28*833e5d42SEmmanuel Vadot
29*833e5d42SEmmanuel Vadot  clocks:
30*833e5d42SEmmanuel Vadot    minItems: 1
31*833e5d42SEmmanuel Vadot    maxItems: 8
32*833e5d42SEmmanuel Vadot
33*833e5d42SEmmanuel Vadot  clock-names:
34*833e5d42SEmmanuel Vadot    minItems: 1
35*833e5d42SEmmanuel Vadot    maxItems: 8
36*833e5d42SEmmanuel Vadot    items:
37*833e5d42SEmmanuel Vadot      enum:
38*833e5d42SEmmanuel Vadot        - base_usb0_clk
39*833e5d42SEmmanuel Vadot        - base_periph_clk
40*833e5d42SEmmanuel Vadot        - base_usb1_clk
41*833e5d42SEmmanuel Vadot        - base_cpu_clk
42*833e5d42SEmmanuel Vadot        - base_spifi_clk
43*833e5d42SEmmanuel Vadot        - base_spi_clk
44*833e5d42SEmmanuel Vadot        - base_apb1_clk
45*833e5d42SEmmanuel Vadot        - base_apb3_clk
46*833e5d42SEmmanuel Vadot        - base_adchs_clk
47*833e5d42SEmmanuel Vadot        - base_sdio_clk
48*833e5d42SEmmanuel Vadot        - base_ssp0_clk
49*833e5d42SEmmanuel Vadot        - base_ssp1_clk
50*833e5d42SEmmanuel Vadot        - base_uart0_clk
51*833e5d42SEmmanuel Vadot        - base_uart1_clk
52*833e5d42SEmmanuel Vadot        - base_uart2_clk
53*833e5d42SEmmanuel Vadot        - base_uart3_clk
54*833e5d42SEmmanuel Vadot        - base_audio_clk
55*833e5d42SEmmanuel Vadot    description:
56*833e5d42SEmmanuel Vadot      Which branch clocks that are available on the CCU depends on the
57*833e5d42SEmmanuel Vadot      specific LPC part. Check the user manual for your specific part.
58*833e5d42SEmmanuel Vadot
59*833e5d42SEmmanuel Vadot      A list of CCU clocks can be found in dt-bindings/clock/lpc18xx-ccu.h.
60*833e5d42SEmmanuel Vadot
61*833e5d42SEmmanuel Vadotrequired:
62*833e5d42SEmmanuel Vadot  - compatible
63*833e5d42SEmmanuel Vadot  - reg
64*833e5d42SEmmanuel Vadot  - '#clock-cells'
65*833e5d42SEmmanuel Vadot  - clocks
66*833e5d42SEmmanuel Vadot  - clock-names
67*833e5d42SEmmanuel Vadot
68*833e5d42SEmmanuel VadotadditionalProperties: false
69*833e5d42SEmmanuel Vadot
70*833e5d42SEmmanuel Vadotexamples:
71*833e5d42SEmmanuel Vadot  - |
72*833e5d42SEmmanuel Vadot    #include <dt-bindings/clock/lpc18xx-cgu.h>
73*833e5d42SEmmanuel Vadot
74*833e5d42SEmmanuel Vadot    clock-controller@40051000 {
75*833e5d42SEmmanuel Vadot        compatible = "nxp,lpc1850-ccu";
76*833e5d42SEmmanuel Vadot        reg = <0x40051000 0x1000>;
77*833e5d42SEmmanuel Vadot        #clock-cells = <1>;
78*833e5d42SEmmanuel Vadot        clocks = <&cgu BASE_APB3_CLK>, <&cgu BASE_APB1_CLK>,
79*833e5d42SEmmanuel Vadot                 <&cgu BASE_SPIFI_CLK>, <&cgu BASE_CPU_CLK>,
80*833e5d42SEmmanuel Vadot                 <&cgu BASE_PERIPH_CLK>, <&cgu BASE_USB0_CLK>,
81*833e5d42SEmmanuel Vadot                 <&cgu BASE_USB1_CLK>, <&cgu BASE_SPI_CLK>;
82*833e5d42SEmmanuel Vadot        clock-names = "base_apb3_clk",   "base_apb1_clk",
83*833e5d42SEmmanuel Vadot                      "base_spifi_clk",  "base_cpu_clk",
84*833e5d42SEmmanuel Vadot                      "base_periph_clk", "base_usb0_clk",
85*833e5d42SEmmanuel Vadot                      "base_usb1_clk",   "base_spi_clk";
86*833e5d42SEmmanuel Vadot    };
87*833e5d42SEmmanuel Vadot
88*833e5d42SEmmanuel Vadot  - |
89*833e5d42SEmmanuel Vadot    #include <dt-bindings/clock/lpc18xx-cgu.h>
90*833e5d42SEmmanuel Vadot
91*833e5d42SEmmanuel Vadot    clock-controller@40052000 {
92*833e5d42SEmmanuel Vadot        compatible = "nxp,lpc1850-ccu";
93*833e5d42SEmmanuel Vadot        reg = <0x40052000 0x1000>;
94*833e5d42SEmmanuel Vadot        #clock-cells = <1>;
95*833e5d42SEmmanuel Vadot        clocks = <&cgu BASE_AUDIO_CLK>, <&cgu BASE_UART3_CLK>,
96*833e5d42SEmmanuel Vadot                 <&cgu BASE_UART2_CLK>, <&cgu BASE_UART1_CLK>,
97*833e5d42SEmmanuel Vadot                 <&cgu BASE_UART0_CLK>, <&cgu BASE_SSP1_CLK>,
98*833e5d42SEmmanuel Vadot                 <&cgu BASE_SSP0_CLK>,  <&cgu BASE_SDIO_CLK>;
99*833e5d42SEmmanuel Vadot        clock-names = "base_audio_clk", "base_uart3_clk",
100*833e5d42SEmmanuel Vadot                      "base_uart2_clk", "base_uart1_clk",
101*833e5d42SEmmanuel Vadot                      "base_uart0_clk", "base_ssp1_clk",
102*833e5d42SEmmanuel Vadot                      "base_ssp0_clk",  "base_sdio_clk";
103*833e5d42SEmmanuel Vadot    };
104*833e5d42SEmmanuel Vadot
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