Searched +full:lpc +full:- +full:ctrl (Results 1 – 10 of 10) sorted by relevance
1 # SPDX-License-Identifier: GPL-2.0-only2 obj-$(CONFIG_ASPEED_LPC_CTRL) += aspeed-lpc-ctrl.o3 obj-$(CONFIG_ASPEED_LPC_SNOOP) += aspeed-lpc-snoop.o4 obj-$(CONFIG_ASPEED_UART_ROUTING) += aspeed-uart-routing.o5 obj-$(CONFIG_ASPEED_P2A_CTRL) += aspeed-p2a-ctrl.o6 obj-$(CONFIG_ASPEED_SOCINFO) += aspeed-socinfo.o
1 /* SPDX-License-Identifier: GPL-2.0-only */47 * LPC Module67 u32 ctrl; /* SCLPC Control Register */ member75 u32 data_word; /* LPC RX/TX FIFO Data Word Register */76 u32 fifo_status; /* LPC RX/TX FIFO Status Register */77 u32 fifo_ctrl; /* LPC RX/TX FIFO Control Register */78 u32 fifo_alarm; /* LPC RX/TX FIFO Alarm Register */
1 // SPDX-License-Identifier: GPL-2.0-or-later3 * it87.c - Part of lm_sensors, Linux kernel modules for hardware6 * The IT8705F is an LPC-based Super I/O part that contains UARTs, a14 * Supports: IT8603E Super I/O chip w/LPC interface15 * IT8620E Super I/O chip w/LPC interface16 * IT8622E Super I/O chip w/LPC interface17 * IT8623E Super I/O chip w/LPC interface18 * IT8628E Super I/O chip w/LPC interface19 * IT8689E Super I/O chip w/LPC interface20 * IT8705F Super I/O chip w/LPC interface[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later5 * Copyright 2007-2008 Freescale Semiconductor Inc.8 #include <dt-bindings/clock/mpc512x-clock.h>10 /dts-v1/;15 #address-cells = <1>;16 #size-cells = <1>;17 interrupt-parent = <&ipic>;25 #address-cells = <1>;26 #size-cells = <0>;31 d-cache-line-size = <0x20>; /* 32 bytes */[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later11 * - Read: Auto Decode12 * - Write: Auto Encode13 * - Tested Page Sizes: 2048, 409632 #include <linux/dma-mapping.h>134 if (section >= nand_chip->ecc.steps) in lpc32xx_ooblayout_ecc()135 return -ERANGE; in lpc32xx_ooblayout_ecc()137 oobregion->offset = ((section + 1) * 16) - nand_chip->ecc.bytes; in lpc32xx_ooblayout_ecc()138 oobregion->length = nand_chip->ecc.bytes; in lpc32xx_ooblayout_ecc()148 if (section >= nand_chip->ecc.steps) in lpc32xx_ooblayout_free()[all …]
1 // SPDX-License-Identifier: GPL-2.0-only8 #include <dt-bindings/interrupt-controller/arm-gic.h>11 compatible = "hisilicon,hip06-d03";12 interrupt-parent = <&gic>;13 #address-cells = <2>;14 #size-cells = <2>;17 compatible = "arm,psci-0.2";22 #address-cells = <1>;23 #size-cells = <0>;25 cpu-map {[all …]
1 // SPDX-License-Identifier: GPL-2.0-only8 #include <dt-bindings/interrupt-controller/arm-gic.h>11 compatible = "hisilicon,hip07-d05";12 interrupt-parent = <&gic>;13 #address-cells = <2>;14 #size-cells = <2>;17 compatible = "arm,psci-0.2";22 #address-cells = <1>;23 #size-cells = <0>;25 cpu-map {[all …]
1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */4 * Name: actbl.h - Basic ACPI Table Definitions6 * Copyright (C) 2000 - 2025, Intel Corp.18 * by ACPICA. All other tables are consumed by the OS-dependent ACPI-related44 * All tables and structures must be byte-packed to match the ACPI54 * essentially useless for dealing with packed data in on-disk formats or82 * GAS - Generic Address Structure (ACPI 2.0+)86 * 64-bit Address field must be performed with care.95 u64 address; /* 64-bit address of struct or register */100 * RSDP - Root System Description Pointer (Signature is "RSD PTR ")[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later12 * non-PC systems, and incorporated into ACPI. Modern PC chipsets15 * are also clones that connect using the LPC bus.47 /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */113 /*----------------------------------------------------------------*/180 /*----------------------------------------------------------------*/217 /*----------------------------------------------------------------*/221 return !is_valid_irq(cmos->irq) && !cmos_use_acpi_alarm(); in cmos_no_alarm()233 return -EIO; in cmos_read_time()264 struct rtc_time *time = p->time; in cmos_read_alarm_callback()[all …]
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