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Searched +full:lgm +full:- +full:emmc +full:- +full:phy (Results 1 – 7 of 7) sorted by relevance

/linux/Documentation/devicetree/bindings/phy/
H A Dintel,lgm-emmc-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/intel,lgm-emmc-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Intel Lightning Mountain(LGM) eMMC PHY
10 - Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
13 Bindings for eMMC PHY on Intel's Lightning Mountain SoC, syscon
14 node is used to reference the base address of eMMC phy registers.
16 The eMMC PHY node should be the child of a syscon node with the
19 - compatible: Should be one of the following:
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/linux/Documentation/devicetree/bindings/soc/intel/
H A Dintel,lgm-syscon.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/soc/intel/intel,lgm-syscon.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Intel Lightning Mountain(LGM) Syscon
10 - Chuanhua Lei <lchuanhua@maxlinear.com>
11 - Rahul Tanwar <rtanwar@maxlinear.com>
16 - const: intel,lgm-syscon
17 - const: syscon
24 "#address-cells":
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/linux/Documentation/devicetree/bindings/mmc/
H A Darasan,sdhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Adrian Hunter <adrian.hunter@intel.com>
13 - $ref: mmc-controller.yaml#
14 - if:
18 const: arasan,sdhci-5.1
21 - phys
22 - phy-names
23 - if:
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/linux/drivers/phy/intel/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_PHY_INTEL_KEEMBAY_EMMC) += phy-intel-keembay-emmc.o
3 obj-$(CONFIG_PHY_INTEL_KEEMBAY_USB) += phy-intel-keembay-usb.o
4 obj-$(CONFIG_PHY_INTEL_LGM_COMBO) += phy-intel-lgm-combo.o
5 obj-$(CONFIG_PHY_INTEL_LGM_EMMC) += phy-intel-lgm-emmc.o
H A Dphy-intel-lgm-emmc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Intel eMMC PHY driver
14 #include <linux/phy/phy.h>
18 /* eMMC phy register definitions */
51 static int intel_emmc_phy_power(struct phy *phy, bool on_off) in intel_emmc_phy_power() argument
53 struct intel_emmc_phy *priv = phy_get_drvdata(phy); in intel_emmc_phy_power()
64 ret = regmap_update_bits(priv->syscfg, EMMC_PHYCTRL1_REG, PDB_MASK, in intel_emmc_phy_power()
67 dev_err(&phy->dev, "CALIO power down bar failed: %d\n", ret); in intel_emmc_phy_power()
75 rate = clk_get_rate(priv->emmcclk); in intel_emmc_phy_power()
78 dev_warn(&phy->dev, "Unsupported rate: %lu\n", rate); in intel_emmc_phy_power()
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/linux/drivers/mmc/host/
H A Dsdhci-of-arasan.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright (C) 2011 - 2012 Michal Simek <monstr@monstr.eu>
9 * Based on sdhci-of-esdhc.c
18 #include <linux/clk-provider.h>
23 #include <linux/phy/phy.h>
26 #include <linux/firmware/xlnx-zynqmp.h>
29 #include "sdhci-cqhci.h"
30 #include "sdhci-pltfm.h"
92 * On some SoCs the syscon area has a feature where the upper 16-bits of
93 * each 32-bit register act as a write mask for the lower 16-bits. This allows
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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