| /linux/Documentation/driver-api/media/drivers/ |
| H A D | pvrusb2.rst | 1 .. SPDX-License-Identifier: GPL-2.0
9 ----------
13 Its history started with the reverse-engineering effort by Björn
29 1. Low level wire-protocol implementation with the device.
34 3. High level hardware driver implementation which coordinates all
38 tear-down, arbitration, and interaction with high level
42 5. High level interfaces which glue the driver to various published
54 right now the V4L high level interface is the most complete, the
55 sysfs high level interface will work equally well for similar
57 possible to produce a DVB high level interface that can sit right
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| /linux/Documentation/userspace-api/media/dvb/ |
| H A D | ca_high_level.rst | 1 .. SPDX-License-Identifier: GPL-2.0
3 The High level CI API
10 This document describes the high level CI API as in accordance to the
14 With the High Level CI approach any new card with almost any random
33 .. code-block:: c
39 #define CA_CI 1 /* CI high level interface */
40 #define CA_CI_LINK 2 /* CI link layer level interface */
41 #define CA_CI_PHYS 4 /* CI physical layer level interface */
42 #define CA_DESCR 8 /* built-in descrambler */
50 This CI interface follows the CI high level interface, which is not
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| /linux/security/selinux/ss/ |
| H A D | constraint.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
6 * beyond the type-based rules in `te' or the role-based
37 #define CEXPR_L1L2 32 /* low level 1 vs. low level 2 */
38 #define CEXPR_L1H2 64 /* low level 1 vs. high level 2 */
39 #define CEXPR_H1L2 128 /* high level 1 vs. low level 2 */
40 #define CEXPR_H1H2 256 /* high level 1 vs. high level 2 */
41 #define CEXPR_L1H1 512 /* low level 1 vs. high level 1 */
42 #define CEXPR_L2H2 1024 /* low level 2 vs. high level 2 */
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| /linux/Documentation/admin-guide/pm/ |
| H A D | intel-speed-select.rst | 1 .. SPDX-License-Identifier: GPL-2.0
14 - https://www.intel.com/content/www/us/en/architecture-and-technology/speed-select-technology-artic…
15 - https://builders.intel.com/docs/networkbuilders/intel-speed-select-technology-base-frequency-enha…
19 dynamically without pre-configuring via BIOS setup options. This dynamic
29 intel-speed-select configuration tool
32 Most Linux distribution packages may include the "intel-speed-select" tool. If not,
38 # cd tools/power/x86/intel-speed-select/
43 ------------
47 # intel-speed-select --help
49 The top-level help describes arguments and features. Notice that there is a
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| H A D | intel_uncore_frequency_scaling.rst | 1 .. SPDX-License-Identifier: GPL-2.0
8 :Copyright: |copy| 2022-2023 Intel Corporation
13 ------------
30 ---------------
45 This is a read-only attribute. If users adjust max_freq_khz,
50 This is a read-only attribute. If users adjust min_freq_khz,
63 -----------------------------------------------------------------
72 The current sysfs interface supports controls at package and die level.
74 fabric cluster level.
80 To represent controls at fabric cluster level in addition to the
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| /linux/include/media/ |
| H A D | cec-pin.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * cec-pin.h - low-level CEC pin control
15 * struct cec_pin_ops - low-level CEC pin operations
16 * @read: read the CEC pin. Returns > 0 if high, 0 if low, or an error
19 * @high: stop driving the CEC pin. The pull-up will drive the pin
20 * high, unless someone else is driving the pin low.
26 * @read_hpd: optional. Read the HPD pin. Returns > 0 if high, 0 if low or
28 * @read_5v: optional. Read the 5V pin. Returns > 0 if high, 0 if low or
30 * @received: optional. High-level CEC message callback. Allows the driver
39 void (*high)(struct cec_adapter *adap); member
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| /linux/Documentation/core-api/ |
| H A D | genericirq.rst | 7 :Copyright: |copy| 2005-2010: Thomas Gleixner
8 :Copyright: |copy| 2005-2006: Ingo Molnar
29 __do_IRQ() super-handler, which is able to deal with every type of
36 - Level type
38 - Edge type
40 - Simple type
44 - Fast EOI type
46 In the SMP world of the __do_IRQ() super-handler another type was
49 - Per CPU type
51 This split implementation of high-level IRQ handlers allows us to
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| /linux/drivers/iio/adc/ |
| H A D | envelope-detector.c | 1 // SPDX-License-Identifier: GPL-2.0
11 * The DAC is used to find the peak level of an alternating voltage input
16 * input +------>-------|+ \
18 * .-------. | }---.
20 * | dac|-->--|- / |
24 * | irq|------<-------'
26 * '-------'
62 int high; member
63 int level; member
72 * (one-bit memory) for if the interrupt has triggered since last calling
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| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-bus-counter | 3 Contact: linux-iio@vger.kernel.org
11 Contact: linux-iio@vger.kernel.org
16 MTCLKA-MTCLKB:
20 MTCLKC-MTCLKD:
26 Contact: linux-iio@vger.kernel.org
33 Contact: linux-iio@vger.kernel.org
39 Contact: linux-iio@vger.kernel.org
45 Contact: linux-iio@vger.kernel.org
52 Contact: linux-iio@vger.kernel.org
59 Contact: linux-iio@vger.kernel.org
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| /linux/Documentation/driver-api/gpio/ |
| H A D | intro.rst | 17 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
25 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
26 non-dedicated pin can be configured as a GPIO; and most chips have at least
31 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
36 - Output values are writable (high=1, low=0). Some chips also have
38 value might be driven, supporting "wire-OR" and similar schemes for the
41 - Input values are likewise readable (1, 0). Some chips support readback
42 of pins configured as "output", which is very useful in such "wire-OR"
44 input de-glitch/debounce logic, sometimes with software controls.
46 - Inputs can often be used as IRQ signals, often edge triggered but
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| /linux/drivers/soc/fsl/qbman/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
26 Compiles in additional checks, to sanity-check the drivers and
30 tristate "BMan self-tests"
32 Compile the BMan self-test code. These tests will
37 bool "High-level API self-test"
41 This requires the presence of cpu-affine portals, and performs
42 high-level API testing with them (whichever portal(s) are affine
46 tristate "QMan self-tests"
48 Compile self-test code for QMan.
51 bool "QMan high-level self-test"
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| /linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | snps,archs-idu-intc.txt | 1 * ARC-HS Interrupt Distribution Unit
3 This optional 2nd level interrupt controller can be used in SMP configurations
9 - compatible: "snps,archs-idu-intc"
10 - interrupt-controller: This is an interrupt controller.
11 - #interrupt-cells: Must be <1> or <2>.
18 - bits[3:0] trigger type and level flags
19 1 = low-to-high edge triggered
20 2 = NOT SUPPORTED (high-to-low edge triggered)
21 4 = active high level-sensitive <<< DEFAULT
22 8 = NOT SUPPORTED (active low level-sensitive)
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| H A D | img,pdc-intc.txt | 10 - compatible: Specifies the compatibility list for the interrupt controller.
11 The type shall be <string> and the value shall include "img,pdc-intc".
13 - reg: Specifies the base PDC physical address(s) and size(s) of the
14 addressable register space. The type shall be <prop-encoded-array>.
16 - interrupt-controller: The presence of this property identifies the node
19 - #interrupt-cells: Specifies the number of cells needed to encode an
22 - num-perips: Number of waking peripherals.
24 - num-syswakes: Number of SysWake inputs.
26 - interrupts: List of interrupt specifiers. The first specifier shall be the
34 - <1st-cell>: The interrupt-number that identifies the interrupt source.
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| H A D | open-pic.txt | 13 - compatible: Specifies the compatibility list for the PIC. The type
14 shall be <string> and the value shall include "open-pic".
16 - reg: Specifies the base physical address(s) and size(s) of this
17 PIC's addressable register space. The type shall be <prop-encoded-array>.
19 - interrupt-controller: The presence of this property identifies the node
22 - #interrupt-cells: Specifies the number of cells needed to encode an
25 - #address-cells: Specifies the number of cells needed to encode an
27 'interrupt-map' nodes do not have to specify a parent unit address.
31 - pic-no-reset: The presence of this property indicates that the PIC
42 - <1st-cell>: The interrupt-number that identifies the interrupt source.
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| /linux/fs/xfs/libxfs/ |
| H A D | xfs_btree.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2000-2002,2005 Silicon Graphics, Inc.
43 __be32 magic = ops->buf_ops->magic[idx]; in xfs_btree_magic()
45 /* Ensure we asked for crc for crc-only magics. */ in xfs_btree_magic()
57 * on x86-64. Yes, gcc-11 fails to inline them, and explicit inlining of these
122 int level, in __xfs_btree_check_lblock_hdr() argument
125 struct xfs_mount *mp = cur->bc_mp; in __xfs_btree_check_lblock_hdr()
128 if (!uuid_equal(&block->bb_u.l.bb_uuid, &mp->m_sb.sb_meta_uuid)) in __xfs_btree_check_lblock_hdr()
130 if (block->bb_u.l.bb_blkno != in __xfs_btree_check_lblock_hdr()
133 if (block->bb_u.l.bb_pad != cpu_to_be32(0)) in __xfs_btree_check_lblock_hdr()
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| /linux/Documentation/devicetree/bindings/watchdog/ |
| H A D | linux,wdt-gpio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/linux,wdt-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: GPIO-controlled Watchdog
10 - Guenter Roeck <linux@roeck-us.net>
11 - Robert Marko <robert.marko@sartura.hr>
15 const: linux,wdt-gpio
24 - description:
25 Either a high-to-low or a low-to-high transition clears the WDT counter.
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| /linux/Documentation/userspace-api/media/v4l/ |
| H A D | ext-ctrls-codec.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _codec-controls:
24 .. _mpeg-control-id:
27 -----------------
35 .. _v4l2-mpeg-stream-type:
40 enum v4l2_mpeg_stream_type -
41 The MPEG-1, -2 or -4 output stream type. One cannot assume anything
48 .. flat-table::
49 :header-rows: 0
50 :stub-columns: 0
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| /linux/drivers/net/wireless/ath/ath5k/ |
| H A D | ani.c | 33 * - "noise immunity"
35 * - "spur immunity"
37 * - "firstep level"
39 * - "OFDM weak signal detection"
41 * - "CCK weak signal detection"
61 * ath5k_ani_set_noise_immunity_level() - Set noise immunity level
63 * @level: level between 0 and @ATH5K_ANI_MAX_NOISE_IMM_LVL
66 ath5k_ani_set_noise_immunity_level(struct ath5k_hw *ah, int level) in ath5k_ani_set_noise_immunity_level() argument
75 static const s8 lo[] = { -52, -56, -60, -64, -70 }; in ath5k_ani_set_noise_immunity_level()
76 static const s8 hi[] = { -18, -18, -16, -14, -12 }; in ath5k_ani_set_noise_immunity_level()
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| /linux/Documentation/driver-api/media/ |
| H A D | cec-core.rst | 1 .. SPDX-License-Identifier: GPL-2.0
15 ----------------
33 ---------------------
53 will be stored in adap->priv and can be used by the adapter ops.
95 Implementing the Low-Level CEC Adapter
96 --------------------------------------
98 The following low-level adapter operations have to be implemented in
103 .. code-block:: none
107 /* Low-level callbacks */
123 /* High-level callback */
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| /linux/Documentation/devicetree/bindings/regulator/ |
| H A D | richtek,rtmv20-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/richtek,rtmv20-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - ChiYuan Huang <cy_huang@richtek.com>
27 wakeup-source: true
32 enable-gpios:
36 richtek,ld-pulse-delay-us:
38 load current pulse delay in microsecond after strobe pin pulse high.
43 richtek,ld-pulse-width-us:
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| /linux/Documentation/devicetree/bindings/gpio/ |
| H A D | nvidia,tegra20-gpio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/nvidia,tegra20-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra GPIO Controller (Tegra20 - Tegra210)
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - enum:
17 - nvidia,tegra20-gpio
18 - nvidia,tegra30-gpio
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| /linux/Documentation/virt/ |
| H A D | paravirt_ops.rst | 1 .. SPDX-License-Identifier: GPL-2.0
13 including native machine -- without any hypervisors.
16 corresponding to low-level critical instructions and high-level
18 time by enabling binary patching of the low-level critical operations
23 - simple indirect call
24 These operations correspond to high-level functionality where it is
27 - indirect call which allows optimization with binary patch
28 Usually these operations correspond to low-level critical instructions. They
32 - a set of macros for hand written assembly code
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| /linux/Documentation/devicetree/bindings/phy/ |
| H A D | realtek,usb2phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Stanley Chang <stanley_chang@realtek.com>
23 XHCI controller#0 -- usb2phy -- phy#0
24 |- usb3phy -- phy#0
25 XHCI controller#1 -- usb2phy -- phy#0
26 XHCI controller#2 -- usb2phy -- phy#0
27 |- usb3phy -- phy#0
33 XHCI controller#0 -- usb2phy -- phy#0
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| /linux/fs/xfs/scrub/ |
| H A D | btree.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2017-2023 Oracle. All Rights Reserved.
29 int level, in __xchk_btree_process_error() argument
38 case -EDEADLOCK: in __xchk_btree_process_error()
39 case -ECHRNG: in __xchk_btree_process_error()
41 trace_xchk_deadlock_retry(sc->ip, sc->sm, *error); in __xchk_btree_process_error()
43 case -EFSBADCRC: in __xchk_btree_process_error()
44 case -EFSCORRUPTED: in __xchk_btree_process_error()
46 sc->sm->sm_flags |= errflag; in __xchk_btree_process_error()
50 if (cur->bc_ops->type == XFS_BTREE_TYPE_INODE) in __xchk_btree_process_error()
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| /linux/drivers/media/rc/ |
| H A D | ite-cir.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
9 #define ITE_DRIVER_NAME "ite-cir"
34 /* hw-specific operation function pointers; most of these must be
92 /* tx high carrier frequency, in Hz, 0 means no demodulation */
98 /* duty cycle, 0-100 */
114 /* low-speed carrier frequency limits (Hz) */
118 /* high-speed carrier frequency limits (Hz) */
130 * n in RDCR produces a tolerance of +/- n * 6.25% around the center
133 * From two limit frequencies, L (low) and H (high), we can get both the
135 * frequency A = (H - L) / (H + L). We can use this in order to honor the
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