| /freebsd/contrib/ncurses/man/ |
| H A D | curs_getch.3x | 3 .\" Copyright 2018-2023,2024 Thomas E. Dickey *
4 .\" Copyright 1998-2016,2017 Free Software Foundation, Inc. *
32 .TH curs_getch 3X 2024-04-20 "ncurses @NCURSES_MAJOR@.@NCURSES_MINOR@" "Library calls"
59 \fB\%has_key\fP \-
97 then if the no-delay flag is set in the window
158 (those corresponding to the ECMA-6 character set\(emsee
187 these object-like macros have values outside the range of eight-bit
192 .I "user-defined function keys"
195 but are also expected to have values outside the range of eight-bit
202 Most terminals one encounters follow the ECMA-48 standard insofar as
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| H A D | user_caps.5 | 3 .\" Copyright 2018-2023,2024 Thomas E. Dickey *
32 .TH user_caps 5 2024-03-16 "ncurses @NCURSES_MAJOR@.@NCURSES_MINOR@" "File formats"
49 user_caps \-
50 user-defined \fIterminfo\fR capability format
52 .B @INFOCMP@ \-x
54 .B @TIC@ \-x
76 and reverse-engineering the compiled terminfo files to match the binary format.
79 copy the SVr2 binary format, which uses 16-bit signed integers,
80 and is limited to 4096-byte entries.
97 databases for AIX, HP-UX or OSF/1,
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| /freebsd/share/termcap/ |
| H A D | termcap.5 | 31 .\" * ncurses is copyright (C) 1992-1995 *
32 .\" * Zeyd M. Ben-Halim *
77 consist of a number of `:'-separated fields.
98 in 132-column mode would be
99 .Dq vt100-w .
101 .Bl -column indent "With automatic margins (usually default)xx" -offset indent
103 -w Wide mode (more than 80 columns) vt100-w
104 -am With automatic margins (usually default) vt100-am
105 -nam Without automatic margins vt100-nam
106 .Pf \- Ar n Ta No "Number of lines on screen aaa-60"
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| /freebsd/contrib/ncurses/include/ |
| H A D | Caps.uwin | 2 # Copyright 2019-2023,2024 Thomas E. Dickey #
3 # Copyright 2001-2015,2016 Free Software Foundation, Inc. #
43 # This file has three major sections; a standard-capabilities table, two
44 # extension-capability tables, and a section of aliases declarations.
53 # Column 5: KEY_xxx name, if any, `-' otherwise
54 # Column 6: value for KEY_xxx name, if any, `-' otherwise
56 # translations, `-' otherwise
59 # The codes following [Y-] in column 7 describe the versions of termcap which
63 # lot of old termcap-using programs). The codes read as follows:
95 # as an already-supported one. The compiler will handle aliasing, emitting
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| H A D | Caps.keys | 2 # Copyright 2019-2023,2024 Thomas E. Dickey #
3 # Copyright 2001-2015,2016 Free Software Foundation, Inc. #
36 # is illustrates an experimental extension to describe alt-, shift- and
37 # control-modifiers applied to function and normal keys, as done on IBM pc's.
45 # This file has three major sections; a standard-capabilities table, two
46 # extension-capability tables, and a section of aliases declarations.
55 # Column 5: KEY_xxx name, if any, `-' otherwise
56 # Column 6: value for KEY_xxx name, if any, `-' otherwise
58 # translations, `-' otherwise
61 # The codes following [Y-] in column 7 describe the versions of termcap which
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| H A D | Caps.osf1r5 | 2 # Copyright 2019-2023,2024 Thomas E. Dickey #
3 # Copyright 2002-2015,2016 Free Software Foundation, Inc. #
43 # This file has three major sections; a standard-capabilities table, two
44 # extension-capability tables, and a section of aliases declarations.
53 # Column 5: KEY_xxx name, if any, `-' otherwise
54 # Column 6: value for KEY_xxx name, if any, `-' otherwise
56 # translations, `-' otherwise
59 # The codes following [Y-] in column 7 describe the versions of termcap which
63 # lot of old termcap-using programs). The codes read as follows:
95 # as an already-supported one. The compiler will handle aliasing, emitting
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| H A D | Caps.hpux11 | 2 # Copyright 2019-2023,2024 Thomas E. Dickey #
3 # Copyright 2002-2015,2016 Free Software Foundation, Inc. #
43 # This file has three major sections; a standard-capabilities table, two
44 # extension-capability tables, and a section of aliases declarations.
53 # Column 5: KEY_xxx name, if any, `-' otherwise
54 # Column 6: value for KEY_xxx name, if any, `-' otherwise
56 # translations, `-' otherwise
59 # The codes following [Y-] in column 7 describe the versions of termcap which
63 # lot of old termcap-using programs). The codes read as follows:
95 # as an already-supported one. The compiler will handle aliasing, emitting
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| H A D | Caps | 2 # Copyright 2019-2023,2024 Thomas E. Dickey #
3 # Copyright 1998-2015,2016 Free Software Foundation, Inc. #
30 # Author: Zeyd M. Ben-Halim <zmbenhal@netcom.com> 1992,1995
43 # This file has three major sections; a standard-capabilities table, two
44 # extension-capability tables, and a section of aliases declarations.
53 # Column 5: KEY_xxx name, if any, `-' otherwise
54 # Column 6: value for KEY_xxx name, if any, `-' otherwise
56 # translations, `-' otherwise
59 # The codes following [Y-] in column 7 describe the versions of termcap which
63 # lot of old termcap-using programs). The codes read as follows:
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| H A D | Caps.aix4 | 2 # Copyright 2019-2023,2024 Thomas E. Dickey #
3 # Copyright 2001-2015,2016 Free Software Foundation, Inc. #
43 # This file has three major sections; a standard-capabilities table, two
44 # extension-capability tables, and a section of aliases declarations.
53 # Column 5: KEY_xxx name, if any, `-' otherwise
54 # Column 6: value for KEY_xxx name, if any, `-' otherwise
56 # translations, `-' otherwise
59 # The codes following [Y-] in column 7 describe the versions of termcap which
63 # lot of old termcap-using programs). The codes read as follows:
95 # as an already-supported one. The compiler will handle aliasing, emitting
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| /freebsd/contrib/arm-optimized-routines/math/aarch64/advsimd/ |
| H A D | expm1f.c | 2 * Single-precision vector exp(x) - 1 function.
4 * Copyright (c) 2022-2024, Arm Limited.
5 * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
25 underflow bound is greater than this, so it catches both cases - there is
29 /* asuint(oflow_bound) - asuint(0x1p-23), shifted left by 1 for absolute
35 /* asuint(0x1p-23), shifted by 1 for abs compare. */
42 expm1f, x, expm1f_inline (v_zerofy_f32 (x, special), &d->d), special); in special_case()
45 /* Single-precision vector exp(x) - 1 function.
47 _ZGVnN4v_expm1f(0x1.85f83p-2) got 0x1.da9f4p-2
48 want 0x1.da9f44p-2. */
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| H A D | expm1.c | 2 * Double-precision vector exp(x) - 1 function.
4 * Copyright (c) 2022-2024, Arm Limited.
5 * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
24 /* asuint64(oflow_bound) - asuint64(0x1p-51), shifted left by 1 for abs
27 /* asuint64(0x1p-51) << 1. */
31 underflow bound is greater than this, so it catches both cases - there is
40 return v_call_f64 (expm1, x, expm1_inline (v_zerofy_f64 (x, special), &d->d), in special_case()
44 /* Double-precision vector exp(x) - 1 function.
46 _ZGVnN2v_expm1(0x1.6329669eb8c87p-2) got 0x1.a8897eef87b34p-2
47 want 0x1.a8897eef87b32p-2. */
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| /freebsd/contrib/llvm-project/compiler-rt/lib/builtins/hexagon/ |
| H A D | udivdi3.S | 1 //===----------------------Hexagon builtin routine ------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
19 .size \name, . - \name
31 r10 = sub(r7,r6) // left shift count for bit & divisor
38 r15:14 = lsl(r15:14,r10) // shift the bit left by same amount as divisor
50 p0 = cmp.gtu(r13:12,r3:2) // set predicate reg if shifted divisor > current remainder
53 r7:6 = sub(r3:2, r13:12) // subtract shifted divisor from current remainder
62 r13:12 = lsr(r13:12, #1) // shift "shifted divisor" right by 1 for next iteration
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| H A D | udivmoddi4.S | 1 //===----------------------Hexagon builtin routine ------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
19 .size \name, . - \name
31 r10 = sub(r7,r6) // left shift count for bit & divisor
38 r15:14 = lsl(r15:14,r10) // shift the bit left by same amount as divisor
50 p0 = cmp.gtu(r13:12,r3:2) // set predicate reg if shifted divisor > current remainder
53 r7:6 = sub(r3:2, r13:12) // subtract shifted divisor from current remainder
62 r13:12 = lsr(r13:12, #1) // shift "shifted divisor" right by 1 for next iteration
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| H A D | umoddi3.S | 1 //===----------------------Hexagon builtin routine ------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
19 .size \name, . - \name
31 r10 = sub(r7,r6) // left shift count for bit & divisor
38 r15:14 = lsl(r15:14,r10) // shift the bit left by same amount as divisor
50 p0 = cmp.gtu(r13:12,r3:2) // set predicate reg if shifted divisor > current remainder
53 r7:6 = sub(r3:2, r13:12) // subtract shifted divisor from current remainder
62 r13:12 = lsr(r13:12, #1) // shift "shifted divisor" right by 1 for next iteration
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| H A D | divdi3.S | 1 //===----------------------Hexagon builtin routine ------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
18 .size \name, . - \name
39 r10 = sub(r7,r6) // left shift count for bit & divisor
46 r15:14 = lsl(r15:14,r10) // shift the bit left by same amount as divisor
58 p0 = cmp.gtu(r13:12,r3:2) // set predicate reg if shifted divisor > current remainder
61 r7:6 = sub(r3:2, r13:12) // subtract shifted divisor from current remainder
70 r13:12 = lsr(r13:12, #1) // shift "shifted divisor" right by 1 for next iteration
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| H A D | moddi3.S | 1 //===----------------------Hexagon builtin routine ------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
18 .size \name, . - \name
37 r10 = sub(r7,r6) // left shift count for bit & divisor
44 r15:14 = lsl(r15:14,r10) // shift the bit left by same amount as divisor
56 p0 = cmp.gtu(r13:12,r3:2) // set predicate reg if shifted divisor > current remainder
59 r7:6 = sub(r3:2, r13:12) // subtract shifted divisor from current remainder
68 r13:12 = lsr(r13:12, #1) // shift "shifted divisor" right by 1 for next iteration
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| /freebsd/contrib/nvi/ex/ |
| H A D | ex_shift.c | 1 /*-
24 enum which {RETAB, LEFT, RIGHT}; enumerator
28 * ex_shiftl -- :<[<...]
36 return (shift(sp, cmdp, LEFT)); in ex_shiftl()
40 * ex_shiftr -- :>[>...]
51 * ex_retab -- Expand tabs (if enabled)
63 * shift --
82 /* Copy the lines being shifted into the unnamed buffer. */ in shift()
83 if (cut(sp, NULL, &cmdp->addr1, &cmdp->addr2, CUT_LINEMODE)) in shift()
90 * cmdp->argv[0] points to the string of '>' or '<' characters. in shift()
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| /freebsd/sys/contrib/device-tree/Bindings/i3c/ |
| H A D | i3c.txt | 8 -------------------
10 - #address-cells - should be <3>. Read more about addresses below.
11 - #size-cells - should be <0>.
12 - compatible - name of the I3C master controller driving the I3C bus
16 The node describing an I3C bus should be named i3c-master.
19 -------------------
24 - i3c-scl-hz: frequency of the SCL signal used for I3C transfers.
27 - i2c-scl-hz: frequency of the SCL signal used for I2C transfers.
40 --------------------------------------
41 - reg: contains 3 cells
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| H A D | i3c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
11 - Miquel Raynal <miquel.raynal@bootlin.com>
20 pattern: "^i3c@[0-9a-f]+$"
22 "#address-cells":
39 "#size-cells":
42 i3c-scl-hz:
49 i2c-scl-hz:
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| /freebsd/stand/efi/include/amd64/ |
| H A D | pe.h | 51 UINT16 ne_cbnrestab; // Size of non-resident name table
57 UINT32 ne_nrestab; // Offset of Non-resident Names Table
98 #define IMAGE_FILE_MACHINE_R3000 0x162 // MIPS little-endian, 0540 big-endian
99 #define IMAGE_FILE_MACHINE_R4000 0x166 // MIPS little-endian
101 #define IMAGE_FILE_MACHINE_POWERPC 0x1F0 // IBM PowerPC Little-Endian
198 ((PIMAGE_NT_HEADERS)(ntheader))->FileHeader.SizeOfOptionalHeader \
292 #define IMAGE_SYM_ABSOLUTE (UINT16)-1 // Symbol is an absolute value.
293 #define IMAGE_SYM_DEBUG (UINT16)-2 // Symbol is a special debug item.
329 #define IMAGE_SYM_CLASS_END_OF_FUNCTION (BYTE )-1
400 #define IMAGE_REL_I386_DIR16 01 // Direct 16-bit reference to the symbols …
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| /freebsd/stand/efi/include/i386/ |
| H A D | pe.h | 51 UINT16 ne_cbnrestab; // Size of non-resident name table
57 UINT32 ne_nrestab; // Offset of Non-resident Names Table
98 #define IMAGE_FILE_MACHINE_R3000 0x162 // MIPS little-endian, 0540 big-endian
99 #define IMAGE_FILE_MACHINE_R4000 0x166 // MIPS little-endian
101 #define IMAGE_FILE_MACHINE_POWERPC 0x1F0 // IBM PowerPC Little-Endian
198 ((PIMAGE_NT_HEADERS)(ntheader))->FileHeader.SizeOfOptionalHeader \
292 #define IMAGE_SYM_ABSOLUTE (UINT16)-1 // Symbol is an absolute value.
293 #define IMAGE_SYM_DEBUG (UINT16)-2 // Symbol is a special debug item.
329 #define IMAGE_SYM_CLASS_END_OF_FUNCTION (BYTE )-1
400 #define IMAGE_REL_I386_DIR16 01 // Direct 16-bit reference to the symbols …
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| /freebsd/contrib/llvm-project/clang/lib/Headers/ |
| H A D | mmintrin.h | 1 /*===---- mmintrin.h - MMX intrinsics --------------------------------------===
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
26 __attribute__((__always_inline__, __nodebug__, __target__("mmx,no-evex512"), \
37 __target__("mmx,no-evex512")))
42 /// Constructs a 64-bit integer vector, setting the lower 32 bits to the
43 /// value of the 32-bit integer parameter and setting the upper 32 bits to 0.
50 /// A 32-bit integer value.
51 /// \returns A 64-bit integer vector. The lower 32 bits contain the value of the
59 /// Returns the lower 32 bits of a 64-bit integer vector as a 32-bit
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/MCTargetDesc/ |
| H A D | AVRAsmBackend.cpp | 1 //===-- AVRAsmBackend.cpp - AVR Asm Backend ------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
51 Ctx->reportError(Fixup.getLoc(), Diagnostic); in signed_width()
70 Ctx->reportError(Fixup.getLoc(), Diagnostic); in unsigned_width()
92 Value -= 2; in adjustRelativeBranch()
102 /// 22-bit absolute fixup.
107 /// Offset of 0 (so the result is left shifted by 3 bits before application).
119 /// 7-bit PC-relative fixup.
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonOptimizeSZextends.cpp | 1 //===- HexagonOptimizeSZextends.cpp - Remove unnecessary argument extends -===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
80 SExtInst* SI = new SExtInst(&Arg, Use->getType()); in runOnFunction()
81 assert (EVT::getEVT(SI->getType()) == in runOnFunction()
82 (EVT::getEVT(Use->getType()))); in runOnFunction()
83 Use->replaceAllUsesWith(SI); in runOnFunction()
85 SI->insertBefore(First); in runOnFunction()
86 Use->eraseFromParent(); in runOnFunction()
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| /freebsd/sys/contrib/openzfs/module/icp/asm-x86_64/modes/ |
| H A D | gcm_pclmulqdq.S | 1 // SPDX-License-Identifier: CDDL-1.0
10 * or https://opensource.org/licenses/CDDL-1.0.
33 * Accelerated GHASH implementation with Intel PCLMULQDQ-NI
37 * PCLMULQDQ is used to accelerate the most time-consuming part of GHASH,
38 * carry-less multiplication. More information about PCLMULQDQ can be
40 * http://software.intel.com/en-us/articles/
41 * carry-less-multiplication-and-its-usage-for-computing-the-gcm-mode/
70 * 5. Added code to byte swap 16-byte input and output.
100 * Use this mask to byte-swap a 16-byte integer with the pshufb instruction
114 * Perform a carry-less multiplication (that is, use XOR instead of the
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