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/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Dti,lp8732.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - J Keerthy <j-keerthy@ti.com>
13 PMIC with two high-current buck converters and two linear regulators.
18 - ti,lp8732
19 - ti,lp8733
24 gpio-controller: true
26 '#gpio-cells':
41 '^(buck[01]|ldo[01])-in-supply$':
[all …]
H A Dlp873x.txt4 - compatible: "ti,lp8732", "ti,lp8733"
5 - reg: I2C slave address.
6 - gpio-controller: Marks the device node as a GPIO Controller.
7 - #gpio-cells: Should be two. The first cell is the pin number and
10 - xxx-in-supply: Phandle to parent supply node of each regulator
12 buck0, buck1, ldo0 or ldo1.
13 - regulators: List of child nodes that specify the regulator
20 gpio-controller;
21 #gpio-cells = <2>;
23 buck0-in-supply = <&vsys_3v3>;
[all …]
H A Das3722.txt4 -------------------
5 - compatible: Must be "ams,as3722".
6 - reg: I2C device address.
7 - interrupt-controller: AS3722 has internal interrupt controller which takes the
8 interrupt request from internal sub-blocks like RTC, regulators, GPIOs as well
10 - #interrupt-cells: Should be set to 2 for IRQ number and flags.
12 of AS3722 are defined at dt-bindings/mfd/as3722.h
14 interrupts.txt, using dt-bindings/irq.
17 --------------------
18 - ams,enable-internal-int-pullup: Boolean property, to enable internal pullup on
[all …]
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Ddra71-evm.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/
7 #include "dra7-mmc-iodelay.dtsi"
8 #include "dra72x-mmc-iodelay.dtsi"
9 #include <dt-binding
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/freebsd/sys/contrib/device-tree/Bindings/regulator/
H A Dregulator-max77620.txt3 Device has multiple DCDC(sd[0-3] and LDOs(ldo[0-8]). The input supply
6 sub-node "regulators" which is child node of device node.
14 ------
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H A Dmax8997-regulator.txt3 The Maxim MAX8997 is a multi-function device which includes voltage and
4 current regulators, rtc, charger controller and other sub-blocks. It is
5 interfaced to the host controller using a i2c interface. Each sub-block is
7 describes the bindings for 'pmic' sub-block of max8997.
10 - compatible: Should be "maxim,max8997-pmic".
11 - reg: Specifies the i2c slave address of the pmic block. It should be 0x66.
13 - max8997,pmic-buck1-dvs-voltage: A set of 8 voltage values in micro-volt (uV)
17 - max8997,pmic-buck2-dvs-voltage: A set of 8 voltage values in micro-volt (uV)
21 - max8997,pmic-buck5-dvs-voltage: A set of 8 voltage values in micro-volt (uV)
25 [1] If none of the 'max8997,pmic-buck[1/2/5]-uses-gpio-dvs' optional
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nvidia/
H A Dtegra30-asus-nexus7-grouper-maxim-pmic.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/interrupt-controller/arm-gic.h>
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/mfd/max77620.h>
14 #interrupt-cells = <2>;
15 interrupt-controller;
17 #gpio-cells = <2>;
18 gpio-controller;
20 system-power-controller;
22 pinctrl-names = "default";
[all …]
H A Dtegra124-nyan.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
3 #include <dt-bindings/thermal/thermal.h>
14 stdout-path = "serial0:115200n8";
20 * missing a unit-address. However, the bootloader on these Chromebook
22 * Adding the unit-address causes the bootloader to create a /memory
23 * node and write the memory bank configuration to that node, which in
34 /delete-node/ memory@80000000;
40 vdd-supply = <&vdd_3v3_hdmi>;
41 pll-supply = <&vdd_hdmi_pll>;
[all …]
H A Dtegra20-ventana.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/thermal/thermal.h>
7 #include "tegra20-cpu-opp.dtsi"
8 #include "tegra20-cpu-op
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H A Dtegra30-lg-x3.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/input/gpio-keys.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/leds/common.h>
6 #include <dt-bindings/mfd/max77620.h>
7 #include <dt-bindings/thermal/thermal.h>
10 #include "tegra30-cpu-opp.dtsi"
11 #include "tegra30-cpu-opp-microvolt.dtsi"
14 chassis-type = "handset";
30 * pre-existing /chosen node to be available to insert the
[all …]
H A Dtegra20-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0
22 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
23 nvidia,hpd-gpio =
25 pll-supply = <&reg_1v8_avdd_hdmi_pll>;
26 vdd-supply = <&reg_3v3_avdd_hdmi>;
31 lan-reset-n-hog {
32 gpio-hog;
34 output-high;
35 line-name = "LAN_RESET#";
38 /* Tri-stating GMI_WR_N on SODIMM pin 99 nPWE */
[all …]
H A Dtegra124-apalis-v1.2.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright 2016-2018 Toradex AG
7 #include "tegra124-apalis-emc.dtsi"
21 avddio-pex-supply = <&reg_1v05_vdd>;
22 avdd-pe
[all...]
H A Dtegra124-apalis.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR X11
3 * Copyright 2016-2019 Toradex AG
7 #include "tegra124-apalis-emc.dtsi"
20 avddio-pex-supply = <&reg_1v05_vdd>;
21 avdd-pe
[all...]
H A Dtegra20-seaboard.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
18 stdout-path = "serial0:115200n8";
37 vdd-supply = <&hdmi_vdd_reg>;
38 pll-supply
[all...]
/freebsd/sys/contrib/device-tree/src/arm64/nvidia/
H A Dtegra194-p3668.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/mfd/max77620.h>
24 stdout-path = "serial0:115200n8";
31 phy-reset-gpios = <&gpio TEGRA194_MAIN_GPIO(R, 1) GPIO_ACTIVE_LOW>;
32 phy-handle = <&phy>;
33 phy-mode = "rgmii-id";
36 #address-cells = <1>;
37 #size-cells = <0>;
39 phy: ethernet-phy@0 {
40 compatible = "ethernet-phy-ieee802.3-c22";
[all …]
H A Dtegra186-p3310.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/mfd/max77620.h>
27 stdout-path = "serial0:115200n8";
38 phy-reset-gpios = <&gpio TEGRA186_MAIN_GPIO(M, 4)
40 phy-handle = <&phy>;
41 phy-mode = "rgmii";
44 #address-cells = <1>;
45 #size-cells = <0>;
47 phy: ethernet-phy@0 {
48 compatible = "ethernet-phy-ieee802.3-c22";
[all …]
H A Dtegra194-p2888.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/mfd/max77620.h>
27 stdout-path = "serial0:115200n8";
34 phy-reset-gpios = <&gpio TEGRA194_MAIN_GPIO(G, 5) GPIO_ACTIVE_LOW>;
35 phy-handle = <&phy>;
36 phy-mode = "rgmii-id";
39 #address-cells = <1>;
40 #size-cells = <0>;
42 phy: ethernet-phy@0 {
43 compatible = "ethernet-phy-ieee802.3-c22";
[all …]
H A Dtegra210-p2180.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/mfd/max77620.h>
17 stdout-path = "serial0:115200n8";
26 vdd-supply = <&vdd_gpu>;
31 /delete-property/ dmas;
32 /delete-property/ dma-names;
37 /delete-property/ reg-shift;
39 compatible = "nvidia,tegra30-hsuart";
40 reset-names = "serial";
43 compatible = "brcm,bcm43540-bt";
[all …]
H A Dtegra186-p3509-0000+p3636-0001.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
6 #include <dt-bindings/mfd/max77620.h>
12 compatible = "nvidia,p3509-0000+p3636-0001", "nvidia,tegra186";
30 stdout-path = "serial0:115200n8";
41 phy-reset-gpios = <&gpio_aon TEGRA186_AON_GPIO(AA, 6) GPIO_ACTIVE_LOW>;
42 phy-handle = <&phy>;
43 phy-mode = "rgmii-id";
[all …]
H A Dtegra210-p3450-0000.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/gpio-keys.h>
5 #include <dt-bindings/input/linux-event-codes.h>
6 #include <dt-binding
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/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-am68-sk-base-board.dts1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
10 #include "k3-am68-sk-som.dtsi"
11 #include <dt-bindings/net/ti-dp83867.h>
12 #include <dt-bindings/phy/phy-cadence.h>
13 #include <dt-bindings/phy/phy.h>
15 #include "k3-serdes.h"
18 compatible = "ti,am68-sk", "ti,j721s2";
22 stdout-path = "serial2:115200n8";
[all …]
H A Dk3-am64-phycore-som.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2021-2024 PHYTEC America, LLC - https://www.phytec.com
6 * Copyright (C) 2022-2024 PHYTEC Messtechnik GmbH
10 * https://www.phytec.com/product/phycore-am64x
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/net/ti-dp83867.h>
18 model = "PHYTEC phyCORE-AM64x";
19 compatible = "phytec,am64-phycore-som", "ti,am642";
32 reserved_memory: reserved-memory {
[all …]
/freebsd/sys/arm64/nvidia/tegra210/
H A Dmax77620_regulators.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
6 * Redistribution and use in source and binary forms, with or without
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
43 #include <dt-bindings/mfd/max77620.h>
121 REG_RANGE_INIT(0, 64, 600000, 12500), /* 0.6V - 1.4V / 12.5mV */
[all …]
/freebsd/sys/arm/nvidia/
H A Das3722_regulators.c1 /*-
5 * Redistribution and use in source and binary forms, with or without
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
42 #include <dt-bindings/mfd/as3722.h>
155 .supply_name = "vsup-sd2",
168 .supply_name = "vsup-sd3",
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsm8550-qrd.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
23 compatible = "qcom,sm8550-qrd", "qcom,sm8550";
24 chassis-type = "handset";
31 wcd938x: audio-codec {
32 compatible = "qcom,wcd9385-codec";
34 pinctrl-names = "default";
35 pinctrl-0 = <&wcd_default>;
[all …]

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