| /linux/Documentation/devicetree/bindings/display/ |
| H A D | xylon,logicvc-display.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/display/xylon,logicvc-display.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Paul Kocialkowski <paul.kocialkowski@bootlin.com>
16 with Xilinx Zynq-7000 SoCs and Xilinx FPGAs.
20 synthesis time. As a result, many of the device-tree bindings are meant to
24 Layers are declared in the "layers" sub-node and have dedicated configuration.
25 In version 3 of the controller, each layer has fixed memory offset and address
32 - xylon,logicvc-3.02.a-display
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| /linux/drivers/gpu/drm/atmel-hlcdc/ |
| H A D | atmel_hlcdc_plane.c | 1 // SPDX-License-Identifier: GPL-2.0-only
6 * Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
10 #include <linux/mfd/atmel-hlcdc.h>
23 * struct atmel_hlcdc_plane_state - Atmel HLCDC Plane state structure.
189 return -ENOTSUPP; in atmel_hlcdc_format_to_plane_mode()
264 factor = (256 * ((8 * (srcsize - 1)) - phidef)) / (dstsize - 1); in atmel_hlcdc_plane_phiscaler_get_factor()
265 max_memsize = ((factor * (dstsize - 1)) + (256 * phidef)) / 2048; in atmel_hlcdc_plane_phiscaler_get_factor()
267 if (max_memsize > srcsize - 1) in atmel_hlcdc_plane_phiscaler_get_factor()
268 factor--; in atmel_hlcdc_plane_phiscaler_get_factor()
281 atmel_hlcdc_layer_write_cfg(&plane->layer, cfg_offs + i, in atmel_hlcdc_plane_scaler_set_phicoeff()
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| /linux/drivers/gpu/drm/xlnx/ |
| H A D | zynqmp_kms.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * ZynqMP DisplayPort Subsystem - KMS API
5 * Copyright (C) 2017 - 2021 Xilinx, Inc.
8 * - Hyun Woo Kwon <hyun.kwon@xilinx.com>
9 * - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
46 return container_of(drm, struct zynqmp_dpsub_drm, dev)->dpsub; in to_zynqmp_dpsub()
49 /* -----------------------------------------------------------------------------
60 if (!new_plane_state->crtc) in zynqmp_dpsub_plane_atomic_check()
63 crtc_state = drm_atomic_get_crtc_state(state, new_plane_state->crtc); in zynqmp_dpsub_plane_atomic_check()
79 struct zynqmp_dpsub *dpsub = to_zynqmp_dpsub(plane->dev); in zynqmp_dpsub_plane_atomic_disable()
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| /linux/drivers/ata/ |
| H A D | pata_jmicron.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * pata_jmicron.c - JMicron ATA driver for non AHCI mode. This drives the
31 * jmicron_pre_reset - check for 40/80 pin
38 * either as primary or secondary (or neither). We don't do any policy
44 struct ata_port *ap = link->ap; in jmicron_pre_reset()
45 struct pci_dev *pdev = to_pci_dev(ap->host->dev); in jmicron_pre_reset()
48 int port_mask = 1<< (4 * ap->port_no); in jmicron_pre_reset()
49 int port = ap->port_no; in jmicron_pre_reset()
55 return -ENOENT; in jmicron_pre_reset()
69 as the internal primary channel */ in jmicron_pre_reset()
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| /linux/drivers/gpu/drm/logicvc/ |
| H A D | logicvc_layer.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2019-2022 Bootlin
86 struct drm_device *drm_dev = drm_plane->dev; in logicvc_plane_atomic_check()
87 struct logicvc_layer *layer = logicvc_layer(drm_plane); in logicvc_plane_atomic_check() local
96 if (!new_state->crtc) in logicvc_plane_atomic_check()
99 crtc_state = drm_atomic_get_existing_crtc_state(new_state->state, in logicvc_plane_atomic_check()
100 new_state->crtc); in logicvc_plane_atomic_check()
102 return -EINVAL; in logicvc_plane_atomic_check()
104 if (new_state->crtc_x < 0 || new_state->crtc_y < 0) { in logicvc_plane_atomic_check()
106 "Negative on-CRTC positions are not supported.\n"); in logicvc_plane_atomic_check()
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| H A D | logicvc_of.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2019-2022 Bootlin
14 { "lvds-4bits", LOGICVC_DISPLAY_INTERFACE_LVDS_4BITS },
15 { "lvds-3bits", LOGICVC_DISPLAY_INTERFACE_LVDS_3BITS },
33 { "layer", LOGICVC_LAYER_ALPHA_LAYER },
40 .name = "xylon,display-interface",
48 .name = "xylon,display-colorspace",
56 .name = "xylon,display-depth",
60 .name = "xylon,row-stride",
67 .name = "xylon,background-layer",
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| H A D | logicvc_layer.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2019-2022 Bootlin
32 bool primary; member
53 struct logicvc_layer *layer,
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| /linux/drivers/gpu/drm/fsl-dcu/ |
| H A D | fsl_dcu_drm_plane.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
25 struct fsl_dcu_drm_device *fsl_dev = plane->dev->dev_private; in fsl_dcu_drm_plane_index()
26 unsigned int total_layer = fsl_dev->soc->total_layer; in fsl_dcu_drm_plane_index()
31 return total_layer - index - 1; in fsl_dcu_drm_plane_index()
33 dev_err(fsl_dev->dev, "No more layer left\n"); in fsl_dcu_drm_plane_index()
34 return -EINVAL; in fsl_dcu_drm_plane_index()
42 struct drm_framebuffer *fb = new_plane_state->fb; in fsl_dcu_drm_plane_atomic_check()
44 if (!new_plane_state->fb || !new_plane_state->crtc) in fsl_dcu_drm_plane_atomic_check()
47 switch (fb->format->format) { in fsl_dcu_drm_plane_atomic_check()
59 return -EINVAL; in fsl_dcu_drm_plane_atomic_check()
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| /linux/drivers/gpu/drm/sun4i/ |
| H A D | sun4i_layer.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Maxime Ripard <maxime.ripard@free-electrons.com>
23 if (plane->state) { in sun4i_backend_layer_reset()
24 state = state_to_sun4i_layer_state(plane->state); in sun4i_backend_layer_reset()
26 __drm_atomic_helper_plane_destroy_state(&state->state); in sun4i_backend_layer_reset()
29 plane->state = NULL; in sun4i_backend_layer_reset()
34 __drm_atomic_helper_plane_reset(plane, &state->state); in sun4i_backend_layer_reset()
40 struct sun4i_layer_state *orig = state_to_sun4i_layer_state(plane->state); in sun4i_backend_layer_duplicate_state()
47 __drm_atomic_helper_plane_duplicate_state(plane, ©->state); in sun4i_backend_layer_duplicate_state()
48 copy->uses_frontend = orig->uses_frontend; in sun4i_backend_layer_duplicate_state()
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| /linux/drivers/gpu/drm/tidss/ |
| H A D | tidss_crtc.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/
23 struct drm_device *ddev = tcrtc->crtc.dev; in tidss_crtc_finish_page_flip()
29 spin_lock_irqsave(&ddev->event_lock, flags); in tidss_crtc_finish_page_flip()
37 busy = dispc_vp_go_busy(tidss->dispc, tcrtc->hw_videoport); in tidss_crtc_finish_page_flip()
39 spin_unlock_irqrestore(&ddev->event_lock, flags); in tidss_crtc_finish_page_flip()
43 event = tcrtc->event; in tidss_crtc_finish_page_flip()
44 tcrtc->event = NULL; in tidss_crtc_finish_page_flip()
47 spin_unlock_irqrestore(&ddev->event_lock, flags); in tidss_crtc_finish_page_flip()
51 drm_crtc_send_vblank_event(&tcrtc->crtc, event); in tidss_crtc_finish_page_flip()
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| /linux/drivers/gpu/drm/arm/ |
| H A D | malidp_crtc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
29 struct malidp_hw_device *hwdev = malidp->dev; in malidp_crtc_mode_valid()
35 long rate, req_rate = mode->crtc_clock * 1000; in malidp_crtc_mode_valid()
38 rate = clk_round_rate(hwdev->pxlclk, req_rate); in malidp_crtc_mode_valid()
53 struct malidp_hw_device *hwdev = malidp->dev; in malidp_crtc_atomic_enable()
55 int err = pm_runtime_get_sync(crtc->dev->dev); in malidp_crtc_atomic_enable()
62 drm_display_mode_to_videomode(&crtc->state->adjusted_mode, &vm); in malidp_crtc_atomic_enable()
63 clk_prepare_enable(hwdev->pxlclk); in malidp_crtc_atomic_enable()
66 clk_set_rate(hwdev->pxlclk, crtc->state->adjusted_mode.crtc_clock * 1000); in malidp_crtc_atomic_enable()
68 hwdev->hw->modeset(hwdev, &vm); in malidp_crtc_atomic_enable()
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| /linux/include/uapi/linux/ |
| H A D | sctp.h | 1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
4 * Copyright (c) 1999-2000 Cisco, Inc.
5 * Copyright (c) 1999-2001 Motorola, Inc.
31 * lksctp developers <linux-sctp@vger.kernel.org>
44 * Ryan Layer <rmlayer@us.ibm.com>
47 * Inaky Perez-Gonzalez <inaky.gonzalez@intel.com>
67 * SCTP <draft-ietf-tsvwg-sctpsocket-07.txt>.
116 /* Options 104-106 are deprecated and removed. Do not use this space */
146 /* PR-SCTP policies */
154 #define __SCTP_PR_INDEX(x) ((x >> 4) - 1)
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| /linux/Documentation/networking/ |
| H A D | multi-pf-netdev.rst | 1 .. SPDX-License-Identifier: GPL-2.0
5 Multi-PF Netdev
11 - `Background`_
12 - `Overview`_
13 - `mlx5 implementation`_
14 - `Channels distribution`_
15 - `Observability`_
16 - `Steering`_
17 - `Mutually exclusive features`_
22 The Multi-PF NIC technology enables several CPUs within a multi-socket server to connect directly to
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| H A D | ip-sysctl.rst | 1 .. SPDX-License-Identifier: GPL-2.0
10 ip_forward - BOOLEAN
11 - 0 - disabled (default)
12 - not 0 - enabled
20 ip_default_ttl - INTEGER
25 ip_no_pmtu_disc - INTEGER
27 fragmentation-required ICMP is received, the PMTU to this
38 accept fragmentation-needed errors if the underlying protocol
48 Possible values: 0-3
52 min_pmtu - INTEGER
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| /linux/drivers/gpu/drm/kmb/ |
| H A D | kmb_plane.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright © 2018-2020 Intel Corporation
27 /* Conversion (yuv->rgb) matrix from myriadx */
30 1024, -352, -731,
32 -179, 125, -226
35 /* Graphics layer (layers 2 & 3) formats, only packed formats are supported */
48 /* Video layer ( 0 & 1) formats, packed and planar formats are supported */
72 int plane_id = kmb_plane->id; in check_pixel_format()
75 kmb = to_kmb(plane->dev); in check_pixel_format()
76 init_disp_cfg = kmb->init_disp_cfg[plane_id]; in check_pixel_format()
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| /linux/Documentation/firmware-guide/acpi/apei/ |
| H A D | output_format.rst | 1 .. SPDX-License-Identifier: GPL-2.0
24 [primary][, containment warning][, reset][, threshold exceeded]\
55 [cache error][, TLB error][, bus error][, micro-architectural error]
81 unknown | no error | single-bit ECC | multi-bit ECC | \
82 single-symbol chipkill ECC | multi-symbol chipkill ECC | master abort | \
101 aer_layer=<aer layer string>, aer_agent=<aer agent string>
106 downstream switch port | PCIe to PCI/PCI-X bridge | \
107 PCI/PCI-X to PCIe bridge | root complex integrated endpoint device | \
121 Replay Timer Timeout | Advisory Non-Fatal
124 <aer layer string> :=
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| /linux/Documentation/PCI/endpoint/ |
| H A D | pci-endpoint-cfs.rst | 1 .. SPDX-License-Identifier: GPL-2.0
17 The PCI Endpoint Core layer creates pci_ep directory in the mounted configfs
20 mount -t configfs none /sys/kernel/config
73 ... primary/
79 Non-transparent bridge), symlink of endpoint controller connected to primary
80 interface should be added in 'primary' directory and symlink of endpoint
138 [1] Documentation/PCI/endpoint/pci-endpoint.rst
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| /linux/drivers/s390/net/ |
| H A D | qeth_core_mpc.c | 1 // SPDX-License-Identifier: GPL-2.0
145 {IPA_RC_IP_TABLE_FULL, "Add Addr IP Table Full - ipv6"},
146 {IPA_RC_UNKNOWN_ERROR, "IPA command failed - reason unknown"},
156 {IPA_RC_SBP_IQD_ANO_DEV_PRIMARY, "Primary bridgeport exists already"},
160 {IPA_RC_SBP_IQD_CURRENT_PRIMARY, "Bridgeport is currently primary"},
163 {IPA_RC_L2_UNSUPPORTED_CMD, "Unsupported layer 2 command"},
166 {IPA_RC_L2_DUP_LAYER3_MAC, "Duplicate with layer 3 MAC"},
177 {IPA_RC_SBP_OSA_ANO_DEV_PRIMARY, "Primary bridgeport exists already"},
181 {IPA_RC_SBP_OSA_CURRENT_PRIMARY, "Bridgeport is currently primary"},
197 {IPA_RC_PRIMARY_ALREADY_DEFINED, "Primary already defined"},
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| /linux/drivers/gpu/drm/arm/display/komeda/ |
| H A D | komeda_plane.c | 1 // SPDX-License-Identifier: GPL-2.0
20 struct komeda_plane *kplane = to_kplane(st->plane); in komeda_plane_init_data_flow()
21 struct drm_framebuffer *fb = st->fb; in komeda_plane_init_data_flow()
22 const struct komeda_format_caps *caps = to_kfb(fb)->format_caps; in komeda_plane_init_data_flow()
23 struct komeda_pipeline *pipe = kplane->layer->base.pipeline; in komeda_plane_init_data_flow()
27 dflow->blending_zorder = st->normalized_zpos; in komeda_plane_init_data_flow()
28 if (pipe == to_kcrtc(st->crtc)->master) in komeda_plane_init_data_flow()
29 dflow->blending_zorder -= kcrtc_st->max_slave_zorder; in komeda_plane_init_data_flow()
30 if (dflow->blending_zorder < 0) { in komeda_plane_init_data_flow()
32 st->plane->name, st->normalized_zpos, in komeda_plane_init_data_flow()
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| /linux/drivers/gpu/drm/msm/disp/dpu1/ |
| H A D | dpu_rm.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
30 * struct dpu_rm_requirements - Reservation requirements parameter bundle
47 return -EINVAL; in dpu_rm_init()
54 for (i = 0; i < cat->mixer_count; i++) { in dpu_rm_init()
56 const struct dpu_lm_cfg *lm = &cat->mixer[i]; in dpu_rm_init()
64 rm->mixer_blks[lm->id - LM_0] = &hw->base; in dpu_rm_init()
67 for (i = 0; i < cat->merge_3d_count; i++) { in dpu_rm_init()
69 const struct dpu_merge_3d_cfg *merge_3d = &cat->merge_3d[i]; in dpu_rm_init()
78 rm->merge_3d_blks[merge_3d->id - MERGE_3D_0] = &hw->base; in dpu_rm_init()
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| /linux/drivers/gpu/drm/stm/ |
| H A D | ltdc.c | 1 // SPDX-License-Identifier: GPL-2.0
15 #include <linux/media-bus-format.h>
46 #define CRTC_MASK GENMASK(NB_CRTC - 1, 0)
61 #define LAY_OFS (ldev->caps.layer_ofs)
65 #define LTDC_LCR 0x0004 /* Layer Count */
86 /* Layer register offsets */
87 #define LTDC_L1C0R (ldev->cap
1658 struct drm_plane *primary, *overlay; ltdc_crtc_init() local
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| /linux/Documentation/arch/s390/ |
| H A D | cds.rst | 9 - Ingo Adlung
10 - Cornelia Huck
12 Copyright, IBM Corp. 1999-2002
21 processing, shared versus non-shared interrupt processing, DMA versus port
30 Operation manual (IBM Form. No. SA22-7201).
33 functional layer was introduced that provides generic I/O access methods to
36 The common device support layer comprises the I/O support routines defined
42 described in Documentation/arch/s390/driver-model.rst.
49 * All drivers must define a ccw_driver (see driver-model.txt) and the associated
56 * The channel device layer is gone.
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| /linux/drivers/parisc/ |
| H A D | pdc_stable.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2005-2006 Thibaut VARENE <varenet@parisc-linux.org>
14 * all) PA-RISC machines should have them. Anyway, for safety reasons, the
18 * One last word: there's one path we can always count on: the primary path.
19 * Anything above 224 bytes is used for 'osdep2' OS-dependent storage area.
21 * The first OS-dependen
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| /linux/include/net/sctp/ |
| H A D | command.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * Copyright (C) 1999-2001 Cisco, Motorola
12 * lksctp developers <linux-sctp@vger.kernel.org>
39 SCTP_CMD_CHUNK_ULP, /* Send a chunk to the sockets layer. */
40 SCTP_CMD_EVENT_ULP, /* Send a notification to the sockets layer. */
55 SCTP_CMD_COOKIEECHO_RESTART, /* High level, do cookie-echo timer work. */
73 SCTP_CMD_SETUP_T2, /* Hi-level, setup T2-shutdown parms. */
82 SCTP_CMD_DEL_NON_PRIMARY, /* Removes non-primary peer transports. */
83 SCTP_CMD_T3_RTX_TIMERS_STOP, /* Stops T3-rtx pending timers */
84 SCTP_CMD_FORCE_PRIM_RETRAN, /* Forces retrans. over primary path. */
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| /linux/include/uapi/linux/dvb/ |
| H A D | frontend.h | 1 /* SPDX-License-Identifier: LGPL-2.1+ WITH Linux-syscall-note */
18 * enum fe_caps - Frontend capabilities
23 * @FE_CAN_INVERSION_AUTO: Can auto-detect frequency spectral
33 * @FE_CAN_FEC_AUTO: Can auto-detect FEC
35 * @FE_CAN_QAM_16: Supports 16-QAM modulation
36 * @FE_CAN_QAM_32: Supports 32-QAM modulation
37 * @FE_CAN_QAM_64: Supports 64-QAM modulation
38 * @FE_CAN_QAM_128: Supports 128-QAM modulation
39 * @FE_CAN_QAM_256: Supports 256-QAM modulation
40 * @FE_CAN_QAM_AUTO: Can auto-detect QAM modulation
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