| /linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | pincfg-node.yaml | 152 and the delay before latching a value to an output
162 this affects the expected delay in ps before latching a value to
|
| /linux/Documentation/devicetree/bindings/soc/imx/ |
| H A D | fsl,imx93-src.yaml | 14 all the system reset signals and boot argument latching.
|
| /linux/Documentation/devicetree/bindings/reset/ |
| H A D | renesas,rst.yaml | 16 - Latching of the levels on mode pins when PRESET# is negated,
|
| /linux/arch/mips/loongson2ef/common/cs5536/ |
| H A D | cs5536_mfgpt.c | 157 * before latching the timer count to guarantee that although in mfgpt_read()
|
| /linux/drivers/clocksource/ |
| H A D | timer-loongson1-pwm.c | 175 * before latching the timer count to guarantee that although in ls1x_clocksource_read()
|
| H A D | i8253.c | 45 * before latching the timer count to guarantee that although in i8253_read()
|
| /linux/drivers/net/ethernet/chelsio/cxgb3/ |
| H A D | aq100x.c | 114 /* Read (and reset) the latching version of the status */ in aq100x_intr_handler()
|
| H A D | ael1002.c | 695 * The GPIO Interrupt register on the AEL2020 is a "Latching High" in ael2020_intr_clear()
|
| /linux/drivers/net/ethernet/sfc/falcon/ |
| H A D | io.h | 57 * doorbell register pair, which has its own latching, and
|
| /linux/drivers/cpufreq/ |
| H A D | sa1110-cpufreq.c | 156 * half speed or use delayed read latching (errata 13). in sdram_calculate_timing()
|
| /linux/drivers/net/ethernet/sfc/siena/ |
| H A D | io.h | 57 * doorbell register pair, which has its own latching, and
|
| /linux/drivers/net/pcs/ |
| H A D | pcs-xpcs.c | 990 /* The link status bit is latching-low, so it is important to in xpcs_get_state_c73()
1023 /* The link status bit is latching-low, so it is important to in xpcs_get_state_c73()
|
| /linux/drivers/iio/imu/bmi160/ |
| H A D | bmi160_core.c | 604 /* Set the pin to input mode with no latching. */ in bmi160_config_pin()
|
| /linux/drivers/net/ethernet/cavium/thunder/ |
| H A D | thunder_bgx.c | 892 /* Clear rcvflt bit (latching high) and read it back */ in bgx_xaui_check_link()
1007 /* Receive link is latching low. Force it high and verify it */ in bgx_poll_for_link()
|
| /linux/drivers/tty/serial/ |
| H A D | sc16is7xx.c | 221 #define SC16IS7XX_IOCONTROL_LATCH_BIT BIT(0) /* Enable input latching */
|
| /linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_color.c | 67 * following the latching of any double buffered registers
1012 * Once PSR exit (and proper register latching) has occurred the in skl_color_commit_noarm()
|
| /linux/drivers/gpu/drm/tegra/ |
| H A D | dc.c | 113 * Latching happens mmediately if the display controller is in STOP mode or
|
| /linux/drivers/net/phy/ |
| H A D | phylink.c | 1639 /* The PCS may have a latching link-fail indicator. If the link in phylink_resolve()
|
| /linux/drivers/soc/tegra/ |
| H A D | pmc.c | 3330 * the polarity of the wake level from 0->1 while latching to force in wke_read_sw_wake_status()
|
| /linux/drivers/mtd/nand/raw/ |
| H A D | nand_base.c | 3958 * data, then eventually send the OOB data by latching more data
|
| /linux/drivers/scsi/aic7xxx/ |
| H A D | aic7xxx_core.c | 1631 * ack bytes before latching the current phase in in ahc_handle_scsiint()
|
| /linux/drivers/net/ethernet/intel/e1000e/ |
| H A D | netdev.c | 4401 /* SYSTIMH latching upon SYSTIML read does not work well. in e1000e_read_systim()
|
| /linux/drivers/net/ethernet/broadcom/bnx2x/ |
| H A D | bnx2x_link.c | 13099 /* Clear latching indication */ in bnx2x_link_reset()
|
| /linux/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| H A D | amdgpu_dm.c | 9329 * Depending on when the HW latching event of double-buffered in manage_dm_interrupts()
|