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Searched full:latching (Results 1 – 23 of 23) sorted by relevance

/linux/Documentation/devicetree/bindings/sound/
H A Dti,tlv320adcx140.yaml75 PDMIN1 - PDMCLK latching edge used for channel 1 and 2 data
76 PDMIN2 - PDMCLK latching edge used for channel 3 and 4 data
77 PDMIN3 - PDMCLK latching edge used for channel 5 and 6 data
78 PDMIN4 - PDMCLK latching edge used for channel 7 and 8 data
/linux/Documentation/devicetree/bindings/soc/imx/
H A Dfsl,imx93-src.yaml14 all the system reset signals and boot argument latching.
/linux/Documentation/devicetree/bindings/reset/
H A Drenesas,rst.yaml16 - Latching of the levels on mode pins when PRESET# is negated,
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dpincfg-node.yaml152 and the delay before latching a value to an output
/linux/arch/mips/loongson2ef/common/cs5536/
H A Dcs5536_mfgpt.c157 * before latching the timer count to guarantee that although in mfgpt_read()
/linux/drivers/clocksource/
H A Dtimer-loongson1-pwm.c175 * before latching the timer count to guarantee that although in ls1x_clocksource_read()
H A Di8253.c45 * before latching the timer count to guarantee that although in i8253_read()
/linux/drivers/net/ethernet/chelsio/cxgb3/
H A Daq100x.c114 /* Read (and reset) the latching version of the status */ in aq100x_intr_handler()
H A Dael1002.c695 * The GPIO Interrupt register on the AEL2020 is a "Latching High" in ael2020_intr_clear()
/linux/drivers/net/ethernet/sfc/falcon/
H A Dio.h57 * doorbell register pair, which has its own latching, and
/linux/drivers/cpufreq/
H A Dsa1110-cpufreq.c156 * half speed or use delayed read latching (errata 13). in sdram_calculate_timing()
/linux/drivers/net/ethernet/sfc/siena/
H A Dio.h57 * doorbell register pair, which has its own latching, and
/linux/drivers/net/pcs/
H A Dpcs-xpcs.c890 /* The link status bit is latching-low, so it is important to in xpcs_get_state_c73()
923 /* The link status bit is latching-low, so it is important to in xpcs_get_state_c73()
/linux/drivers/iio/imu/bmi160/
H A Dbmi160_core.c604 /* Set the pin to input mode with no latching. */ in bmi160_config_pin()
/linux/drivers/net/ethernet/cavium/thunder/
H A Dthunder_bgx.c892 /* Clear rcvflt bit (latching high) and read it back */ in bgx_xaui_check_link()
1007 /* Receive link is latching low. Force it high and verify it */ in bgx_poll_for_link()
/linux/drivers/tty/serial/
H A Dsc16is7xx.c249 #define SC16IS7XX_IOCONTROL_LATCH_BIT BIT(0) /* Enable input latching */
/linux/drivers/net/ethernet/faraday/
H A Dftgmac100.c1293 * the HW has been latching RX/TX packet interrupts while in ftgmac100_poll()
/linux/drivers/platform/x86/intel/pmc/
H A Dcore.c1151 * For LPM mode latching we set the latch enable bit and selected mode in pmc_core_lpm_latch_mode_write()
/linux/drivers/scsi/
H A DNCR5380.c1583 * target's REQ by latching the SCSI data into the INPUT DATA register in NCR5380_transfer_dma()
/linux/drivers/net/phy/
H A Dphylink.c1629 /* The PCS may have a latching link-fail indicator. If the link in phylink_resolve()
/linux/drivers/soc/tegra/
H A Dpmc.c3084 * the polarity of the wake level from 0->1 while latching to force in wke_read_sw_wake_status()
/linux/drivers/scsi/aic7xxx/
H A Daic7xxx_core.c1631 * ack bytes before latching the current phase in in ahc_handle_scsiint()
/linux/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_link.c13099 /* Clear latching indication */ in bnx2x_link_reset()