/freebsd/sys/contrib/device-tree/Bindings/power/reset/ |
H A D | keystone-reset.txt | 1 * Device tree bindings for Texas Instruments keystone reset 6 The Keystone SoCs can contain up to 4 watchdog timers to reset 14 - compatible: ti,keystone-reset 16 - ti,syscon-pll: phandle/offset pair. The phandle to syscon used to 20 - ti,syscon-dev: phandle/offset pair. The phandle to syscon used to 26 - ti,soft-reset: Boolean option indicating soft reset. 29 - ti,wdt-list: WDT list that can cause SoC reset. It's not related 30 to WDT driver, it's just needed to enable a SoC related 33 begins from 0 to 3, as keystone can contain up to 4 SoC 37 Setup keystone reset so that in case software reset or [all …]
|
/freebsd/sys/contrib/device-tree/Bindings/watchdog/ |
H A D | ti,davinci-wdt.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/watchdog/ti,davinci-wdt.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: TI DaVinci/Keystone Watchdog Timer Controller 10 - Kousik Sanagavarapu <five231003@gmail.com> 13 TI's Watchdog Timer Controller for DaVinci and Keystone Processors. 17 Davinci DM646x - https://www.ti.com/lit/ug/spruer5b/spruer5b.pdf 18 Keystone - https://www.ti.com/lit/ug/sprugv5a/sprugv5a.pdf 21 - $ref: watchdog.yaml# [all …]
|
H A D | davinci-wdt.txt | 1 Texas Instruments DaVinci/Keystone Watchdog Timer (WDT) Controller 4 - compatible : Should be "ti,davinci-wdt", "ti,keystone-wdt" 5 - reg : Should contain WDT registers location and length 8 - timeout-sec : Contains the watchdog timeout in seconds 9 - clocks : the clock feeding the watchdog timer. 11 See clock-bindings.txt 14 Davinci DM646x - https://www.ti.com/lit/ug/spruer5b/spruer5b.pdf 15 Keystone - https://www.ti.com/lit/ug/sprugv5a/sprugv5a.pdf 19 wdt: wdt@2320000 { 20 compatible = "ti,davinci-wdt"; [all …]
|
/freebsd/sys/contrib/device-tree/src/arm/ti/keystone/ |
H A D | keystone.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/gpio/gpio.h> 10 compatible = "ti,keystone"; 11 model = "Texas Instruments Keystone 2 SoC"; 12 #address-cells = <2>; 13 #size-cells = <2>; 14 interrupt-parent = <&gic>; 30 gic: interrupt-controller@2561000 { [all …]
|
H A D | keystone-k2g.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/pinctrl/keystone.h> 10 #include <dt-bindings/gpio/gpio.h> 13 compatible = "ti,k2g","ti,keystone"; 15 #address-cells = <2>; 16 #size-cells = <2>; 17 interrupt-parent = <&gic>; 32 #address-cells = <1>; [all …]
|
/freebsd/sys/contrib/device-tree/src/arm64/ti/ |
H A D | k3-am62-mcu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 bootph-all; 11 compatible = "pinctrl-single"; 13 #pinctrl-cells = <1>; 14 pinctrl-single,register-width = <32>; 15 pinctrl-single,function-mask = <0xffffffff>; 19 bootph-pre-ram; 20 compatible = "ti,j721e-esm"; 23 ti,esm-pins = <0>, <1>, <2>, <85>; [all …]
|
H A D | k3-am62a-mcu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "pinctrl-single"; 12 #pinctrl-cells = <1>; 13 pinctrl-single,register-width = <32>; 14 pinctrl-single,function-mask = <0xffffffff>; 19 compatible = "ti,j721e-esm"; 21 bootph-pre-ram; 23 ti,esm-pins = <0>, <1>, <2>, <85>; 32 compatible = "ti,am654-timer"; [all …]
|
H A D | k3-am62p-mcu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 4 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/ 9 compatible = "pinctrl-single"; 11 #pinctrl-cells = <1>; 12 pinctrl-single,register-width = <32>; 13 pinctrl-single,function-mask = <0xffffffff>; 14 bootph-all; 18 compatible = "ti,j721e-esm"; 20 ti,esm-pins = <0>, <1>, <2>, <85>; 22 bootph-pre-ram; [all …]
|
H A D | k3-am62p-j722s-common-mcu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "pinctrl-single"; 12 #pinctrl-cells = <1>; 13 pinctrl-single,register-width = <32>; 14 pinctrl-single,function-mask = <0xffffffff>; 15 pinctrl-single,gpio-range = 19 bootph-all; 21 mcu_pmx_range: gpio-range { 22 #pinctrl-single,gpio-range-cells = <3>; [all …]
|
H A D | k3-j784s4-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/mux/mux.h> 9 #include <dt-bindings/phy/phy.h> 10 #include <dt-bindings/phy/phy-ti.h> 12 #include "k3-serdes.h" 15 serdes_refclk: clock-serdes { 16 #clock-cells = <0>; 17 compatible = "fixed-clock"; 25 compatible = "mmio-sram"; [all …]
|
H A D | k3-j721s2-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/phy/phy-cadence.h> 9 #include <dt-bindings/phy/phy-ti.h> 12 serdes_refclk: clock-cmnrefclk { 13 #clock-cells = <0>; 14 compatible = "fixed-clock"; 15 clock-frequency = <0>; 21 compatible = "mmio-sram"; 23 #address-cells = <1>; [all …]
|
H A D | k3-am62a-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "mmio-sram"; 12 #address-cells = <1>; 13 #size-cells = <1>; 17 gic500: interrupt-controller@1800000 { 18 compatible = "arm,gic-v3"; 25 #address-cells = <2>; 26 #size-cells = <2>; 28 #interrupt-cells = <3>; [all …]
|
H A D | k3-am62p-j722s-common-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "mmio-sram"; 11 #address-cells = <1>; 12 #size-cells = <1>; 15 gic500: interrupt-controller@1800000 { 16 compatible = "arm,gic-v3"; 17 #address-cells = <2>; 18 #size-cells = <2>; 20 #interrupt-cells = <3>; [all …]
|
H A D | k3-am62-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "mmio-sram"; 12 #address-cells = <1>; 13 #size-cells = <1>; 17 gic500: interrupt-controller@1800000 { 18 compatible = "arm,gic-v3"; 19 #address-cells = <2>; 20 #size-cells = <2>; 22 #interrupt-cells = <3>; [all …]
|
H A D | k3-j784s4-mcu-wakeup.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ 9 sms: system-controller@44083000 { 10 bootph-all; 11 compatible = "ti,k2g-sci"; 12 ti,host-id = <12>; 14 mbox-names = "rx", "tx"; 19 reg-names = "debug_messages"; 22 k3_pds: power-controller { 23 bootph-all; [all …]
|
H A D | k3-j721s2-mcu-wakeup.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/ 9 sms: system-controller@44083000 { 10 compatible = "ti,k2g-sci"; 11 ti,host-id = <12>; 13 mbox-names = "rx", "tx"; 18 reg-names = "debug_messages"; 21 k3_pds: power-controller { 22 compatible = "ti,sci-pm-domain"; 23 #power-domain-cells = <2>; [all …]
|
H A D | k3-j7200-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 9 serdes_refclk: serdes-refclk { 10 #clock-cells = <0>; 11 compatible = "fixed-clock"; 17 compatible = "mmio-sram"; 19 #address-cells = <1>; 20 #size-cells = <1>; 23 atf-sram@0 { 28 scm_conf: scm-conf@100000 { [all …]
|
H A D | k3-j721e-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <dt-bindings/phy/phy.h> 8 #include <dt-bindings/phy/phy-ti.h> 9 #include <dt-bindings/mux/mux.h> 11 #include "k3-serdes.h" 14 cmn_refclk: clock-cmnrefclk { 15 #clock-cells = <0>; 16 compatible = "fixed-clock"; 17 clock-frequency = <0>; [all …]
|
H A D | k3-am64-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/phy/phy-cadence.h> 9 #include <dt-bindings/phy/phy-ti.h> 12 serdes_refclk: clock-cmnrefclk { 13 #clock-cells = <0>; 14 compatible = "fixed-clock"; 15 clock-frequency = <0>; 21 compatible = "mmio-sram"; 23 #address-cells = <1>; [all …]
|
/freebsd/share/misc/ |
H A D | pci_vendors | 5 # Date: 2024-11-25 03:15:02 8 # the PCI ID Project at https://pci-ids.ucw.cz/. 14 # (version 2 or higher) or the 3-clause BSD License. 25 # device device_name <-- single tab 26 # subvendor subdevice subsystem_name <-- two tabs 30 # This is a relabelled RTL-8139 31 8139 AT-2500TX V3 Ethernet 41 7a09 PCI-to-PCI Bridge 50 7a19 PCI-to-PCI Bridge 55 7a29 PCI-to-PCI Bridge [all …]
|