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Searched +full:keembay +full:- +full:dwc3 (Results 1 – 3 of 3) sorted by relevance

/linux/Documentation/devicetree/bindings/usb/
H A Dintel,keembay-dwc3.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/intel,keembay-dwc3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Intel Keem Bay DWC3 USB controller
10 - Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
14 const: intel,keembay-dwc3
22 clock-names:
24 - const: async_master
25 - const: ref
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/linux/drivers/phy/intel/
H A Dphy-intel-keembay-usb.c1 // SPDX-License-Identifier: GPL-2.0-only
76 ret = regmap_update_bits(priv->regmap_cpr, USS_CPR_CLK_SET, in keembay_usb_clocks_on()
79 dev_err(priv->dev, "error clock set: %d\n", ret); in keembay_usb_clocks_on()
83 ret = regmap_update_bits(priv->regmap_cpr, USS_CPR_RST_SET, in keembay_usb_clocks_on()
86 dev_err(priv->dev, "error reset set: %d\n", ret); in keembay_usb_clocks_on()
90 ret = regmap_update_bits(priv->regmap_slv, in keembay_usb_clocks_on()
95 dev_err(priv->dev, "error iddq disable: %d\n", ret); in keembay_usb_clocks_on()
102 ret = regmap_update_bits(priv->regmap_slv, USS_USB_PHY_CFG0, in keembay_usb_clocks_on()
106 dev_err(priv->dev, "error ref clock select: %d\n", ret); in keembay_usb_clocks_on()
115 ret = regmap_update_bits(priv->regmap_slv, USS_USB_CTRL_CFG0, in keembay_usb_core_off()
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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