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Searched +full:k210 +full:- +full:sysctl (Results 1 – 8 of 8) sorted by relevance

/linux/Documentation/devicetree/bindings/pinctrl/
H A Dcanaan,k210-fpioa.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/canaan,k210-fpioa.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Canaan Kendryte K210 FPIOA
10 - Damien Le Moal <dlemoal@kernel.org>
13 The Canaan Kendryte K210 SoC Fully Programmable IO Array (FPIOA)
16 a per-pin basis.
20 const: canaan,k210-fpioa
29 - description: Controller reference clock source
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/linux/drivers/soc/canaan/
H A Dk210-sysctl.c1 // SPDX-License-Identifier: GPL-2.0-or-later
12 #include <soc/canaan/k210-sysctl.h>
16 struct device *dev = &pdev->dev; in k210_sysctl_probe()
20 dev_info(dev, "K210 system controller\n"); in k210_sysctl_probe()
43 { .compatible = "canaan,k210-sysctl", },
49 .name = "k210-sysctl",
72 panic("k210-sysctl: ioremap failed"); in k210_soc_early_init()
78 SOC_EARLY_INIT_DECLARE(k210_soc, "canaan,kendryte-k210", k210_soc_early_init);
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 obj-$(CONFIG_SOC_K210_SYSCTL) += k210-sysctl.o
/linux/arch/riscv/boot/dts/canaan/
H A Dk210.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
6 #include <dt-bindings/clock/k210-clk.h>
7 #include <dt-bindings/pinctrl/k210-fpioa.h>
8 #include <dt-bindings/reset/k210-rst.h>
12 * Although the K210 is a 64-bit CPU, the address bus is only 32-bits
15 #address-cells = <1>;
16 #size-cells = <1>;
17 compatible = "canaan,kendryte-k210";
20 * The K210 has an sv39 MMU following the privileged specification v1.9.
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/linux/drivers/reset/
H A Dreset-k210.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 #include <linux/reset-controller.h>
11 #include <soc/canaan/k210-sysctl.h>
13 #include <dt-bindings/reset/k210-rst.h>
33 return regmap_update_bits(ksr->map, K210_SYSCTL_PERI_RESET, BIT(id), 1); in k210_rst_assert()
41 return regmap_update_bits(ksr->map, K210_SYSCTL_PERI_RESET, BIT(id), 0); in k210_rst_deassert()
65 ret = regmap_read(ksr->map, K210_SYSCTL_PERI_RESET, &reg); in k210_rst_status()
75 unsigned long id = reset_spec->args[0]; in k210_rst_xlate()
78 return -EINVAL; in k210_rst_xlate()
92 struct device *dev = &pdev->dev; in k210_rst_probe()
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/linux/drivers/pinctrl/
H A Dpinctrl-k210.c1 // SPDX-License-Identifier: GPL-2.0-or-later
16 #include <linux/pinctrl/pinconf-generic.h>
21 #include <dt-bindings/pinctrl/k210-fpioa.h>
25 #include "pinctrl-utils.h"
28 * The K210 only implements 8 drive levels, even though
54 /* Strong pull up not implemented on K210 */
80 * struct k210_fpioa: Kendryte K210 FPIOA memory mapped registers
81 * @pins: 48 32-bits IO pin registers
130 * no pins 48-55).
463 { "output-polarity-invert", PIN_CONFIG_OUTPUT_INVERT, 1 },
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/linux/drivers/clk/
H A Dclk-k210.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
6 #define pr_fmt(fmt) "k210-clk: " fmt
15 #include <linux/clk-provider.h>
18 #include <soc/canaan/k210-sysctl.h>
20 #include <dt-bindings/clock/k210-clk.h>
322 * struct k210_sysclk - sysclk driver data
356 pll->id = pllid; in k210_init_pll()
357 pll->reg = regs + k210_plls_cfg[pllid].reg; in k210_init_pll()
358 pll->lock = regs + K210_SYSCTL_PLL_LOCK; in k210_init_pll()
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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