| /linux/arch/mips/boot/dts/ingenic/ |
| H A D | jz4740.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,jz4740-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
6 #address-cells = <1>;
7 #size-cells = <1>;
8 compatible = "ingenic,jz4740";
11 #address-cells = <1>;
12 #size-cells = <0>;
16 compatible = "ingenic,xburst-mxu1.0";
20 clock-names = "cpu";
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| H A D | jz4725b.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,jz4725b-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
6 #address-cells = <1>;
7 #size-cells = <1>;
11 #address-cells = <1>;
12 #size-cells = <0>;
16 compatible = "ingenic,xburst-mxu1.0";
20 clock-names = "cpu";
24 cpuintc: interrupt-controller {
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| H A D | jz4770.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,jz4770-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
6 #address-cells = <1>;
7 #size-cells = <1>;
11 #address-cells = <1>;
12 #size-cells = <0>;
16 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
20 clock-names = "cpu";
24 cpuintc: interrupt-controller {
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| H A D | x1830.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,tcu.h>
3 #include <dt-bindings/clock/ingenic,x1830-cgu.h>
4 #include <dt-bindings/dma/x1830-dma.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "ingenic,xburst-fpu2.0-mxu2.0";
21 clock-names = "cpu";
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| H A D | jz4780.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,jz4780-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
4 #include <dt-bindings/dma/jz4780-dma.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
21 clock-names = "cpu";
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| /linux/Documentation/devicetree/bindings/rtc/ |
| H A D | ingenic,rtc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/ingenic,rtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic SoCs Real-Time Clock
10 - Paul Cercueil <paul@crapouillou.net>
13 - $ref: rtc.yaml#
14 - if:
20 - ingenic,jz4770-rtc
21 - ingenic,jz4780-rtc
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| /linux/drivers/rtc/ |
| H A D | rtc-jz4740.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
5 * JZ4740 SoC RTC driver
9 #include <linux/clk-provider.h>
19 #include <linux/rtc.h>
64 struct rtc_device *rtc; member
73 static inline uint32_t jz4740_rtc_reg_read(struct jz4740_rtc *rtc, size_t reg) in jz4740_rtc_reg_read() argument
75 return readl(rtc->base + reg); in jz4740_rtc_reg_read()
78 static int jz4740_rtc_wait_write_ready(struct jz4740_rtc *rtc) in jz4740_rtc_wait_write_ready() argument
82 return readl_poll_timeout(rtc->base + JZ_REG_RTC_CTRL, ctrl, in jz4740_rtc_wait_write_ready()
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| H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0
3 # Makefile for RTC class/drivers.
6 ccflags-$(CONFIG_RTC_DEBUG) := -DDEBUG
8 obj-$(CONFIG_RTC_LIB) += lib.o
9 obj-$(CONFIG_RTC_CLASS) += rtc-core.o
10 obj-$(CONFIG_RTC_MC146818_LIB) += rtc-mc146818-lib.o
11 rtc-core-y := class.o interface.o
13 rtc-core-$(CONFIG_RTC_NVMEM) += nvmem.o
14 rtc-core-$(CONFIG_RTC_INTF_DEV) += dev.o
15 rtc-core-$(CONFIG_RTC_INTF_PROC) += proc.o
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| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 # RTC class/drivers configuration
19 Generic RTC class support. If you say yes here, you will
26 bool "Set system time from RTC on startup and resume"
30 the value read from a specified RTC device. This is useful to avoid
34 string "RTC used to set the system time"
38 The RTC device that will be used to (re)initialize the system
44 This clock should be battery-backed, so that it reads the correct
45 time when the system boots from a power-off state. Otherwise, your
50 sleep states. Do not specify an RTC here unless it stays powered
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| /linux/Documentation/devicetree/bindings/timer/ |
| H A D | ingenic,tcu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 Documentation/arch/mips/ingenic-tcu.rst.
14 - Paul Cercueil <paul@crapouillou.net>
21 - ingenic,jz4740-tcu
22 - ingenic,jz4725b-tcu
23 - ingenic,jz4760-tcu
24 - ingenic,jz4760b-tcu
25 - ingenic,jz4770-tcu
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| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | ingenic,cgu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The CGU in an Ingenic SoC provides all the clocks generated on-chip. It
16 - Paul Cercueil <paul@crapouillou.net>
23 - ingenic,jz4740-cgu
24 - ingenic,jz4725b-cgu
25 - ingenic,jz4755-cgu
26 - ingenic,jz4760-cgu
27 - ingenic,jz4760b-cgu
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| /linux/Documentation/arch/mips/ |
| H A D | ingenic-tcu.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 The Timer/Counter Unit (TCU) in Ingenic JZ47xx SoCs is a multi-function
11 - JZ4725B, JZ4750, JZ4755 only have six TCU channels. The other SoCs all
14 - JZ4725B introduced a separate channel, called Operating System Timer
15 (OST). It is a 32-bit programmable timer. On JZ4760B and above, it is
16 64-bit.
18 - Each one of the TCU channels has its own clock, which can be reparented to three
19 different clocks (pclk, ext, rtc), gated, and reclocked, through their TCSR register.
21 - The watchdog and OST hardware blocks also feature a TCSR register with the same
23 - The TCU registers used to gate/ungate can also gate/ungate the watchdog and
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| /linux/drivers/clk/ingenic/ |
| H A D | jz4740-cgu.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Ingenic JZ4740 SoC CGU driver
9 #include <linux/clk-provider.h>
14 #include <dt-bindings/clock/ingenic,jz4740-cgu.h>
51 0x0, 0x1, -1, 0x3,
67 [JZ4740_CLK_RTC] = { "rtc", CGU_CLK_EXT },
71 .parents = { JZ4740_CLK_EXT, -1, -1, -1 },
96 .parents = { JZ4740_CLK_PLL, -1, -1, -1 },
98 CGU_REG_CPCCR, 21, 1, 1, -1, -1, -1, 0,
110 .parents = { JZ4740_CLK_PLL, -1, -1, -1 },
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| H A D | tcu.c | 1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
10 #include <linux/mfd/ingenic-tcu.h>
16 #include <dt-bindings/clock/ingenic,tcu.h>
22 #define pr_fmt(fmt) "ingenic-tcu-clk: " fmt
68 const struct ingenic_tcu_clk_info *info = tcu_clk->info; in ingenic_tcu_enable()
69 struct ingenic_tcu *tcu = tcu_clk->tcu; in ingenic_tcu_enable()
71 regmap_write(tcu->map, TCU_REG_TSCR, BIT(info->gate_bit)); in ingenic_tcu_enable()
79 const struct ingenic_tcu_clk_info *info = tcu_clk->info; in ingenic_tcu_disable()
80 struct ingenic_tcu *tcu = tcu_clk->tcu; in ingenic_tcu_disable()
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| /linux/Documentation/translations/zh_CN/arch/mips/ |
| H A D | ingenic-tcu.rst | 1 .. SPDX-License-Identifier: GPL-2.0
3 .. include:: ../../disclaimer-zh_CN.rst
5 :Original: Documentation/arch/mips/ingenic-tcu.rst
11 .. _cn_ingenic-tcu:
20 - JZ4725B, JZ4750, JZ4755 只有６个TCU通道。其它SoC都有８个通道。
22 - JZ4725B引入了一个独立的通道，称为操作系统计时器(OST)。这是一个32位可
25 - 每个TCU通道都有自己的时钟源，可以通过 TCSR 寄存器设置通道的父级时钟
26 源（pclk、ext、rtc）、开关以及分频。
28 - 看门狗和OST硬件模块在它们的寄存器空间中也有相同形式的TCSR寄存器。
29 - 用于关闭/开启的 TCU 寄存器也可以关闭/开启看门狗和 OST 时钟。
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| /linux/Documentation/translations/zh_TW/arch/mips/ |
| H A D | ingenic-tcu.rst | 1 .. SPDX-License-Identifier: GPL-2.0
3 .. include:: ../../disclaimer-zh_TW.rst
5 :Original: Documentation/arch/mips/ingenic-tcu.rst
11 .. _tw_ingenic-tcu:
20 - JZ4725B, JZ4750, JZ4755 只有６個TCU通道。其它SoC都有８個通道。
22 - JZ4725B引入了一個獨立的通道，稱爲操作系統計時器(OST)。這是一個32位可
25 - 每個TCU通道都有自己的時鐘源，可以通過 TCSR 寄存器設置通道的父級時鐘
26 源（pclk、ext、rtc）、開關以及分頻。
28 - 看門狗和OST硬件模塊在它們的寄存器空間中也有相同形式的TCSR寄存器。
29 - 用於關閉/開啓的 TCU 寄存器也可以關閉/開啓看門狗和 OST 時鐘。
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| /linux/drivers/watchdog/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
16 on-line as fast as possible after a lock-up. There's both a watchdog
21 <file:Documentation/watchdog/watchdog-api.rst> in the kernel source.
51 bool "Update boot-enabled watchdog until userspace takes over"
77 bool "Enable watchdog hrtimer-based pretimeouts"
198 tristate "ChromeOS EC-based watchdog"
252 tristate "Watchdog device controlled through GPIO-line"
257 controlled through GPIO-line.
280 will be called lenovo-se10-wdt.
394 module will be called mlx-wdt.
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| /linux/ |
| H A D | MAINTAINERS | 5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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