| /linux/include/drm/intel/ |
| H A D | i915_hdcp_interface.h | 1 /* SPDX-License-Identifier: (GPL-2.0+) */ 3 * Copyright © 2017-2019 Intel Corporation 17 * enum hdcp_port_type - HDCP port implementation type defined by ME/GSC FW 19 * @HDCP_PORT_TYPE_INTEGRATED: In-Host HDCP2.x port 20 * @HDCP_PORT_TYPE_LSPCON: HDCP2.2 discrete wired Tx port with LSPCON 22 * @HDCP_PORT_TYPE_CPDP: HDCP2.2 discrete wired Tx port using the CPDP (DP 1.3) 33 * enum hdcp_wired_protocol - HDCP adaptation used on the port 57 * enum hdcp_transcoder - ME/GSC Firmware defined index for transcoders 79 * struct hdcp_port_data - intel specific HDCP port data 84 * @k: No of streams transmitted on a port. Only on DP MST this is != 1 [all …]
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| /linux/arch/mips/include/asm/ |
| H A D | mmu_context.h | 4 * This file is subject to the terms and conditions of the GNU General Public 26 #include <asm-generic/mm_hooks.h> 39 /* Note: This is also implemented with uasm in arch/mips/kvm/entry.c */ 62 * to the current pgd for each processor. Also, the proc. id is stuffed 78 * The ginvt instruction will invalidate wired entries when its type field 80 * allow the kernel to create wired entries with the MMID of current->active_mm 81 * then those wired entries could be invalidated when we later use ginvt to 84 * In order to prevent ginvt from trashing wired entries, we reserve one MMID 85 * for use by the kernel when creating wired entries. This MMID will never be 98 return ~(u64)(asid_mask | (asid_mask - 1)); in asid_version_mask() [all …]
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| H A D | regdef.h | 2 * This file is subject to the terms and conditions of the GNU General Public 8 * Copyright (C) 1990 - 1992, 1999 Silicon Graphics, Inc. 10 * written by Ralf Baechle <ralf@linux-mips.org> 22 #define GPR_ZERO 0 /* wired zero */ 65 #define GPR_ZERO 0 /* wired zero */ 67 #define GPR_V0 2 /* return value - caller saved */ 98 #define GPR_GP 28 /* global pointer - caller saved for PIC */ 112 #define zero $0 /* wired zero */ 113 #define AT $1 /* assembler temp - uppercase because of ".set at" */ 155 #define zero $0 /* wired zero */ [all …]
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| /linux/Documentation/devicetree/bindings/iio/resolver/ |
| H A D | adi,ad2s1210.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Analog Devices AD2S1210 Resolver-to-Digital Converter 10 - Michael Hennerich <michael.hennerich@analog.com> 13 The AD2S1210 is a complete 10-bit to 16-bit resolution tracking 14 resolver-to-digital converter, integrating an on-board programmable 22 The mode of operation of the communication channel (parallel or serial) is 23 selected by the A0 and A1 input pins. In normal mode, data is latched by 25 data is read or written using a register access scheme (address byte with [all …]
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| /linux/Documentation/devicetree/bindings/iommu/ |
| H A D | riscv,iommu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: RISC-V IOMMU Architecture Implementation 10 - Tomasz Jeznach <tjeznach@rivosinc.com> 13 The RISC-V IOMMU provides memory address translation and isolation for 14 input and output devices, supporting per-device translation context, 17 It supports identical translation table format to the RISC-V address 19 Hardware uses in-memory command and fault reporting queues with wired 22 Visit https://github.com/riscv-non-isa/riscv-iommu for more details. [all …]
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| /linux/arch/sh/mm/ |
| H A D | tlb-urb.c | 2 * arch/sh/mm/tlb-urb.c 4 * TLB entry wiring helpers for URB-equipped parts. 8 * This file is subject to the terms and conditions of the GNU General Public 34 BUG_ON(!--urb); in tlb_wire_entry() 39 * Insert this entry into the highest non-wired TLB slot (via in tlb_wire_entry() 62 * Unwire the last wired TLB entry. 64 * It should also be noted that it is not possible to wire and unwire 82 * have been wired. in tlb_unwire_entry()
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| /linux/arch/mips/sgi-ip30/ |
| H A D | ip30-common.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 7 * Power Switch is wired via BaseIO BRIDGE slot #6. 9 * ACFail is wired via BaseIO BRIDGE slot #7.
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| /linux/Documentation/devicetree/bindings/spi/ |
| H A D | spi-peripheral-props.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/spi-peripheral-props.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Peripheral-specific properties for a SPI bus. 11 be common properties like spi-max-frequency, spi-cs-high, etc. or they could 14 per-peripheral and there can be multiple peripherals attached to a 20 - Mark Brown <broonie@kernel.org> 28 - minimum: 0 33 spi-cs-high: [all …]
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| /linux/arch/arm/boot/dts/allwinner/ |
| H A D | sun8i-v3s-anbernic-rg-nano.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 /dts-v1/; 4 #include <dt-bindings/input/linux-event-codes.h> 5 #include "sun8i-v3s.dtsi" 6 #include "sunxi-common-regulators.dtsi" 10 compatible = "anbernic,rg-nano", "allwinner,sun8i-v3s"; 19 compatible = "pwm-backlight"; 20 brightness-levels = <0 1 2 3 8 14 21 32 46 60 80 100>; 21 default-brightness-level = <11>; 22 power-supply = <®_vcc5v0>; [all …]
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| /linux/arch/mips/kvm/ |
| H A D | vz.c | 2 * This file is subject to the terms and conditions of the GNU General Public 62 * write_gc0_ebase_64() is no longer UNDEFINED since R6. in kvm_vz_write_gc0_ebase() 115 if (kvm_mips_guest_has_msa(&vcpu->arch)) in kvm_vz_config5_guest_wrmask() 119 * Permit guest FPU mode changes if FPU is enabled and the relevant in kvm_vz_config5_guest_wrmask() 122 if (kvm_mips_guest_has_fpu(&vcpu->arch)) { in kvm_vz_config5_guest_wrmask() 140 * Config1: M, [MMUSize-1, C2, MD, PC, WR, CA], FP 157 /* Permit FPU to be present if FPU is supported */ in kvm_vz_config1_user_wrmask() 158 if (kvm_mips_guest_can_have_fpu(&vcpu->arch)) in kvm_vz_config1_user_wrmask() 174 /* Permit MSA to be present if MSA is supported */ in kvm_vz_config3_user_wrmask() 175 if (kvm_mips_guest_can_have_msa(&vcpu->arch)) in kvm_vz_config3_user_wrmask() [all …]
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| /linux/drivers/input/joystick/ |
| H A D | xpad.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 5 * Copyright (c) 2002 Marko Friedemann <mfr@bmx-chemnitz.de> 15 * This driver is based on: 16 * - information from http://euc.jp/periphs/xbox-controller.ja.html 17 * - the iForce driver drivers/char/joystick/iforce.c 18 * - the skeleton-driver drivers/usb/usb-skeleton.c 19 * - Xbox 360 information http://www.free60.org/wiki/Gamepad 20 * - Xbox One information https://github.com/quantus/xbox-one-controller-protocol 23 * - ITO Takayuki for providing essential xpad information on his website 24 * - Vojtech Pavlik - iforce driver / input subsystem [all …]
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| /linux/Documentation/hwmon/ |
| H A D | via686a.rst | 10 Addresses scanned: ISA in PCI-space encoded address 12 Datasheet: On request through web form (http://www.via.com.tw/en/resources/download-center/) 15 - Kyösti Mälkki <kmalkki@cc.hut.fi>, 16 - Mark D. Studebaker <mdsxyz123@yahoo.com> 17 - Bob Dougherty <bobd@stanford.edu> 18 - (Some conversion-factor data were contributed by 19 - Jonathan Teh Soon Yew <j.teh@iname.com> 20 - and Alex van Kaam <darkside@chello.nl>.) 23 ----------------- 31 base address is not set. [all …]
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| H A D | smsc47m192.rst | 10 Addresses scanned: I2C 0x2c - 0x2d 12 Datasheet: The datasheet for LPC47M192 is publicly available from 23 - Hartmut Rick <linux@rick.claranet.de> 25 - Special thanks to Jean Delvare for careful checking 30 ----------- 33 of the SMSC LPC47M192 and compatible Super-I/O chips. 42 Voltages and temperatures are measured by an 8-bit ADC, the resolution 43 of the temperatures is 1 bit per degree C. 46 each voltage channel is 0V ... 255/192*(nominal voltage), the resolution 47 is 1 bit per (nominal voltage)/192. [all …]
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| H A D | vt1211.rst | 10 Addresses scanned: none, address read from Super-I/O config space 16 This driver is based on the driver for kernel 2.4 by Mark D. Studebaker and 24 ----------------- 29 configuration for channels 1-5. 30 Legal values are in the range of 0-31. Bit 0 maps to 37 The only possible value is 0 which forces interrupt 38 mode 0. In this mode, any pending interrupt is cleared 39 when the status register is read but is regenerated as 47 ----------- 49 The VIA VT1211 Super-I/O chip includes complete hardware monitoring [all …]
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| /linux/Documentation/devicetree/bindings/net/dsa/ |
| H A D | mediatek,mt7530.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Arınç ÜNAL <arinc.unal@arinc9.com> 11 - Landen Chao <Landen.Chao@mediatek.com> 12 - DENG Qingfang <dqfext@gmail.com> 13 - Sean Wang <sean.wang@mediatek.com> 14 - Daniel Golle <daniel@makrotopia.org> 17 There are three versions of MT7530, standalone, in a multi-chip module and 18 built-into a SoC. [all …]
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| /linux/arch/arm/boot/dts/st/ |
| H A D | ste-href-tvk1281618-r2.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/input/input.h> 11 compatible = "gpio-keys"; 12 #address-cells = <1>; 13 #size-cells = <0>; 14 vdd-supply = <&ab8500_ldo_aux1_reg>; 15 pinctrl-names = "default"; 16 pinctrl-0 = <&prox_tvk_mode>, <&hall_tvk_mode>; 37 interrupt-parent = <&gpio6>; [all …]
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| /linux/Documentation/scsi/ |
| H A D | 53c700.rst | 1 .. SPDX-License-Identifier: GPL-2.0 10 This driver supports the 53c700 and 53c700-66 chips. It also supports 11 the 53c710 but only in 53c700 emulation mode. It is full featured and 12 does sync (-66 and 710 only), disconnects and tag command queueing. 25 A compile time flag is:: 37 driver, you need to know three things about the way the chip is wired 45 the SCSI Id from the card bios or whether the chip is wired for 52 The clock speed is usually buried deep in the technical literature. 53 It is required because it is used to set up both the synchronous and 62 53c700-66 50MHz [all …]
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| /linux/drivers/usb/core/ |
| H A D | of.c | 1 // SPDX-License-Identifier: GPL-2.0 15 * usb_of_get_device_node() - get a USB device node 16 * @hub: hub to which device is connected 17 * @port1: one-based index of port 19 * Look up the node of a USB device given its parent hub device and one-based 30 for_each_child_of_node(hub->dev.of_node, node) { in usb_of_get_device_node() 43 * usb_of_has_combined_node() - determine whether a device has a combined node 46 * Determine whether a USB device has a so called combined node which is 47 * shared with its sole interface. This is the case if and only if the device 50 * 1) bDeviceClass is 0 or 9, and [all …]
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| /linux/Documentation/devicetree/bindings/display/panel/ |
| H A D | panel-mipi-dbi-spi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/panel/panel-mipi-dbi-spi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Noralf Trønnes <noralf@tronnes.org> 13 This binding is for display panels using a MIPI DBI compatible controller 18 phones. The standard defines 4 display architecture types and this binding is 20 standard and type C is the serial interface. 23 - Power: 24 - Vdd: Power supply for display module [all …]
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| /linux/Documentation/devicetree/bindings/sound/ |
| H A D | fsl,ssi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Shengjiu Wang <shengjiu.wang@nxp.com> 13 Notes on fsl,playback-dma and fsl,capture-dma 14 On SOCs that have an SSI, specific DMA channels are hard-wired for playback 18 DMA controller to use, but the channels themselves are hard-wired. The 19 purpose of these two properties is to represent this hardware design. 22 "fsl,playback-dma" and "fsl,capture-dma" must be marked as compatible with 23 "fsl,ssi-dma-channel". The SOC-specific compatible string (e.g. [all …]
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| /linux/Documentation/devicetree/bindings/bus/ |
| H A D | ti-sysc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/bus/ti-sysc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Tony Lindgren <tony@atomide.com> 16 is mostly used for interaction between module and Power, Reset and Clock 18 than that it is mostly independent of the interconnect. 21 it. There is a set of control registers for managing the interconnect target 31 pattern: "^target-module(@[0-9a-f]+)?$" 35 - items: [all …]
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| /linux/arch/arm/boot/dts/marvell/ |
| H A D | armada-385-db-ap.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 * (DB-88F6820-AP) 11 /dts-v1/; 12 #include "armada-385.dtsi" 14 #include <dt-bindings/gpio/gpio.h> 18 compatible = "marvell,a385-db-ap", "marvell,armada385", "marvell,armada380"; 21 stdout-path = "serial1:115200n8"; 36 internal-regs { 38 pinctrl-names = "default"; 39 pinctrl-0 = <&i2c0_pins>; [all …]
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| /linux/arch/arm/boot/dts/ti/omap/ |
| H A D | motorola-mapphone-mz607-mz617.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 2 /dts-v1/; 4 #include "motorola-mapphone-common.dtsi" 7 keypad,num-rows = <8>; 8 keypad,num-columns = <8>; 14 * On tablets, mmc1 regulator is vsimcard instead of vwlan2 in the stock kernel 15 * dtb. The regulator may not be wired even if a MMC cage is added though. 18 vmmc-supply = <&vsimcard>; 19 bus-width = <4>; 20 cd-gpios = <&gpio6 16 GPIO_ACTIVE_LOW>; /* gpio_176 */
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| /linux/include/linux/platform_data/ |
| H A D | max3421-hcd.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 4 * Contributed by David Mosberger-Tang <davidm@egauge.net> 6 * Platform-data structure for MAX3421 USB HCD driver. 15 * A value of 0 indicates that the pin is not used/wired to anything. 17 * At this point, the only control the max3421-hcd driver cares about is
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| /linux/include/linux/spi/ |
| H A D | at73c213.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 3 * Board-specific data used to set up AT73c213 audio DAC driver. 10 * at73c213_board_info - how the external DAC is wired to the device. 18 * provides a name which is used to identify it in userspace tools.
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