Searched +full:ipq4019 +full:- +full:nand (Results 1 – 12 of 12) sorted by relevance
/freebsd/sys/contrib/device-tree/Bindings/mtd/ |
H A D | qcom,nandc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm NAND controller 10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 15 - qcom,ipq806x-nand 16 - qcom,ipq4019-nand 17 - qcom,ipq6018-nand 18 - qcom,ipq8074-nand 19 - qcom,sdx55-nand [all …]
|
H A D | qcom_nandc.txt | 1 * Qualcomm NAND controller 4 - compatible: must be one of the following: 5 * "qcom,ipq806x-nand" - for EBI2 NAND controller being used in IPQ806x 7 * "qcom,ipq4019-nand" - for QPIC NAND controller v1.4.0 being used in 8 IPQ4019 SoC and it uses BAM DMA 9 * "qcom,ipq6018-nand" - for QPIC NAND controller v1.5.0 being used in 11 * "qcom,ipq8074-nand" - for QPIC NAND controller v1.5.0 being used in 13 * "qcom,sdx55-nand" - for QPIC NAND controller v2.0.0 being used in 16 - reg: MMIO address range 17 - clocks: must contain core clock and always on clock [all …]
|
/freebsd/sys/contrib/device-tree/src/arm/qcom/ |
H A D | qcom-ipq4019.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 6 /dts-v1/; 8 #include <dt-bindings/clock/qcom,gcc-ipq4019.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 16 model = "Qualcomm Technologies, Inc. IPQ4019"; 17 compatible = "qcom,ipq4019"; 18 interrupt-parent = <&intc>; [all …]
|
H A D | qcom-ipq4019-ap.dk04.1-c1.dts | 1 // SPDX-License-Identifier: GPL-2.0 4 #include "qcom-ipq4019-ap.dk04.1.dtsi" 7 model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1-C1"; 8 compatible = "qcom,ipq4019-dk04.1-c1", "qcom,ipq4019"; 11 dma-controller@7984000 { 17 &nand {
|
H A D | qcom-ipq4019-ap.dk07.1.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 #include "qcom-ipq4019.dtsi" 5 #include <dt-bindings/input/input.h> 6 #include <dt-bindings/gpio/gpio.h> 9 model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK07.1"; 22 stdout-path = "serial0:115200n8"; 27 serial_0_pins: serial0-state { 30 bias-disable; 33 i2c_0_pins: i2c-0-state { 36 bias-disable; [all …]
|
H A D | qcom-ipq4019-ap.dk04.1.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 #include "qcom-ipq4019.dtsi" 5 #include <dt-bindings/input/input.h> 6 #include <dt-bindings/gpio/gpio.h> 9 model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1"; 17 stdout-path = "serial0:115200n8"; 27 serial_0_pins: serial0-state { 30 bias-disable; 33 serial_1_pins: serial1-state { 37 bias-disable; [all …]
|
H A D | qcom-ipq4018-jalapeno.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 4 #include "qcom-ipq4019.dtsi" 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/input/input.h> 14 mdio_pins: mdio-state { 15 mdio-pins { 18 bias-pull-up; 21 mdc-pins { 24 bias-pull-up; 28 serial_pins: serial-state{ [all …]
|
H A D | qcom-ipq4018-ap120c-ac.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 3 #include "qcom-ipq4019.dtsi" 4 #include <dt-bindings/gpio/gpio.h> 5 #include <dt-bindings/input/input.h> 8 model = "ALFA Network AP120C-AC"; 9 compatible = "alfa-network,ap120c-ac", "qcom,ipq4018"; 16 stdout-path = "serial0:115200n8"; 20 compatible = "gpio-keys"; 22 key-reset { 31 i2c0_pins: i2c0-state { [all …]
|
/freebsd/sys/contrib/device-tree/Bindings/arm/ |
H A D | qcom-soc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/arm/qcom-so [all...] |
/freebsd/sys/dts/arm/ |
H A D | qcom-ipq4018-rt-ac58u.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 3 #include "qcom/qcom-ipq4019.dtsi" 4 #include "qcom-ipq4019-ethernet.dtsi" 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/soc/qcom,tcsr.h> 11 model = "ASUS RT-AC58U"; 12 compatible = "asus,rt-ac58u"; 20 led-boot = &led_power; 21 led-failsafe = &led_power; [all …]
|
/freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
H A D | ipq6018.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/qcom,gcc-ipq6018.h> 10 #include <dt-bindings/reset/qcom,gcc-ipq6018.h> 11 #include <dt-bindings/clock/qcom,apss-ipq.h> 12 #include <dt-bindings/thermal/thermal.h> 15 #address-cells = <2>; 16 #size-cells = <2>; 17 interrupt-parent = <&intc>; 20 sleep_clk: sleep-clk { [all …]
|
H A D | ipq8074.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/qcom,gcc-ipq8074.h> 10 #address-cells = <2>; 11 #size-cells = <2>; 15 interrupt-parent = <&intc>; 19 compatible = "fixed-clock"; 20 clock-frequency = <32768>; 21 #clock-cells = <0>; 25 compatible = "fixed-clock"; [all …]
|