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Searched full:ipg_clk (Results 1 – 17 of 17) sorted by relevance

/linux/drivers/irqchip/
H A Dirq-imx-irqsteer.c31 struct clk *ipg_clk; member
177 data->ipg_clk = devm_clk_get(&pdev->dev, "ipg"); in imx_irqsteer_probe()
178 if (IS_ERR(data->ipg_clk)) in imx_irqsteer_probe()
179 return dev_err_probe(&pdev->dev, PTR_ERR(data->ipg_clk), in imx_irqsteer_probe()
206 ret = clk_prepare_enable(data->ipg_clk); in imx_irqsteer_probe()
246 clk_disable_unprepare(data->ipg_clk); in imx_irqsteer_probe()
265 clk_disable_unprepare(irqsteer_data->ipg_clk); in imx_irqsteer_remove()
293 clk_disable_unprepare(irqsteer_data->ipg_clk); in imx_irqsteer_suspend()
303 ret = clk_prepare_enable(irqsteer_data->ipg_clk); in imx_irqsteer_resume()
H A Dirq-imx-intmux.c74 struct clk *ipg_clk; member
229 data->ipg_clk = devm_clk_get(&pdev->dev, "ipg"); in imx_intmux_probe()
230 if (IS_ERR(data->ipg_clk)) in imx_intmux_probe()
231 return dev_err_probe(&pdev->dev, PTR_ERR(data->ipg_clk), in imx_intmux_probe()
241 ret = clk_prepare_enable(data->ipg_clk); in imx_intmux_probe()
285 clk_disable_unprepare(data->ipg_clk); in imx_intmux_probe()
319 clk_disable_unprepare(data->ipg_clk); in imx_intmux_runtime_suspend()
330 ret = clk_prepare_enable(data->ipg_clk); in imx_intmux_runtime_resume()
/linux/drivers/pwm/
H A Dpwm-fsl-ftm.c49 struct clk *ipg_clk; member
91 ret = clk_prepare_enable(fpc->ipg_clk); in fsl_pwm_request()
111 clk_disable_unprepare(fpc->ipg_clk); in fsl_pwm_free()
365 ret = clk_prepare_enable(fpc->ipg_clk); in fsl_pwm_init()
373 clk_disable_unprepare(fpc->ipg_clk); in fsl_pwm_init()
446 * ipg_clk is the interface clock for the IP. If not provided, use the in fsl_pwm_probe()
449 fpc->ipg_clk = devm_clk_get(&pdev->dev, "ipg"); in fsl_pwm_probe()
450 if (IS_ERR(fpc->ipg_clk)) in fsl_pwm_probe()
451 fpc->ipg_clk = fpc->clk[FSL_PWM_CLK_SYS]; in fsl_pwm_probe()
482 clk_disable_unprepare(fpc->ipg_clk); in fsl_pwm_suspend()
[all …]
/linux/drivers/iio/adc/
H A Dimx93_adc.c74 struct clk *ipg_clk; member
267 *val = clk_get_rate(adc->ipg_clk); in imx93_adc_read_raw()
328 adc->ipg_clk = devm_clk_get(dev, "ipg"); in imx93_adc_probe()
329 if (IS_ERR(adc->ipg_clk)) in imx93_adc_probe()
330 return dev_err_probe(dev, PTR_ERR(adc->ipg_clk), in imx93_adc_probe()
353 ret = clk_prepare_enable(adc->ipg_clk); in imx93_adc_probe()
392 clk_disable_unprepare(adc->ipg_clk); in imx93_adc_probe()
415 clk_disable_unprepare(adc->ipg_clk); in imx93_adc_remove()
425 clk_disable_unprepare(adc->ipg_clk); in imx93_adc_runtime_suspend()
445 ret = clk_prepare_enable(adc->ipg_clk); in imx93_adc_runtime_resume()
H A Dimx8qxp-adc.c95 struct clk *ipg_clk; member
339 adc->ipg_clk = devm_clk_get(dev, "ipg"); in imx8qxp_adc_probe()
340 if (IS_ERR(adc->ipg_clk)) in imx8qxp_adc_probe()
341 return dev_err_probe(dev, PTR_ERR(adc->ipg_clk), "Failed getting clock\n"); in imx8qxp_adc_probe()
369 ret = clk_prepare_enable(adc->ipg_clk); in imx8qxp_adc_probe()
398 clk_disable_unprepare(adc->ipg_clk); in imx8qxp_adc_probe()
420 clk_disable_unprepare(adc->ipg_clk); in imx8qxp_adc_remove()
435 clk_disable_unprepare(adc->ipg_clk); in imx8qxp_adc_runtime_suspend()
459 ret = clk_prepare_enable(adc->ipg_clk); in imx8qxp_adc_runtime_resume()
/linux/drivers/pmdomain/imx/
H A Dgpc.c458 struct clk *ipg_clk; in imx_gpc_probe() local
462 ipg_clk = devm_clk_get(&pdev->dev, "ipg"); in imx_gpc_probe()
463 if (IS_ERR(ipg_clk)) in imx_gpc_probe()
464 return PTR_ERR(ipg_clk); in imx_gpc_probe()
465 ipg_rate_mhz = clk_get_rate(ipg_clk) / 1000000; in imx_gpc_probe()
/linux/drivers/gpu/drm/fsl-dcu/
H A Dfsl_tcon.h20 struct clk *ipg_clk; member
/linux/sound/soc/fsl/
H A Dfsl_xcvr.c43 struct clk *ipg_clk; member
1529 xcvr->ipg_clk = devm_clk_get(dev, "ipg"); in fsl_xcvr_probe()
1530 if (IS_ERR(xcvr->ipg_clk)) { in fsl_xcvr_probe()
1532 return PTR_ERR(xcvr->ipg_clk); in fsl_xcvr_probe()
1709 clk_disable_unprepare(xcvr->ipg_clk); in fsl_xcvr_runtime_suspend()
1725 ret = clk_prepare_enable(xcvr->ipg_clk); in fsl_xcvr_runtime_resume()
1817 clk_disable_unprepare(xcvr->ipg_clk); in fsl_xcvr_runtime_resume()
H A Dfsl_audmix.h98 struct clk *ipg_clk; member
H A Dfsl_micfil.c1300 /* ipg_clk is used to control the registers in fsl_micfil_probe()
1310 micfil->busclk = devm_clk_get(&pdev->dev, "ipg_clk"); in fsl_micfil_probe()
/linux/drivers/nvmem/
H A Dimx-ocotp.c246 * ipg_clk. OTP writes will work at maximum bus frequencies as long in imx_ocotp_set_imx6_timing()
250 * correctly that are independent of the ipg_clk. Those values are not in imx_ocotp_set_imx6_timing()
265 * of ipg_clk periods." where Tpgm and Trd refer to STROBE_PROG in imx_ocotp_set_imx6_timing()
/linux/drivers/tty/serial/
H A Dfsl_lpuart.c266 struct clk *ipg_clk; member
416 ret = clk_prepare_enable(sport->ipg_clk); in __lpuart_enable_clks()
422 clk_disable_unprepare(sport->ipg_clk); in __lpuart_enable_clks()
427 clk_disable_unprepare(sport->ipg_clk); in __lpuart_enable_clks()
438 return clk_get_rate(sport->ipg_clk); in lpuart_get_baud_clk_rate()
2823 ret = clk_prepare_enable(sport->ipg_clk); in lpuart_global_reset()
2841 clk_disable_unprepare(sport->ipg_clk); in lpuart_global_reset()
2859 clk_disable_unprepare(sport->ipg_clk); in lpuart_global_reset()
2906 sport->ipg_clk = devm_clk_get(&pdev->dev, "ipg"); in lpuart_probe()
2907 if (IS_ERR(sport->ipg_clk)) { in lpuart_probe()
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mn.dtsi366 clock-names = "ipg_clk", "ipg_clk_app",
H A Dimx93.dtsi575 clock-names = "ipg_clk", "ipg_clk_app", "pll8k";
H A Dimx8mm.dtsi394 clock-names = "ipg_clk", "ipg_clk_app",
H A Dimx95.dtsi1407 clock-names = "ipg_clk", "ipg_clk_app",
H A Dimx8mp.dtsi1543 clock-names = "ipg_clk", "ipg_clk_app",