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/linux/lib/
H A Dirq_poll.c21 * @iop: The parent iopoll structure
27 void irq_poll_sched(struct irq_poll *iop) in irq_poll_sched() argument
31 if (test_bit(IRQ_POLL_F_DISABLE, &iop->state)) in irq_poll_sched()
33 if (test_and_set_bit(IRQ_POLL_F_SCHED, &iop->state)) in irq_poll_sched()
37 list_add_tail(&iop->list, this_cpu_ptr(&blk_cpu_iopoll)); in irq_poll_sched()
44 * __irq_poll_complete - Mark this @iop as un-polled again
45 * @iop: The parent iopoll structure
51 static void __irq_poll_complete(struct irq_poll *iop) in __irq_poll_complete() argument
53 list_del(&iop->list); in __irq_poll_complete()
55 clear_bit_unlock(IRQ_POLL_F_SCHED, &iop->state); in __irq_poll_complete()
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/linux/arch/m68k/mac/
H A Diop.c2 * I/O Processor (IOP) management
16 * The IOP chips are used in the IIfx and some Quadras (900, 950) to manage
19 * 990429 (jmt) - Initial implementation, just enough to knock the SCC IOP
22 * 990603 (jmt) - Added code to grab the correct ISM IOP interrupt for OSS
26 * 990605 (jmt) - Rearranged things a bit wrt IOP detection; iop_present is
27 * gone, IOP base addresses are now in an array and the
28 * globally-visible functions take an IOP number instead of
33 * IOP. The trick now is figuring out the message formats.
41 * unsolicited messages from the IOP (and our replies to them
45 * 990729 (jmt) - Added passing of pt_regs structure to IOP handlers. This is
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/linux/arch/powerpc/platforms/8xx/
H A Dcpm1.c158 struct cpm_ioport32e __iomem *iop; in cpm1_set_pin32() local
162 iop = (struct cpm_ioport32e __iomem *) in cpm1_set_pin32()
165 iop = (struct cpm_ioport32e __iomem *) in cpm1_set_pin32()
169 setbits32(&iop->dir, pin); in cpm1_set_pin32()
171 clrbits32(&iop->dir, pin); in cpm1_set_pin32()
174 setbits32(&iop->par, pin); in cpm1_set_pin32()
176 clrbits32(&iop->par, pin); in cpm1_set_pin32()
187 setbits32(&iop->sor, pin); in cpm1_set_pin32()
189 clrbits32(&iop->sor, pin); in cpm1_set_pin32()
200 struct cpm_ioport16 __iomem *iop = in cpm1_set_pin16() local
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/linux/drivers/iommu/
H A Dio-pgtable.c61 struct io_pgtable *iop; in alloc_io_pgtable_ops() local
74 iop = fns->alloc(cfg, cookie); in alloc_io_pgtable_ops()
75 if (!iop) in alloc_io_pgtable_ops()
78 iop->fmt = fmt; in alloc_io_pgtable_ops()
79 iop->cookie = cookie; in alloc_io_pgtable_ops()
80 iop->cfg = *cfg; in alloc_io_pgtable_ops()
82 return &iop->ops; in alloc_io_pgtable_ops()
92 struct io_pgtable *iop; in free_io_pgtable_ops() local
97 iop = io_pgtable_ops_to_pgtable(ops); in free_io_pgtable_ops()
98 io_pgtable_tlb_flush_all(iop); in free_io_pgtable_ops()
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H A Dio-pgtable-arm.c33 container_of((x), struct arm_lpae_io_pgtable, iop)
160 struct io_pgtable iop; member
344 struct io_pgtable_cfg *cfg = &data->iop.cfg; in __arm_lpae_init_pte()
348 if (data->iop.fmt != ARM_MALI_LPAE && lvl == ARM_LPAE_MAX_LEVELS - 1) in __arm_lpae_init_pte()
368 if (iopte_leaf(ptep[i], lvl, data->iop.fmt)) { in arm_lpae_init_pte()
370 WARN_ON(!(data->iop.cfg.quirks & IO_PGTABLE_QUIRK_NO_WARN)); in arm_lpae_init_pte()
398 struct io_pgtable_cfg *cfg = &data->iop.cfg; in arm_lpae_install_table()
432 struct io_pgtable_cfg *cfg = &data->iop.cfg; in __arm_lpae_map()
457 cptep = __arm_lpae_alloc_pages(tblsz, gfp, cfg, data->iop.cookie); in __arm_lpae_map()
463 __arm_lpae_free_pages(cptep, tblsz, cfg, data->iop.cookie); in __arm_lpae_map()
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H A Dmsm_iommu.c44 struct io_pgtable_ops *iop; member
351 priv->iop = alloc_io_pgtable_ops(ARM_V7S, &priv->cfg, priv); in msm_iommu_domain_config()
352 if (!priv->iop) { in msm_iommu_domain_config()
457 free_io_pgtable_ops(priv->iop); in msm_iommu_identity_attach()
494 ret = priv->iop->map_pages(priv->iop, iova, pa, pgsize, pgcount, prot, in msm_iommu_map()
519 ret = priv->iop->unmap_pages(priv->iop, iova, pgsize, pgcount, gather); in msm_iommu_unmap()
H A Dipmmu-vmsa.c75 struct io_pgtable_ops *iop; member
455 domain->iop = alloc_io_pgtable_ops(ARM_32_LPAE_S1, &domain->cfg, in ipmmu_domain_init_context()
457 if (!domain->iop) { in ipmmu_domain_init_context()
588 free_io_pgtable_ops(domain->iop); in ipmmu_domain_free()
675 return domain->iop->map_pages(domain->iop, iova, paddr, pgsize, pgcount, in ipmmu_map()
685 return domain->iop->unmap_pages(domain->iop, iova, pgsize, pgcount, gather); in ipmmu_unmap()
709 return domain->iop->iova_to_phys(domain->iop, iova); in ipmmu_iova_to_phys()
/linux/arch/m68k/include/asm/
H A Dmac_iop.h3 * I/O Processor (IOP) defines and structures, mostly snagged from A/UX
13 * a "struct iop" (see below) to see where the actual registers fall.
22 /* IOP status/control register bits: */
26 #define IOP_RUN 0x04 /* set to 0 to reset IOP chip */
27 #define IOP_IRQ 0x08 /* generate IRQ to IOP if 1 */
28 #define IOP_INT0 0x10 /* intr priority from IOP to host */
29 #define IOP_INT1 0x20 /* intr priority from IOP to host */
38 /* IOP reference numbers, used by the globally-visible iop_xxx functions */
43 /* IOP channel states */
50 /* IOP message status codes */
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H A Dadb_iop.h3 * ADB through the IOP
7 /* IOP number and channel number for ADB */
/linux/Documentation/scsi/
H A Dhptiop.rst11 For RR44xx Intel IOP based adapters, the controller IOP is accessed via PCI BAR0 and BAR2
36 For Intel IOP based adapters, the controller IOP is accessed via PCI BAR0:
54 For Marvell not Frey IOP based adapters, the IOP is accessed via PCI BAR0 and BAR1:
78 For Marvell Frey IOP based adapters, the IOP is accessed via PCI BAR0 and BAR1:
83 0x0 IOP configuration information.
111 A request packet can be allocated in either IOP or host memory.
119 relative to the IOP BAR0.
125 - Post the packet to IOP by writing it to inbound queue. For requests
126 allocated in IOP memory, write the offset to inbound queue port. For
130 - The IOP process the request. When the request is completed, it
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/linux/drivers/macintosh/
H A Dadb-iop.c3 * I/O Processor (IOP) ADB Driver
52 .name = "ISM IOP",
77 * Completion routine for ADB commands sent to the IOP.
94 * Listen for ADB messages from the IOP.
96 * This will be called when unsolicited IOP messages are received.
97 * These IOP messages can carry ADB autopoll responses and also occur
112 * produced when the IOP polls devices. They are mostly timeouts. in adb_iop_listen()
151 * Start sending an ADB packet, IOP style
153 * There isn't much to do other than hand the packet over to the IOP
167 /* The IOP takes MacII-style packets, so strip the initial in adb_iop_start()
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/linux/arch/powerpc/sysdev/
H A Dcpm_common.c108 struct cpm2_ioports __iomem *iop = cpm2_gc->regs; in cpm2_gpio32_save_regs() local
110 cpm2_gc->cpdata = in_be32(&iop->dat); in cpm2_gpio32_save_regs()
116 struct cpm2_ioports __iomem *iop = cpm2_gc->regs; in cpm2_gpio32_get() local
121 return !!(in_be32(&iop->dat) & pin_mask); in cpm2_gpio32_get()
126 struct cpm2_ioports __iomem *iop = cpm2_gc->regs; in __cpm2_gpio32_set() local
133 out_be32(&iop->dat, cpm2_gc->cpdata); in __cpm2_gpio32_set()
154 struct cpm2_ioports __iomem *iop = cpm2_gc->regs; in cpm2_gpio32_dir_out() local
160 setbits32(&iop->dir, pin_mask); in cpm2_gpio32_dir_out()
171 struct cpm2_ioports __iomem *iop = cpm2_gc->regs; in cpm2_gpio32_dir_in() local
177 clrbits32(&iop->dir, pin_mask); in cpm2_gpio32_dir_in()
H A Dcpm2.c320 struct cpm2_ioports __iomem *iop = in cpm2_set_pin() local
326 setbits32(&iop[port].dir, pin); in cpm2_set_pin()
328 clrbits32(&iop[port].dir, pin); in cpm2_set_pin()
331 setbits32(&iop[port].par, pin); in cpm2_set_pin()
333 clrbits32(&iop[port].par, pin); in cpm2_set_pin()
336 setbits32(&iop[port].sor, pin); in cpm2_set_pin()
338 clrbits32(&iop[port].sor, pin); in cpm2_set_pin()
341 setbits32(&iop[port].odr, pin); in cpm2_set_pin()
343 clrbits32(&iop[port].odr, pin); in cpm2_set_pin()
/linux/include/uapi/linux/
H A Di2o-dev.h50 unsigned int iop; /* IOP unit number */ member
55 unsigned int iop; /* IOP unit number */ member
60 unsigned int iop; /* IOP unit number */ member
66 unsigned int iop; /* IOP unit number */ member
75 unsigned int iop; /* IOP unit number */ member
86 unsigned int iop; /* IOP unit number */ member
98 unsigned int iop; member
/linux/drivers/scsi/
H A Dhptiop.c52 req = readl(&hba->u.itl.iop->inbound_queue); in iop_wait_ready_itl()
59 writel(req, &hba->u.itl.iop->outbound_queue); in iop_wait_ready_itl()
60 readl(&hba->u.itl.iop->outbound_intstatus); in iop_wait_ready_itl()
90 while ((req = readl(&hba->u.itl.iop->outbound_queue)) != in hptiop_drain_outbound_queue_itl()
99 ((char __iomem *)hba->u.itl.iop + req); in hptiop_drain_outbound_queue_itl()
115 struct hpt_iopmu_itl __iomem *iop = hba->u.itl.iop; in iop_intr_itl() local
123 status = readl(&iop->outbound_intstatus); in iop_intr_itl()
126 u32 msg = readl(&iop->outbound_msgaddr0); in iop_intr_itl()
129 writel(IOPMU_OUTBOUND_INT_MSG0, &iop->outbound_intstatus); in iop_intr_itl()
306 writel((unsigned long)req - (unsigned long)hba->u.itl.iop, in iop_send_sync_request_itl()
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H A Dhptiop.h125 /* host-to-iop messages */
134 /* iop-to-host messages */
273 struct hpt_iopmu_itl __iomem *iop; member
303 /* IOP config info */
/linux/arch/alpha/kernel/
H A Dcore_wildfire.c187 wildfire_iop *iop; in wildfire_hardware_probe() local
286 iop = WILDFIRE_iop(soft_qbb); in wildfire_hardware_probe()
290 if ((iop->iop_hose[i].init.csr & 1) == 1 && in wildfire_hardware_probe()
552 wildfire_iop *iop = WILDFIRE_iop(qbbno); in wildfire_dump_iop_regs() local
555 printk(KERN_ERR "IOP registers for QBB %d (%p)\n", qbbno, iop); in wildfire_dump_iop_regs()
557 printk(KERN_ERR " IOA_CONFIG: 0x%16lx\n", iop->ioa_config.csr); in wildfire_dump_iop_regs()
558 printk(KERN_ERR " IOD_CONFIG: 0x%16lx\n", iop->iod_config.csr); in wildfire_dump_iop_regs()
560 iop->iop_switch_credits.csr); in wildfire_dump_iop_regs()
562 iop->iop_hose_credits.csr); in wildfire_dump_iop_regs()
566 i, iop->iop_hose[i].init.csr); in wildfire_dump_iop_regs()
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/linux/drivers/net/fddi/skfp/h/
H A Dtargetos.h51 #define ADDR(a) (smc->hw.iop+(a))
53 …ADDR(a) (((a)>>7) ? (outp(smc->hw.iop+B0_RAP,(a)>>7), (smc->hw.iop+( ((a)&0x7F) | ((a)>>7 ? 0x80:0…
H A Dskfbi.h697 #define ADDR(a) (char far *) smc->hw.iop+(a)
698 #define ADDRS(smc,a) (char far *) (smc)->hw.iop+(a)
700 #define ADDR(a) (((a)>>7) ? (outp(smc->hw.iop+B0_RAP,(a)>>7), \
701 (smc->hw.iop+(((a)&0x7F)|((a)>>7 ? 0x80:0)))) : \
702 (smc->hw.iop+(((a)&0x7F)|((a)>>7 ? 0x80:0))))
703 #define ADDRS(smc,a) (((a)>>7) ? (outp((smc)->hw.iop+B0_RAP,(a)>>7), \
704 ((smc)->hw.iop+(((a)&0x7F)|((a)>>7 ? 0x80:0)))) : \
705 ((smc)->hw.iop+(((a)&0x7F)|((a)>>7 ? 0x80:0))))
742 #define GET_ISR_SMP(iop) inpd((iop)+B0_ISRC) argument
744 #define CHECK_ISR_SMP(iop) (inpd((iop)+B0_ISRC) & inpd((iop)+B0_IMSK)) argument
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/linux/drivers/scsi/arcmsr/
H A Darcmsr.h122 ** IOP Message Transfer Data for user space
131 /* IOP message transfer */
191 ** Q Buffer of IOP Message Transfer
201 ** FIRMWARE INFO for Intel IOP R 80331 processor (Type A)
257 /* window of "instruction flags" from driver to iop */
260 /* window of "instruction flags" from iop to driver */
263 /* window of "instruction flags" from iop to driver */
266 /* window of "instruction flags" from driver to iop */
307 /* user space data to iop 128bytes */
309 /* iop data to user space 128bytes */
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/linux/Documentation/devicetree/bindings/timer/
H A Dhpe,gxp-timer.yaml27 const: iop
46 clock-names = "iop";
/linux/arch/arm64/crypto/
H A Dsm3-neon-core.S121 #define R(i, a, b, c, d, e, f, g, h, k, K_LOAD, round, widx, wtype, IOP, iop_param) \ argument
125 IOP(1, iop_param); \
129 IOP(2, iop_param); \
132 IOP(3, iop_param); \
136 IOP(4, iop_param); \
140 IOP(5, iop_param); \
145 IOP(6, iop_param); \
149 IOP(7, iop_param); \
152 IOP(8, iop_param); \
155 #define R1(a, b, c, d, e, f, g, h, k, K_LOAD, round, widx, wtype, IOP, iop_param) \ argument
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/linux/arch/m68k/include/uapi/asm/
H A Dbootinfo-mac.h45 #define BI_MAC_SCCTYPE 0x801c /* Mac SCC serial type (normal, IOP) */
49 #define BI_MAC_IOP_SWIM 0x8020 /* Mac SWIM floppy IOP */
50 #define BI_MAC_IOP_ADB 0x8021 /* Mac ADB IOP */
/linux/fs/fuse/
H A Dcontrol.c210 const struct inode_operations *iop, in fuse_ctl_add_dentry() argument
232 if (iop) in fuse_ctl_add_dentry()
233 inode->i_op = iop; in fuse_ctl_add_dentry()
/linux/drivers/pinctrl/sunplus/
H A Dsppctl.h83 * @mux_f_gpio: Set the corresponding pin to a GPIO or IOP pin
94 * @mux_m_iop: Set the corresponding pin to an IO processor (IOP) pin

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