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/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6dl.dtsi130 gpio-ranges = <&iomuxc 0 131 2>, <&iomuxc 2 137 8>, <&iomuxc 10 189 2>,
131 <&iomuxc 12 194 1>, <&iomuxc 13 193 1>, <&iomuxc 14 192 1>,
132 <&iomuxc 15 191 1>, <&iomuxc 16 185 2>, <&iomuxc 18 184 1>,
133 <&iomuxc 19 187 1>, <&iomuxc 20 183 1>, <&iomuxc 21 188 1>,
134 <&iomuxc 22 123 3>, <&iomuxc 25 121 1>, <&iomuxc 26 127 1>,
135 <&iomuxc 27 126 1>, <&iomuxc 28 128 1>, <&iomuxc 29 130 1>,
136 <&iomuxc 30 129 1>, <&iomuxc 31 122 1>;
140 gpio-ranges = <&iomuxc 0 161 8>, <&iomuxc 8 208 8>, <&iomuxc 16 74 1>,
141 <&iomuxc 17 73 1>, <&iomuxc 18 72 1>, <&iomuxc 19 71 1>,
142 <&iomuxc 20 70 1>, <&iomuxc 21 69 1>, <&iomuxc 22 68 1>,
[all …]
H A Dimx6q.dtsi311 gpio-ranges = <&iomuxc 0 136 2>, <&iomuxc 2 141 1>, <&iomuxc 3 139 1>,
312 <&iomuxc 4 142 2>, <&iomuxc 6 140 1>, <&iomuxc 7 144 2>,
313 <&iomuxc 9 138 1>, <&iomuxc 10 213 3>, <&iomuxc 13 20 1>,
314 <&iomuxc 14 19 1>, <&iomuxc 15 21 1>, <&iomuxc 16 208 1>,
315 <&iomuxc 17 207 1>, <&iomuxc 18 210 3>, <&iomuxc 21 209 1>,
316 <&iomuxc 22 116 10>;
320 gpio-ranges = <&iomuxc 0 191 16>, <&iomuxc 16 55 14>, <&iomuxc 30 35 1>,
321 <&iomuxc 31 44 1>;
325 gpio-ranges = <&iomuxc 0 69 16>, <&iomuxc 16 36 8>, <&iomuxc 24 45 8>;
329 gpio-ranges = <&iomuxc 5 149 1>, <&iomuxc 6 126 10>, <&iomuxc 16 87 16>;
[all …]
H A Dimx7s.dtsi357 gpio-ranges = <&iomuxc_lpsr 0 0 8>, <&iomuxc 8 5 8>;
369 gpio-ranges = <&iomuxc 0 13 32>;
381 gpio-ranges = <&iomuxc 0 45 29>;
393 gpio-ranges = <&iomuxc 0 74 24>;
405 gpio-ranges = <&iomuxc 0 98 18>;
417 gpio-ranges = <&iomuxc 0 116 23>;
429 gpio-ranges = <&iomuxc 0 139 16>;
464 compatible = "fsl,imx7d-iomuxc-lpsr";
466 fsl,input-sel = <&iomuxc>;
516 iomuxc: pinctrl@30330000 { label
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8dxl-ss-lsio.dtsi14 gpio-ranges = <&iomuxc 0 47 13>,
15 <&iomuxc 13 61 4>,
16 <&iomuxc 19 67 4>,
17 <&iomuxc 24 72 1>;
23 gpio-ranges = <&iomuxc 4 74 5>,
24 <&iomuxc 9 80 16>;
30 gpio-ranges = <&iomuxc 1 98 2>,
31 <&iomuxc 3 101 1>,
32 <&iomuxc 5 107 8>;
38 gpio-ranges = <&iomuxc 0 115 4>,
[all …]
H A Dimx8qm-ss-lsio.dtsi9 gpio-ranges = <&iomuxc 0 0 6>,
10 <&iomuxc 6 7 22>,
11 <&iomuxc 28 36 4>;
16 gpio-ranges = <&iomuxc 0 40 4>,
17 <&iomuxc 4 50 12>,
18 <&iomuxc 16 63 8>,
19 <&iomuxc 24 72 8>;
24 gpio-ranges = <&iomuxc 0 80 4>,
25 <&iomuxc 4 85 18>,
26 <&iomuxc 22 104 10>;
[all …]
H A Dimx8qxp-ss-lsio.dtsi9 gpio-ranges = <&iomuxc 1 56 12>,
10 <&iomuxc 13 69 4>,
11 <&iomuxc 19 75 4>,
12 <&iomuxc 24 80 1>,
13 <&iomuxc 25 82 7>;
18 gpio-ranges = <&iomuxc 0 89 9>,
19 <&iomuxc 9 99 16>,
20 <&iomuxc 25 116 7>;
25 gpio-ranges = <&iomuxc 0 123 1>,
26 <&iomuxc 1 126 2>,
[all …]
/linux/Documentation/devicetree/bindings/soc/imx/
H A Dfsl,imx-iomuxc-gpr.yaml4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx-iomuxc-gpr.yaml#
13 i.MX Processors have an IOMUXC General Purpose Register group for
21 - fsl,imx6q-iomuxc-gpr
22 - fsl,imx8mq-iomuxc-gpr
27 - fsl,imx6sl-iomuxc-gpr
28 - fsl,imx6sll-iomuxc-gpr
29 - fsl,imx6ul-iomuxc-gpr
30 - const: fsl,imx6q-iomuxc-gpr
34 - fsl,imx6sx-iomuxc-gpr
35 - fsl,imx7d-iomuxc-gpr
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dfsl,imx35-pinctrl.yaml23 - fsl,imx35-iomuxc
24 - fsl,imx51-iomuxc
25 - fsl,imx53-iomuxc
26 - fsl,imx6dl-iomuxc
27 - fsl,imx6q-iomuxc
28 - fsl,imx6sl-iomuxc
29 - fsl,imx6sll-iomuxc
30 - fsl,imx6sx-iomuxc
31 - fsl,imx6ul-iomuxc
32 - fsl,imx6ull-iomuxc-snvs
[all …]
H A Dfsl,imx7d-pinctrl.yaml20 - fsl,imx7d-iomuxc
21 - fsl,imx7d-iomuxc-lpsr
28 phandle for main iomuxc controller which shares the input select
82 - fsl,imx7d-iomuxc-lpsr
92 iomuxc: pinctrl@30330000 {
93 compatible = "fsl,imx7d-iomuxc";
104 compatible = "fsl,imx7d-iomuxc-lpsr";
106 fsl,input-sel = <&iomuxc>;
H A Dfsl,imx27-pinctrl.txt4 - compatible: "fsl,imx27-iomuxc"
6 The iomuxc driver node should define subnodes containing of pinctrl configuration subnodes.
62 iomuxc: iomuxc@10015000 {
63 compatible = "fsl,imx27-iomuxc";
96 iomuxc: iomuxc@10015000 {
97 compatible = "fsl,imx27-iomuxc";
H A Dfsl,imx-pinctrl.txt1 * Freescale IOMUX Controller (IOMUXC) for i.MX
3 The IOMUX Controller (IOMUXC), together with the IOMUX, enables the IC
7 different PAD settings (like pull up, keeper, etc) the IOMUXC controls
21 - compatible: "fsl,<soc>-iomuxc"
68 iomuxc@20e0000 {
69 compatible = "fsl,imx6q-iomuxc";
90 Refer to the IOMUXC controller chapter in imx6q datasheet,
H A Dfsl,imx8m-pinctrl.yaml19 - fsl,imx8mm-iomuxc
20 - fsl,imx8mn-iomuxc
21 - fsl,imx8mp-iomuxc
22 - fsl,imx8mq-iomuxc
79 iomuxc: pinctrl@30330000 {
80 compatible = "fsl,imx8mm-iomuxc";
H A Dfsl,scu-pinctrl.yaml23 - fsl,imx8qm-iomuxc
24 - fsl,imx8qxp-iomuxc
25 - fsl,imx8dxl-iomuxc
66 compatible = "fsl,imx8qxp-iomuxc";
H A Dfsl,imxrt1050.yaml19 const: fsl,imxrt1050-iomuxc
70 iomuxc: iomuxc@401f8000 {
71 compatible = "fsl,imxrt1050-iomuxc";
H A Dfsl,imxrt1170.yaml19 const: fsl,imxrt1170-iomuxc
69 iomuxc: iomuxc@400e8000 {
70 compatible = "fsl,imxrt1170-iomuxc";
H A Dfsl,imx9-pinctrl.yaml22 - fsl,imx91-iomuxc
23 - fsl,imx93-iomuxc
76 iomuxc: pinctrl@443c0000 {
77 compatible = "fsl,imx93-iomuxc";
H A Dfsl,imx7ulp-pinctrl.txt3 i.MX 7ULP has three IOMUXC instances: IOMUXC0 for M4 ports, IOMUXC1 for A7
4 ports and IOMUXC DDR for DDR interface.
/linux/arch/arm/mach-imx/
H A Dmach-imx6q.c15 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
121 gpr = syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr"); in imx6q_1588_init()
127 pr_err("failed to find fsl,imx6q-iomuxc-gpr regmap\n"); in imx6q_1588_init()
141 gpr = syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr"); in imx6q_axi_init()
165 pr_warn("failed to find fsl,imx6q-iomuxc-gpr regmap\n"); in imx6q_axi_init()
H A Dsuspend-imx53.S53 ldr r5, [r2], #12 /* IOMUXC register offset */
81 ldr r5, [r2], #4 /* IOMUXC register offset */
108 ldr r5, [r2], #12 /* IOMUXC register offset */
H A Dmach-imx6sl.c9 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
23 gpr = syscon_regmap_lookup_by_compatible("fsl,imx6sl-iomuxc-gpr"); in imx6sl_fec_init()
H A Dmach-imx7d.c7 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h>
42 gpr = syscon_regmap_lookup_by_compatible("fsl,imx7d-iomuxc-gpr"); in imx7d_enet_clk_sel()
/linux/Documentation/devicetree/bindings/remoteproc/
H A Dfsl,imx-rproc.yaml76 fsl,iomuxc-gpr:
79 Phandle to IOMUXC GPR block which provide access to CM7 CPUWAIT bit.
101 fsl,iomuxc-gpr: false
/linux/drivers/phy/freescale/
H A Dphy-fsl-imx8m-pcie.c12 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h>
189 .gpr = "fsl,imx8mm-iomuxc-gpr",
194 .gpr = "fsl,imx8mp-iomuxc-gpr",
245 dev_err(dev, "unable to find iomuxc registers\n"); in imx8_pcie_phy_probe()
/linux/arch/arm/boot/dts/nxp/vf/
H A Dvfxxx.dtsi307 iomuxc: iomuxc@40048000 { label
308 compatible = "fsl,vf610-iomuxc";
320 gpio-ranges = <&iomuxc 0 0 32>;
331 gpio-ranges = <&iomuxc 0 32 32>;
342 gpio-ranges = <&iomuxc 0 64 32>;
353 gpio-ranges = <&iomuxc 0 96 32>;
364 gpio-ranges = <&iomuxc 0 128 7>;
/linux/drivers/pinctrl/freescale/
H A Dpinctrl-imx6ul.c316 .gpr_compatible = "fsl,imx6ul-iomuxc-gpr",
326 { .compatible = "fsl,imx6ul-iomuxc", .data = &imx6ul_pinctrl_info, },
327 { .compatible = "fsl,imx6ull-iomuxc-snvs", .data = &imx6ull_snvs_pinctrl_info, },

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