/freebsd/sys/contrib/device-tree/Bindings/soc/imx/ |
H A D | fsl,imx-iomuxc-gpr.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx-iomuxc-gpr.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Peng Fan <peng.fan@nxp.com> 13 i.MX Processors have an IOMUXC General Purpose Register group for 19 - items: 20 - const: fsl,imx8mq-iomuxc-gpr 21 - const: syscon 22 - const: simple-mfd [all …]
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/freebsd/sys/arm/freescale/imx/ |
H A D | imx6_machdep.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 67 * interrupt controller, which is for use when the chip is in deep-sleep mode. 68 * We don't support deep sleep or have a GPC-PIC driver; we need all interrupts 74 * set the world right by just changing the interrupt-parent property of the soc 83 * - SOC node exists and has GPC as its interrupt parent. 84 * - GPC node exists and has GIC as its interrupt parent. 85 * - GIC node exists and is its own interrupt parent or has no parent. 89 * per-soc logic. We handle this at platform attach time rather than via the 93 * This just in: as of the import of dts files from linux 4.15 on 2018-02-10, [all …]
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/freebsd/sys/contrib/device-tree/Bindings/display/imx/ |
H A D | hdmi.txt | 9 following device-specific properties. 14 - compatible : Shall be one of "fsl,imx6q-hdmi" or "fsl,imx6dl-hdmi". 15 - reg: See dw_hdmi.txt. 16 - interrupts: HDMI interrupt number 17 - clocks: See dw_hdmi.txt. 18 - clock-names: Shall contain "iahb" and "isfr" as defined in dw_hdmi.txt. 19 - ports: See dw_hdmi.txt. The DWC HDMI shall have between one and four ports, 22 - gpr : Shall contain a phandle to the iomuxc-gpr region containing the HDMI 27 - ddc-i2c-bus: The HDMI DDC bus can be connected to either a system I2C master 28 or the functionally-reduced I2C master contained in the DWC HDMI. When [all …]
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H A D | ldb.txt | 1 Device-Tree bindings for LVDS Display Bridge (ldb) 6 The LVDS Display Bridge device tree node contains up to two lvds-channel 10 - #address-cells : should be <1> 11 - #size-cells : should be <0> 12 - compatible : should be "fsl,imx53-ldb" or "fsl,imx6q-ldb". 16 - gpr : should be <&gpr> on i.MX53 and i.MX6q. 17 The phandle points to the iomuxc-gpr region containing the LVDS 19 - clocks, clock-names : phandles to the LDB divider and selector clocks and to 21 Documentation/devicetree/bindings/clock/clock-bindings.txt 23 "di0_pll" - LDB LVDS channel 0 mux [all …]
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H A D | fsl,imx6-hdmi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/imx/fsl,imx6-hdm [all...] |
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/ |
H A D | imx6sl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/interrupt-controller/irq.h> 6 #include "imx6sl-pinfunc.h" 7 #include <dt-bindings/clock/imx6sl-clock.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 14 * pre-existing /chosen node to be available to insert the 50 #address-cells = <1>; 51 #size-cells = <0>; 54 compatible = "arm,cortex-a9"; [all …]
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H A D | imx6ul.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/clock/imx6ul-clock.h> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gi 736 iomuxc: pinctrl@20e0000 { global() label 741 gpr: iomuxc-gpr@20e4000 { global() label [all...] |
H A D | imx6sll.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 * Copyright 2017-2018 NXP. 8 #include <dt-bindings/clock/imx6sll-clock.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include "imx6sll-pinfunc.h" 14 #address-cells = <1>; 15 #size-cells = <1>; 46 #address-cells = <1>; 47 #size-cells = <0>; [all …]
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H A D | imx7s.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 6 #include <dt-bindings/clock/imx7d-clock.h> 7 #include <dt-bindings/power/imx7-power.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-binding 503 iomuxc: pinctrl@30330000 { global() label 508 gpr: iomuxc-gpr@30340000 { global() label [all...] |
H A D | imx6sx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/clock/imx6sx-clock.h> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gi 839 iomuxc: pinctrl@20e0000 { global() label 844 gpr: syscon@20e4000 { global() label [all...] |
H A D | imx6dl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/interrupt-controller/irq.h> 6 #include "imx6dl-pinfunc.h" 15 #address-cells = <1>; 16 #size-cells = <0>; 19 compatible = "arm,cortex-a9"; 22 next-level-cache = <&L2>; 23 operating-points = < 29 fsl,soc-operating-points = < 30 /* ARM kHz SOC-PU uV */ [all …]
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H A D | imx53.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include "imx53-pinfunc.h" 7 #include <dt-bindings/clock/imx5-clock.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controlle 461 iomuxc: iomuxc@53fa8000 { global() label 466 gpr: iomuxc-gpr@53fa8000 { global() label [all...] |
H A D | imx6qdl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/clock/imx6qdl-clock.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #address-cell 906 gpr: iomuxc-gpr@20e0000 { global() label 916 iomuxc: pinctrl@20e0000 { global() label [all...] |
H A D | imx6q.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/interrupt-controller/irq.h> 6 #include "imx6q-pinfunc.h" 16 #address-cells = <1>; 17 #size-cells = <0>; 20 compatible = "arm,cortex-a9"; 23 next-level-cache = <&L2>; 24 operating-points = < 32 fsl,soc-operating-points = < 33 /* ARM kHz SOC-PU uV */ [all …]
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H A D | imx6qdl-dhcom-som.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright (C) 2015-2021 DH electronics GmbH 7 #include <dt-bindings/pwm/pwm.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/clock/imx6qdl-clock.h> 10 #include <dt-bindings/input/input.h> 30 memory@10000000 { /* Appropriate memory size will be filled by U-Boot */ 35 reg_3p3v: regulator-3P3V { 36 compatible = "regulator-fixed"; 37 regulator-always-on; [all …]
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H A D | imx6qdl-apalis.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 3 * Copyright 2014-2022 Toradex 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/pwm/pwm.h> 19 /delete-property/ mmc3; 29 compatible = "pwm-backligh [all...] |
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
H A D | fsl,imx27-pinctrl.txt | 4 - compatible: "fsl,imx27-iomuxc" 6 The iomuxc driver node should define subnodes containing of pinctrl configuration subnodes. 9 - fsl,pins: three integers array, represents a group of pins mux and config 21 0 - Primary function 22 1 - Alternate function 23 2 - GPIO 24 Registers: GIUS (GPIO In Use), GPR (General Purpose Register) 28 0 - Input 29 1 - Output 37 0 - A_IN [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
H A D | imx8mn.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mn-clock.h> 7 #include <dt-bindings/power/imx8mn-power.h> 8 #include <dt-bindings/reset/imx8mq-reset.h> 9 #include <dt-binding 557 iomuxc: pinctrl@30330000 { global() label 562 gpr: syscon@30340000 { global() label [all...] |
H A D | imx8mp.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mp-clock.h> 7 #include <dt-bindings/power/imx8mp-power.h> 8 #include <dt-bindings/reset/imx8mp-reset.h> 9 #include <dt-binding 640 iomuxc: pinctrl@30330000 { global() label 645 gpr: syscon@30340000 { global() label [all...] |
H A D | imx8mq-tqma8mq.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright 2019-2021 TQ-Systems GmbH 9 model = "TQ-Systems GmbH i.MX8MQ TQMa8MQ"; 10 compatible = "tq,imx8mq-tqma8mq", "fsl,imx8mq"; 18 /* e-MMC IO, needed for HS modes */ 19 reg_vcc1v8: regulator-vcc1v8 { 20 compatible = "regulator-fixed"; 21 regulator-name = "TQMA8MX_VCC1V8"; 22 regulator-min-microvolt = <1800000>; 23 regulator-max-microvolt = <1800000>; [all …]
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H A D | imx8mm.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mm-clock.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/interrupt-controller/arm-gi 550 iomuxc: pinctrl@30330000 { global() label 555 gpr: syscon@30340000 { global() label [all...] |
H A D | imx8mq.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 * Copyright (C) 2017-2018 Pengutronix, Lucas Stach <kernel@pengutronix.de> 7 #include <dt-bindings/clock/imx8mq-clock.h> 8 #include <dt-bindings/power/imx8mq-power.h> 9 #include <dt-bindings/reset/imx8mq-rese 574 iomuxc: pinctrl@30330000 { global() label [all...] |