| /freebsd/sys/contrib/device-tree/Bindings/iommu/ |
| H A D | iommu.txt | 5 IOMMU device node:
8 An IOMMU can provide the following services:
13 Example: 32-bit DMA to 64-bit physical addresses
15 * Implement scatter-gather at page level granularity so that the device does
19 through the IOMMU and faulting when encountering accesses to unmapped
29 IOMMUs can be single-master or multiple-master. Single-master IOMMU devices
30 typically have a fixed association to the master device, whereas multiple-
31 master IOMMU devices can translate accesses from more than one master.
33 The device tree node of the IOMMU device's parent bus must contain a valid
34 "dma-ranges" property that describes how the physical address space of the
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| H A D | ti,omap-iommu.txt | 1 OMAP2+ IOMMU
4 - compatible : Should be one of,
5 "ti,omap2-iommu" for OMAP2/OMAP3 IOMMU instances
6 "ti,omap4-iommu" for OMAP4/OMAP5 IOMMU instances
7 "ti,dra7-dsp-iommu" for DRA7xx DSP IOMMU instances
8 "ti,dra7-iommu" for DRA7xx IOMMU instances
9 - ti,hwmods : Name of the hwmod associated with the IOMMU instance
10 - reg : Address space for the configuration registers
11 - interrupts : Interrupt specifier for the IOMMU instance
12 - #iommu-cells : Should be 0. OMAP IOMMUs are all "single-master" devices,
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| H A D | rockchip,iommu.txt | 1 Rockchip IOMMU
4 A Rockchip DRM iommu translates io virtual addresses to physical addresses for
9 - compatible : Should be "rockchip,iommu"
10 - reg : Address space for the configuration registers
11 - interrupts : Interrupt specifier for the IOMMU instance
12 - interrupt-names : Interrupt name for the IOMMU instance
13 - #iommu-cells : Should be <0>. This indicates the iommu is a
14 "single-master" device, and needs no additional information
16 Documentation/devicetree/bindings/iommu/iommu.txt
17 - clocks : A list of clocks required for the IOMMU to be accessible by
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| H A D | qcom,apq8064-iommu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $id: http://devicetree.org/schemas/iommu/qcom,apq8064-iommu.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Qualcomm APQ8064 IOMMU
11 - David Heidelberg <david@ixit.cz>
14 The MSM IOMMU is an implementation compatible with the ARM VMSA short
16 outside of the CPU, each connected to the IOMMU through a port called micro-TLB.
20 const: qcom,apq8064-iommu
24 - description: interface clock for register accesses
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| H A D | arm,smmu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/iommu/arm,smmu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Will Deacon <will@kernel.org>
11 - Robin Murphy <Robin.Murphy@arm.com>
23 pattern: "^iommu@[0-9a-f]*"
26 - description: Qcom SoCs implementing "arm,smmu-v2"
28 - enum:
29 - qcom,msm8996-smmu-v2
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| /freebsd/sys/contrib/device-tree/Bindings/pci/ |
| H A D | pci-iommu.txt | 2 relationship between PCI(e) devices and IOMMU(s).
17 Requester ID. While a given PCI device can only master through one IOMMU, a
18 root complex may split masters across a set of IOMMUs (e.g. with one IOMMU per
22 and a mechanism is required to map from a PCI device to its IOMMU and sideband
25 For generic IOMMU bindings, see
26 Documentation/devicetree/bindings/iommu/iommu.txt.
33 -------------------
35 - iommu-map: Maps a Requester ID to an IOMMU and associated IOMMU specifier
39 (rid-base,iommu,iommu-base,length).
41 Any RID r in the interval [rid-base, rid-base + length) is associated with
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| /freebsd/sys/contrib/device-tree/Bindings/misc/ |
| H A D | fsl,qoriq-mc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/misc/fsl,qoriq-mc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
13 The Freescale Management Complex (fsl-mc) is a hardware resource
15 network-oriented packet processing applications. After the fsl-mc
22 For an overview of the DPAA2 architecture and fsl-mc bus see:
26 same hardware "isolation context" and a 10-bit value called an ICID
31 between ICIDs and IOMMUs, so an iommu-map property is used to define
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| H A D | fsl,qoriq-mc.txt | 3 The Freescale Management Complex (fsl-mc) is a hardware resource
5 network-oriented packet processing applications. After the fsl-mc
12 For an overview of the DPAA2 architecture and fsl-mc bus see:
16 same hardware "isolation context" and a 10-bit value called an ICID
21 between ICIDs and IOMMUs, so an iommu-map property is used to define
23 an IOMMU.
25 For generic IOMMU bindings, see
26 Documentation/devicetree/bindings/iommu/iommu.txt.
28 For arm-smmu binding, see:
29 Documentation/devicetree/bindings/iommu/arm,smmu.yaml.
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| /freebsd/sys/contrib/device-tree/Bindings/display/ |
| H A D | arm,komeda.txt | 4 - compatible: Should be "arm,mali-d71"
5 - reg: Physical base address and length of the registers in the system
6 - interrupts: the interrupt line number of the device in the system
7 - clocks: A list of phandle + clock-specifier pairs, one for each entry
8 in 'clock-names'
9 - clock-names: A list of clock names. It should contain:
10 - "aclk": for the main processor clock
11 - #address-cells: Must be 1
12 - #size-cells: Must be 0
13 - iommus: configure the stream id to IOMMU, Must be configured if want to
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| /freebsd/sys/contrib/device-tree/Bindings/reserved-memory/ |
| H A D | reserved-memory.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reserved-memory/reserved-memory.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: /reserved-memory Child Node Common
10 - devicetree-spec@vger.kernel.org
13 Reserved memory is specified as a node under the /reserved-memory node. The
19 Each child of the reserved-memory node specifies one or more regions
25 Following the generic-names recommended practice, node names should
26 reflect the purpose of the node (ie. "framebuffer" or "dma-pool").
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| /freebsd/sys/contrib/device-tree/Bindings/media/ |
| H A D | ti,omap3isp.txt | 4 The DT definitions can be found in include/dt-bindings/media/omap3-isp.h.
9 compatible : must contain "ti,omap3-isp"
15 interrupts : the ISP interrupt specifier
16 iommus : phandle and IOMMU specifier for the IOMMU that serves the ISP
17 syscon : the phandle and register offset to the Complex I/O or CSI-PHY
19 ti,phy-type : 0 -- OMAP3ISP_PHY_TYPE_COMPLEX_IO (e.g. 3430)
20 1 -- OMAP3ISP_PHY_TYPE_CSIPHY (e.g. 3630)
21 #clock-cells : Must be 1 --- the ISP provides two external clocks,
24 clock bindings in ../clock/clock-bindings.txt.
27 ---------------------
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| H A D | qcom,camss.txt | 5 - compatible:
9 - "qcom,msm8916-camss"
10 - "qcom,msm8996-camss"
11 - "qcom,sdm660-camss"
12 - reg:
14 Value type: <prop-encoded-array>
15 Definition: Register ranges as listed in the reg-names property.
16 - reg-names:
20 - "csiphy0"
21 - "csiphy0_clk_mux"
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| H A D | samsung,fimc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schema
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| /freebsd/sys/contrib/device-tree/Bindings/memory-controllers/ |
| H A D | nvidia,tegra20-mc.txt | 4 - compatible : "nvidia,tegra20-mc-gart"
5 - reg : Should contain 2 register ranges: physical base address and length of
7 - clocks: Must contain an entry for each entry in clock-names.
8 See ../clocks/clock-bindings.txt for details.
9 - clock-names: Must include the following entries:
10 - mc: the module's clock input
11 - interrupts : Should contain MC General interrupt.
12 - #reset-cells : Should be 1. This cell represents memory client module ID.
13 The assignments may be found in header file <dt-bindings/memory/tegra20-mc.h>
15 - #iommu-cells: Should be 0. This cell represents the number of cells in an
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| /freebsd/sys/contrib/device-tree/Bindings/display/mediatek/ |
| H A D | mediatek,wdma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
24 - enum:
25 - mediatek,mt8173-disp-wdma
26 - items:
27 - const: mediatek,mt6795-disp-wdma
28 - const: mediatek,mt8173-disp-wdma
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| H A D | mediatek,ovl-2l.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,ovl-2l.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
14 Mediatek display overlay 2 layer, namely OVL-2L, provides 2 more layer
16 OVL-2L device node must be siblings to the central MMSYS_CONFIG node.
24 - enum:
25 - mediatek,mt8183-disp-ovl-2l
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| H A D | mediatek,ovl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
24 - enum:
25 - mediatek,mt2701-disp-ovl
26 - mediatek,mt8173-disp-ovl
27 - mediatek,mt8183-disp-ovl
28 - mediatek,mt8192-disp-ovl
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| H A D | mediatek,rdma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
15 data into DMA. It provides real time data to the back-end panel
26 - enum:
27 - mediatek,mt2701-disp-rdma
28 - mediatek,mt8173-disp-rdma
29 - mediatek,mt8183-disp-rdma
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| /freebsd/sys/contrib/device-tree/Bindings/powerpc/fsl/ |
| H A D | srio-rmu.txt | 5 node is composed of three types of sub-nodes ("fsl-srio-msg-unit",
6 "fsl-srio-dbell-unit" and "fsl-srio-port-write-unit").
10 - compatible
13 Definition: Must include "fsl,srio-rmu-vX.Y", "fsl,srio-rmu".
18 - reg
20 Value type: <prop-encoded-array>
25 - fsl,liodn
26 Usage: optional-but-recommended (for devices with PAMU)
27 Value type: <prop-encoded-array>
28 Definition: The logical I/O device number for the PAMU (IOMMU) to be
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| H A D | srio.txt | 5 - compatible
11 Optionally, a compatible string of "fsl,srio-vX.Y" where X is Major
15 - reg
17 Value type: <prop-encoded-array>
22 - interrupts
24 Value type: <prop_encoded-array>
27 specifier. The format of the specifier is defined by the
31 property. (Typically shared with port-write).
33 - fsl,srio-rmu-handle:
37 (See srio-rmu.txt for more details on RMU node binding)
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| /freebsd/sys/contrib/device-tree/Bindings/display/msm/ |
| H A D | dpu.txt | 6 sub-blocks like DPU display controller, DSI and DP interfaces etc.
11 - compatible: "qcom,sdm845-mdss", "qcom,sc7180-mdss"
12 - reg: physical base address and length of controller's registers.
13 - reg-names: register region names. The following region is required:
15 - power-domains: a power domain consumer specifier according to
17 - clocks: list of clock specifiers for clocks needed by the device.
18 - clock-names: device clock names, must be in same order as clocks property.
23 - interrupts: interrupt signal from MDSS.
24 - interrupt-controller: identifies the node as an interrupt controller.
25 - #interrupt-cells: specifies the number of cells needed to encode an interrupt
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| /freebsd/sys/contrib/device-tree/Bindings/net/wireless/ |
| H A D | qcom,ath10k.txt | 4 - compatible: Should be one of the following:
6 * "qcom,ipq4019-wifi"
7 * "qcom,wcn3990-wifi"
10 data along with board specific data via "qcom,ath10k-calibration-data".
13 AHB based devices (i.e. ipq4019) uses compatible string "qcom,ipq4019-wifi"
15 "qcom,ath10k-calibration-data"). It uses "qcom,ath10k-pre-calibration-data"
18 In general, entry "qcom,ath10k-pre-calibration-data" and
19 "qcom,ath10k-calibration-data" conflict with each other and only one
22 SNOC based devices (i.e. wcn3990) uses compatible string "qcom,wcn3990-wifi".
24 - reg: Address and length of the register set for the device.
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| /freebsd/sys/contrib/device-tree/Bindings/remoteproc/ |
| H A D | ti,omap-remoteproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,omap-remotepro
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| /freebsd/sys/dev/ofw/ |
| H A D | ofw_bus_subr.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2001 - 2003 by Thomas Moestl <tmm@FreeBSD.org>.
59 if ((OF_getprop_alloc(node, "name", (void **)&obd->obd_name)) == -1) in ofw_bus_gen_setup_devinfo()
61 OF_getprop_alloc(node, "compatible", (void **)&obd->obd_compat); in ofw_bus_gen_setup_devinfo()
62 OF_getprop_alloc(node, "device_type", (void **)&obd->obd_type); in ofw_bus_gen_setup_devinfo()
63 OF_getprop_alloc(node, "model", (void **)&obd->obd_model); in ofw_bus_gen_setup_devinfo()
64 OF_getprop_alloc(node, "status", (void **)&obd->obd_status); in ofw_bus_gen_setup_devinfo()
65 obd->obd_node = node; in ofw_bus_gen_setup_devinfo()
75 if (obd->obd_compat != NULL) in ofw_bus_gen_destroy_devinfo()
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| /freebsd/sys/contrib/dev/acpica/ |
| H A D | changes.txt | 1 ----------------------------------------
6 Added option to skip the global lock for SMM - Huacai Chen
8 Fixed non-NUL terminated string implementations - Ahmed Salem
10 Fixed CCEL and CDAT templates - Ahmed Salem
12 …ethod parameters (definition) vs arguments (invocation) in different places - Peter Williams, Hans…
14 Define distinct D3 states (D3Hot and D3Cold) that help clarify the device behavior support - Aymeri…
19 ----------------------------------------
26 Add complete support for 3 new ACPI tables - MRRM,ERDT and RIMT (Tony Luck & V L Sunil)
32 A few fixes including local cache allocation, FFixedHW Region, attribute packing, string vs. non-st…
35 ----------------------------------------
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