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Searched +full:iommu +full:- +full:ctx (Results 1 – 25 of 33) sorted by relevance

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/freebsd/sys/x86/iommu/
H A Dintel_ctx.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
66 #include <dev/iommu/busdma_iommu.h>
67 #include <x86/iommu/intel_reg.h>
68 #include <x86/iommu/x86_iommu.h>
69 #include <x86/iommu/intel_dmar.h>
78 static void dmar_free_ctx_locked(struct dmar_unit *dmar, struct dmar_ctx *ctx);
90 ctxm = iommu_pgalloc(dmar->ctx_obj, 1 + bus, IOMMU_PGF_NOALLOC); in dmar_ensure_ctx_page()
101 ctxm = iommu_pgalloc(dmar->ctx_obj, 1 + bus, IOMMU_PGF_ZERO | in dmar_ensure_ctx_page()
103 re = iommu_map_pgtbl(dmar->ctx_obj, 0, IOMMU_PGF_NOALLOC, &sf); in dmar_ensure_ctx_page()
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H A Damd_ctx.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
66 #include <dev/iommu/busdma_iommu.h>
67 #include <x86/iommu/amd_reg.h>
68 #include <x86/iommu/x86_iommu.h>
69 #include <x86/iommu/amd_iommu.h>
71 static MALLOC_DEFINE(M_AMDIOMMU_CTX, "amdiommu_ctx", "AMD IOMMU Context");
72 static MALLOC_DEFINE(M_AMDIOMMU_DOMAIN, "amdiommu_dom", "AMD IOMMU Domain");
78 amdiommu_get_dtep(struct amdiommu_ctx *ctx) in amdiommu_get_dtep() argument
80 return (&CTX2AMD(ctx)->dev_tbl[ctx->context.rid]); in amdiommu_get_dtep()
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H A Damd_intrmap.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
71 #include <dev/iommu/busdma_iommu.h>
72 #include <x86/iommu/amd_reg.h>
73 #include <x86/iommu/x86_iommu.h>
74 #include <x86/iommu/amd_iommu.h>
78 static void amdiommu_ir_free_irte(struct amdiommu_ctx *ctx, device_t src,
84 struct amdiommu_ctx *ctx; in amdiommu_alloc_msi_intr() local
89 ctx = amdiommu_ir_find(src, NULL, NULL); in amdiommu_alloc_msi_intr()
90 if (ctx == NULL || !CTX2AMD(ctx)->irte_enabled) { in amdiommu_alloc_msi_intr()
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H A Dintel_fault.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
55 #include <x86/iommu/intel_reg.h>
56 #include <dev/iommu/busdma_iommu.h>
57 #include <x86/iommu/x86_iommu.h>
58 #include <x86/iommu/intel_dmar.h>
64 * unit->fault_log, and schedules a task.
69 * register file. The task is usually long-running, since printf() is
84 if (faultp == unit->fault_log_size) in dmar_fault_next()
96 printf("DMAR%d: Invalidation timed out\n", unit->iommu.unit); in dmar_fault_intr_clear()
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H A Damd_cmd.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
56 #include <dev/iommu/busdma_iommu.h>
57 #include <x86/iommu/amd_reg.h>
58 #include <x86/iommu/x86_iommu.h>
59 #include <x86/iommu/amd_iommu.h>
66 unit->hw_ctrl |= AMDIOMMU_CTRL_CMDBUF_EN; in amdiommu_enable_cmdbuf()
67 amdiommu_write8(unit, AMDIOMMU_CTRL, unit->hw_ctrl); in amdiommu_enable_cmdbuf()
75 unit->hw_ctrl &= ~AMDIOMMU_CTRL_CMDBUF_EN; in amdiommu_disable_cmdbuf()
76 amdiommu_write8(unit, AMDIOMMU_CTRL, unit->hw_ctrl); in amdiommu_disable_cmdbuf()
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H A Damd_iommu.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
34 #include <dev/iommu/iommu.h>
46 u_int refs; /* (u) Refs, including ctx */
47 LIST_ENTRY(amdiommu_domain) link;/* (u) Member in the iommu list */
61 struct iommu_unit iommu; member
104 #define AMD2IOMMU(unit) (&((unit)->iommu))
106 __containerof((unit), struct amdiommu_unit, iommu)
108 #define AMDIOMMU_LOCK(unit) mtx_lock(&AMD2IOMMU(unit)->lock)
109 #define AMDIOMMU_UNLOCK(unit) mtx_unlock(&AMD2IOMMU(unit)->lock)
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H A Diommu_utils.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
66 #include <dev/iommu/busdma_iommu.h>
67 #include <dev/iommu/iommu.h>
68 #include <x86/iommu/x86_iommu.h>
69 #include <x86/iommu/iommu_intrmap.h>
101 if (zeroed && (m->flags & PG_ZERO) == 0) in iommu_pgalloc()
127 SLIST_INSERT_HEAD(&entry->pgtbl_free, m, plinks.s.ss); in iommu_pgfree()
164 iommu_pgfree(obj, m->pindex, flags | IOMMU_PGF_OBJL, in iommu_map_pgtbl()
194 "Count of pages used for IOMMU pagetables");
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H A Dintel_dmar.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2013-2015 The FreeBSD Foundation
34 #include <dev/iommu/iommu.h>
40 * (u) - Protected by iommu unit lock
41 * (d) - Protected by domain lock
42 * (c) - Immutable after initialization
46 * The domain abstraction. Most non-constant members of the domain
65 u_int refs; /* (u) Refs, including ctx */
77 #define DMAR_DOMAIN_PGLOCK(dom) VM_OBJECT_WLOCK((dom)->pgtbl_obj)
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H A Damd_event.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
66 #include <dev/iommu/iommu.h>
67 #include <dev/iommu/busdma_iommu.h>
68 #include <x86/iommu/amd_reg.h>
69 #include <x86/iommu/x86_iommu.h>
70 #include <x86/iommu/amd_iommu.h>
82 unit->event_log_head++; in amdiommu_event_log_inc_head()
83 if (unit->event_log_head >= unit->event_log_size) in amdiommu_event_log_inc_head()
84 unit->event_log_head = 0; in amdiommu_event_log_inc_head()
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H A Dx86_iommu.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2013-2015, 2024 The FreeBSD Foundation
40 #define IOMMU_PAGE_MASK (IOMMU_PAGE_SIZE - 1)
44 #define IOMMU_PTEMASK (IOMMU_NPTEPG - 1)
67 iommu_unit *iommu);
68 void (*unit_pre_instantiate_ctx)(struct iommu_unit *iommu);
80 struct iommu_ctx *(*get_ctx)(struct iommu_unit *iommu,
82 void (*free_ctx_locked)(struct iommu_unit *iommu,
127 * 8-bytes write. Due to little-endian, and use of 4-byte
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H A Dintel_drv.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2013-2015 The FreeBSD Foundation
71 #include <dev/iommu/busdma_iommu.h>
72 #include <x86/iommu/intel_reg.h>
73 #include <x86/iommu/x86_iommu.h>
74 #include <x86/iommu/intel_dmar.h>
104 ptrend = (char *)dmartbl + dmartbl->Header.Length; in dmar_iterate_tbl()
109 if (dmarh->Length <= 0) { in dmar_iterate_tbl()
111 dmarh->Length); in dmar_iterate_tbl()
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H A Dintel_utils.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
64 #include <dev/iommu/busdma_iommu.h>
65 #include <x86/iommu/intel_reg.h>
66 #include <x86/iommu/x86_iommu.h>
67 #include <x86/iommu/intel_dmar.h>
102 * 6-level paging (DMAR_CAP_SAGAW_6LVL) is not supported on any
103 * current VT-d hardware and its SAGAW field value is listed as
104 * reserved in the VT-d spec. If support is added in the future,
118 if ((DMAR_CAP_SAGAW(unit->hw_cap) & sagaw_bits[i].cap) != 0) in dmar_pglvl_supported()
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/freebsd/sys/contrib/device-tree/Bindings/iommu/
H A Dqcom,iommu.txt1 * QCOM IOMMU v1 Implementation
3 Qualcomm "B" family devices which are not compatible with arm-smmu have
4 a similar looking IOMMU but without access to the global register space,
6 to non-secure vs secure interrupt line.
10 - compatible : Should be one of:
12 "qcom,msm8916-iommu"
13 "qcom,msm8953-iommu"
15 Followed by "qcom,msm-iommu-v1".
17 - clock-names : Should be a pair of "iface" (required for IOMMUs
21 - clocks : Phandles for respective clocks described by
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H A Dqcom,iommu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iommu/qco
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/freebsd/sys/dev/iommu/
H A Dbusdma_iommu.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
59 #include <dev/iommu/iommu.h>
63 #include <machine/iommu.h>
64 #include <dev/iommu/busdma_iommu.h>
68 * IOMMU units from Intel VT-d.
78 static const char iommu_str[] = "iommu"; in iommu_bus_dma_is_dev_disabled()
110 * the IOMMU unit and used for page table lookup. PCI bridges may take
114 * domain, and must collectively be assigned to use either IOMMU or
139 * host port to find the translating bridge nearest the IOMMU in iommu_get_requester()
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H A Diommu.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
37 #include <dev/iommu/iommu_types.h>
87 * entries. This is a client-controlled quirk to support some
102 * (u) - Protected by iommu unit lock
103 * (d) - Protected by domain lock
104 * (c) - Immutable after initialization
108 struct iommu_unit *iommu; /* (c) */ member
120 struct iommu_map_entry *msi_entry; /* (d) Arch-specific */
121 iommu_gaddr_t msi_base; /* (d) Arch-specific */
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H A Dbusdma_iommu.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
34 #include <dev/iommu/iommu.h>
35 #include <dev/iommu/iommu_gas.h>
39 struct iommu_ctx *ctx; member
61 #define IOMMU_DMAMAP_INIT(map) mtx_init(&(map)->lock, \
62 "iommu dmamap", NULL, MTX_DEF)
63 #define IOMMU_DMAMAP_DESTROY(map) mtx_destroy(&(map)->lock)
64 #define IOMMU_DMAMAP_LOCK(map) mtx_lock(&(map)->lock)
65 #define IOMMU_DMAMAP_UNLOCK(map) mtx_unlock(&(map)->lock)
H A Diommu_gas.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
60 #include <dev/iommu/iommu.h>
61 #include <dev/iommu/iommu_gas.h>
62 #include <dev/iommu/iommu_msi.h>
66 #include <machine/iommu.h>
67 #include <dev/iommu/busdma_iommu.h>
100 SLIST_INIT(&res->pgtbl_free); in iommu_gas_alloc_entry()
102 res->domain = domain; in iommu_gas_alloc_entry()
103 atomic_add_int(&domain->entries_cnt, 1); in iommu_gas_alloc_entry()
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H A Diommu_msi.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
34 #include <dev/iommu/iommu_types.h>
41 int iommu_map_msi(struct iommu_ctx *ctx, iommu_gaddr_t size, int offset,
43 void iommu_unmap_msi(struct iommu_ctx *ctx);
/freebsd/sys/arm64/iommu/
H A Diommu.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
8 * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
54 #include <dev/iommu/busdma_iommu.h>
63 #include "iommu.h"
66 static MALLOC_DEFINE(M_IOMMU, "IOMMU", "IOMMU framework");
77 struct iommu_unit *iommu; member
86 struct iommu_unit *iommu; in iommu_domain_unmap_buf() local
89 iommu = iodom->iommu; in iommu_domain_unmap_buf()
90 error = IOMMU_UNMAP(iommu->dev, iodom, entry->start, entry->end - in iommu_domain_unmap_buf()
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H A Dsmmu_quirks.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
45 #include <dev/iommu/iommu.h>
68 struct smmu_ctx *ctx; in smmu_quirks_check() local
71 ctx = smmu_ctx_lookup_by_sid(dev, sid); in smmu_quirks_check()
72 if (!ctx) in smmu_quirks_check()
77 if (ctx->vendor == q->vendor && in smmu_quirks_check()
78 ctx->device == q->device && in smmu_quirks_check()
79 input_addr == q->input_address && in smmu_quirks_check()
80 event_id == q->event_id) in smmu_quirks_check()
H A Dsmmu.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2019-2020 Ruslan Bukin <br@bsdpad.com>
8 * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
39 * In case of PCI-based devices, StreamID is a PCI rid.
42 * which contains per-device configuration.
44 * Stream table is a linear or 2-level walk table (this driver supports both).
67 * Register interface and Memory-based circular buffer queues are used
79 * in a producer-consumer fashion so that an output queue contains data
112 #include <dev/iommu/iommu.h>
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/freebsd/sys/amd64/vmm/amd/
H A Damdvi_hw.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
55 #include "io/iommu.h"
63 #define MOD_DEC(a, s, m) (((a) - (s)) % ((m) * (s)))
127 return (pci_cfgregread(softc->pci_seg, PCI_RID2BUS(softc->pci_rid), in amdvi_pci_read()
128 PCI_RID2SLOT(softc->pci_rid), PCI_RID2FUNC(softc->pci_rid), in amdvi_pci_read()
136 * If ATS is absent or disabled, return (-1), otherwise ATS
144 int qlen = -1; in amdvi_find_ats_qlen()
150 return (-1); in amdvi_find_ats_qlen()
158 printf("AMD-Vi: PCI device %d.%d.%d ATS %s qlen=%d\n", in amdvi_find_ats_qlen()
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dmsm8916.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
6 #include <dt-bindings/arm/coresight-cti-dt.h>
7 #include <dt-bindings/clock/qcom,gcc-msm891
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H A Dmsm8939.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2020-2023, Linaro Limited
7 #include <dt-bindings/clock/qcom,gcc-msm8939.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-binding
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