1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
34 #include <dev/iommu/iommu.h>
46 	u_int refs;			/* (u) Refs, including ctx */
47 	LIST_ENTRY(amdiommu_domain) link;/* (u) Member in the iommu list */
61 	struct iommu_unit iommu;  member
104 #define	AMD2IOMMU(unit)	(&((unit)->iommu))
106 	__containerof((unit), struct amdiommu_unit, iommu)
108 #define	AMDIOMMU_LOCK(unit)		mtx_lock(&AMD2IOMMU(unit)->lock)
109 #define	AMDIOMMU_UNLOCK(unit)		mtx_unlock(&AMD2IOMMU(unit)->lock)
110 #define	AMDIOMMU_ASSERT_LOCKED(unit)	mtx_assert(&AMD2IOMMU(unit)->lock, \
113 #define	AMDIOMMU_EVENT_LOCK(unit)	mtx_lock_spin(&(unit)->event_lock)
114 #define	AMDIOMMU_EVENT_UNLOCK(unit)	mtx_unlock_spin(&(unit)->event_lock)
116     mtx_assert(&(unit)->event_lock, MA_OWNED)
118 #define	DOM2IODOM(domain)	(&((domain)->iodom))
122 #define	CTX2IOCTX(ctx)		(&((ctx)->context))  argument
123 #define	IOCTX2CTX(ctx)		\  argument
124 	__containerof((ctx), struct amdiommu_ctx, context)
126 #define	CTX2DOM(ctx)		IODOM2DOM((ctx)->context.domain)  argument
127 #define	CTX2AMD(ctx)		(CTX2DOM(ctx)->unit)  argument
128 #define	DOM2AMD(domain)		((domain)->unit)
130 #define	AMDIOMMU_DOMAIN_LOCK(dom)	mtx_lock(&(dom)->iodom.lock)
131 #define	AMDIOMMU_DOMAIN_UNLOCK(dom)	mtx_unlock(&(dom)->iodom.lock)
133 	mtx_assert(&(dom)->iodom.lock, MA_OWNED)
135 #define	AMDIOMMU_DOMAIN_PGLOCK(dom)	VM_OBJECT_WLOCK((dom)->pgtbl_obj)
136 #define	AMDIOMMU_DOMAIN_PGTRYLOCK(dom)	VM_OBJECT_TRYWLOCK((dom)->pgtbl_obj)
137 #define	AMDIOMMU_DOMAIN_PGUNLOCK(dom)	VM_OBJECT_WUNLOCK((dom)->pgtbl_obj)
139 	VM_OBJECT_ASSERT_WLOCKED((dom)->pgtbl_obj)
147 	return (bus_read_4(unit->mmio_res, reg));  in amdiommu_read4()
156 	low = bus_read_4(unit->mmio_res, reg);  in amdiommu_read8()
157 	high = bus_read_4(unit->mmio_res, reg + 4);  in amdiommu_read8()
160 	return (bus_read_8(unit->mmio_res, reg));  in amdiommu_read8()
167 	bus_write_4(unit->mmio_res, reg, val);  in amdiommu_write4()
178 	bus_write_4(unit->mmio_res, reg, low);  in amdiommu_write8()
179 	bus_write_4(unit->mmio_res, reg + 4, high);  in amdiommu_write8()
181 	bus_write_8(unit->mmio_res, reg, val);  in amdiommu_write8()
209 int amdiommu_ctx_init_irte(struct amdiommu_ctx *ctx);
210 void amdiommu_ctx_fini_irte(struct amdiommu_ctx *ctx);
219 struct iommu_ctx *amdiommu_get_ctx(struct iommu_unit *iommu, device_t dev,
223 void amdiommu_free_ctx_locked_method(struct iommu_unit *iommu,
228 void amdiommu_qi_invalidate_ctx_locked(struct amdiommu_ctx *ctx);
229 void amdiommu_qi_invalidate_ctx_locked_nowait(struct amdiommu_ctx *ctx);
236 void amdiommu_qi_invalidate_wait_sync(struct iommu_unit *iommu);