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Searched +full:io +full:- +full:muxing (Results 1 – 25 of 32) sorted by relevance

12

/linux/include/media/i2c/
H A Dadv7604.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * adv7604 - Analog Devices ADV7604 video decoder driver
13 /* Analog input muxing modes (AFE register 0x02, [2:0]) */
29 ADV7604_BUS_ORDER_GRB, /* Swap 1-2 */
30 ADV7604_BUS_ORDER_RBG, /* Swap 2-3 */
31 ADV7604_BUS_ORDER_BGR, /* Swap 1-3 */
36 /* Input Color Space (IO register 0x02, [7:4]) */
49 /* Select output format (IO register 0x03, [4:2]) */
62 /* INT1 Configuration (IO register 0x40, [1:0]) */
97 /* Analog input muxing mode */
[all …]
H A Dadv7842.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * adv7842 - Analog Devices ADV7842 video decoder driver
11 /* Analog input muxing modes (AFE register 0x02, [2:0]) */
27 ADV7842_BUS_ORDER_GRB, /* Swap 1-2 */
28 ADV7842_BUS_ORDER_RBG, /* Swap 2-3 */
29 ADV7842_BUS_ORDER_BGR, /* Swap 1-3 */
34 /* Input Color Space (IO register 0x02, [7:4]) */
47 /* Select output format (IO register 0x03, [4:2]) */
62 /* Video standard select (IO register 0x00, [5:0]) */
135 /* Analog input muxing mode */
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/linux/Documentation/devicetree/bindings/iio/multiplexer/
H A Dio-channel-mux.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/iio/multiplexer/io-channel-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peter Rosin <peda@axentia.se>
16 For each non-empty string in the channels property, an io-channel will be
17 created. The number of this io-channel is the same as the index into the list
20 Documentation/devicetree/bindings/mux/mux-controller.yaml
25 const: io-channel-mux
27 io-channels:
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/linux/drivers/pinctrl/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
80 will be called pinctrl-apple-gpio.
83 bool "Axis ARTPEC-6 pin controller driver"
88 This is the driver for the Axis ARTPEC-6 pin controller. This driver
91 found in Documentation/devicetree/bindings/pinctrl/axis,artpec6-pinctrl.txt
100 functionality. This driver supports the pinmux, push-pull and
129 tristate "X-Powers AXP209 PMIC pinctrl and GPIO Support"
138 muxing and a GPIO driver to handle the GPIO when the GPIO function is
153 The Awinic AW9523/AW9523B is a multi-function I2C GPIO
155 pinctrl driver to select the function muxing and a GPIO
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H A Dpinctrl-eyeq5.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * pull-down, pull-up, drive strength and muxing.
9 * For each pin, muxing is between two functions: (0) GPIO or (1) another one
10 * that is pin-dependent. Functions are declared statically in this driver.
15 * We use eq5p_ as prefix, as-in "EyeQ5 Pinctrl", but way shorter.
27 #include <linux/io.h>
33 #include <linux/pinctrl/pinconf-generic.h>
39 #include "pinctrl-utils.h"
205 void __iomem *ptr = pctrl->base + eq5p_regs[bank][reg]; in eq5p_update_bits()
213 u32 val = readl(pctrl->base + eq5p_regs[bank][reg]); in eq5p_test_bit()
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/linux/Documentation/devicetree/bindings/arm/
H A Dairoha,en7581-chip-scu.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/airoha,en7581-chip-scu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Bianconi <lorenzo@kernel.org>
13 The airoha chip-scu block provides a configuration interface for clock,
14 io-muxing and other functionalities used by multiple controllers (e.g. clock,
20 - enum:
21 - airoha,en7581-chip-scu
22 - const: syscon
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/linux/Documentation/devicetree/bindings/net/nfc/
H A Dmarvell,nci.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
15 - marvell,nfc-i2c
16 - marvell,nfc-spi
17 - marvell,nfc-uart
19 hci-muxed:
22 Specifies that the chip is muxing NCI over HCI frames
30 reset-n-io:
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/linux/Documentation/devicetree/bindings/iio/adc/
H A Dqcom,pm8018-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/qcom,pm8018-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
19 - qcom,pm8018-adc
20 - qcom,pm8038-adc
21 - qcom,pm8058-adc
22 - qcom,pm8921-adc
29 xoadc-ref-supply:
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/linux/drivers/ata/
H A Dsata_gemini.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Cortina Systems Gemini SATA bridge add-on to Faraday FTIDE010
16 #include <linux/io.h>
23 * struct sata_gemini - a state container for a Gemini SATA bridge
26 * @muxmode: the current muxing mode
47 * Bits 26:24 are "IDE IO Select", which decides what SATA
57 * 111-100 - Reserved
58 * Mode 0: 000 - ata0 master <-> sata0
59 * ata1 master <-> sata1
61 * Mode 1: 001 - ata0 master <-> sata0
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/linux/arch/powerpc/platforms/52xx/
H A Dmpc52xx_common.c20 #include <asm/io.h>
25 { .compatible = "fsl,mpc5200-xlb", },
26 { .compatible = "mpc5200-xlb", },
30 { .compatible = "fsl,mpc5200-immr", },
31 { .compatible = "fsl,mpc5200b-immr", },
32 { .compatible = "simple-bus", },
71 out_be32(&xlb->master_pri_enable, 0xff); in mpc5200_setup_xlb_arbiter()
72 out_be32(&xlb->master_priority, 0x11111111); in mpc5200_setup_xlb_arbiter()
77 * transaction and re-enable it afterwards ...) in mpc5200_setup_xlb_arbiter()
81 out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_PLDIS); in mpc5200_setup_xlb_arbiter()
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/linux/drivers/gpu/drm/sun4i/
H A Dsun4i_tcon.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Maxime Ripard <maxime.ripard@free-electrons.com>
11 #include <linux/media-bus-format.h>
48 drm_connector_list_iter_begin(encoder->dev, &iter); in sun4i_tcon_get_connector()
50 if (connector->encoder == encoder) { in sun4i_tcon_get_connector()
66 return -EINVAL; in sun4i_tcon_get_pixel_depth()
68 info = &connector->display_info; in sun4i_tcon_get_pixel_depth()
69 if (info->num_bus_formats != 1) in sun4i_tcon_get_pixel_depth()
70 return -EINVAL; in sun4i_tcon_get_pixel_depth()
72 switch (info->bus_formats[0]) { in sun4i_tcon_get_pixel_depth()
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/linux/drivers/pinctrl/mvebu/
H A Dpinctrl-orion.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Author: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
18 #include <linux/io.h>
25 #include "pinctrl-mvebu.h"
85 MPP_VAR_FUNCTION(0x3, "pci-1", "pme", V_ALL)),
103 MPP_VAR_FUNCTION(0x5, "pci-1", "clk", V_5181),
109 MPP_VAR_FUNCTION(0x5, "pci-1", "clk", V_5181),
209 * muxing, they are identical.
212 { .compatible = "marvell,88f5181-pinctrl", .data = &mv88f5181_info },
213 { .compatible = "marvell,88f5181l-pinctrl", .data = &mv88f5181_info },
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H A Dpinctrl-armada-xp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
10 * available: mv78230, mv78260 and mv78460. From a pin muxing
18 #include <linux/io.h>
26 #include "pinctrl-mvebu.h"
189 MPP_VAR_FUNCTION(0x4, "lcd", "ref-clk", V_MV78230_PLUS)),
235 MPP_VAR_FUNCTION(0x4, "lcd", "vga-hsync", V_MV78230_PLUS),
243 MPP_VAR_FUNCTION(0x4, "lcd", "vga-vsync", V_MV78230_PLUS),
480 .compatible = "marvell,mv78230-pinctrl",
484 .compatible = "marvell,mv78260-pinctrl",
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/linux/arch/arm/mach-omap1/
H A Ddevices.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * linux/arch/arm/mach-omap1/devices.c
8 #include <linux/dma-mapping.h>
15 #include <linux/platform_data/omap-wd-timer.h>
16 #include <linux/soc/ti/omap1-io.h>
51 .id = -1,
64 /*-------------------------------------------------------------------------*/
81 if (mmc_controller->slots[0].wires == 4) { in omap1_mmc_mux()
84 if (!mmc_controller->slots[0].nomux) in omap1_mmc_mux()
92 if (!mmc_controller->slots[1].nomux) { in omap1_mmc_mux()
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H A Dusb.c1 // SPDX-License-Identifier: GPL-2.0-or-later
12 #include <linux/dma-map-ops.h>
13 #include <linux/io.h>
15 #include <linux/soc/ti/omap1-io.h>
24 /* These routines should handle the standard chip-specific modes
27 * Some board-*.c files will need to set up additional mux options,
32 * - 1611B H2 (with usb1 mini-AB) using standard Mini-B or OTG cables
33 * - 5912 OSK OHCI (with usb0 standard-A), standard A-to-B cables
34 * - 5912 OSK UDC, with *nonstandard* A-to-A cable
35 * - 1510 Innovator UDC with bundled usb0 cable
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/linux/drivers/clk/mvebu/
H A Dkirkwood.c1 // SPDX-License-Identifier: GPL-2.0
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
15 #include <linux/clk-provider.h>
16 #include <linux/io.h>
24 * Kirkwood PLL sample-at-reset configuration
172 /* mv88f6180 has a fixed 1:2 CPU-to-L2 ratio */ in mv88f6180_get_clk_ratio()
242 * Clock Muxing Control
277 if (clkspec->args_count < 1) in clk_muxing_get_src()
278 return ERR_PTR(-EINVAL); in clk_muxing_get_src()
280 for (n = 0; n < ctrl->num_muxes; n++) { in clk_muxing_get_src()
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/linux/drivers/platform/x86/
H A Dapple-gmux.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2010-2012 Andreas Heider <andreas@meetr.de>
19 #include <linux/apple-gmux.h>
26 #include <asm/io.h>
32 * A `Lattice XP2`_ on pre-retinas, a `Renesas R4F2113`_ on pre-T2 retinas.
41 * dual GPUs but no built-in display.)
45 * to access a pre-retina gmux are infixed ``_pio_``, those for a pre-T2
54 * https://www.nxp.com/docs/en/data-sheet/PCAL6524.pdf
112 return inb(gmux_data->iostart + port); in gmux_pio_read8()
118 outb(val, gmux_data->iostart + port); in gmux_pio_write8()
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/linux/Documentation/devicetree/bindings/arm/marvell/
H A Dcp110-system-controller.txt6 giving access to numerous features: clocks, pin-muxing and many other
11 - compatible: must be: "syscon", "simple-mfd";
12 - reg: register area of the CP110 system controller
18 -------
23 - a set of core clocks
24 - a set of gateable clocks
28 - The first cell must be 0 or 1. 0 for the core clocks and 1 for the
30 - The second cell identifies the particular core clock or gateable
34 - Core clocks
35 - 0 0 APLL
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/linux/arch/arm/boot/dts/ti/omap/
H A Domap5-board-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 stdout-path = &uart3;
18 vmain: fixedregulator-vmain {
19 compatible = "regulator-fixed";
20 regulator-name = "vmain";
21 regulator-min-microvolt = <5000000>;
22 regulator-max-microvolt = <5000000>;
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/linux/drivers/pinctrl/meson/
H A Dpinctrl-meson.c1 // SPDX-License-Identifier: GPL-2.0-only
14 * The AO bank is special because it belongs to the Always-On power
20 * 1) pin muxing
43 #include <linux/io.h>
46 #include <linux/pinctrl/pinconf-generic.h>
56 #include "../pinctrl-utils.h"
57 #include "pinctrl-meson.h"
64 * meson_get_bank() - find the bank containing a given pin
77 for (i = 0; i < pc->data->num_banks; i++) { in meson_get_bank()
78 if (pin >= pc->data->banks[i].first && in meson_get_bank()
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/linux/drivers/gpio/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
47 this symbol, but new drivers should use the generic gpio-regmap
57 non-sleeping contexts. They can make bitbanged serial protocols
126 Enables support for the idio-16 library functions. The idio-16 library
128 ACCES IDIO-16 family such as the 104-IDIO-16 and the PCI-IDIO-16.
130 If built as a module its name will be gpio-idio-16.
136 tristate "GPIO driver for 74xx-ICs with MMIO access"
140 Say yes here to support GPIO functionality for 74xx-compatible ICs
155 If driver is built as a module it will be called gpio-altera.
330 tristate "Generic memory-mapped GPIO controller support (MMIO platform device)"
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/linux/drivers/pinctrl/starfive/
H A Dpinctrl-starfive-jh7110.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/io.h>
27 #include <dt-bindings/pinctrl/starfive,jh7110-pinctrl.h>
30 #include "../pinctrl-utils.h"
33 #include "pinctrl-starfive-jh7110.h"
52 * | 31 - 24 | 23 - 16 | 15 - 10 | 9 - 8 | 7 - 0 |
100 const struct jh7110_pinctrl_soc_info *info = sfp->info; in jh7110_pin_dbg_show()
102 seq_printf(s, "%s", dev_name(pctldev->dev)); in jh7110_pin_dbg_show()
104 if (pin < sfp->gc.ngpio) { in jh7110_pin_dbg_show()
107 u32 dout = readl_relaxed(sfp->base + info->dout_reg_base + offset); in jh7110_pin_dbg_show()
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/linux/drivers/media/i2c/
H A Dadv7842.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * adv7842 - Analog Devices ADV7842 video decoder driver
10 * REF_01 - Analog devices, ADV7842,
12 * REF_02 - Analog devices, Software User Guide, UG-206,
14 * REF_03 - Analog devices, Hardware User Guide, UG-214,
15 * ADV7842 Fast Switching 2:1 HDMI 1.4 Receiver with 3D-Comb
27 #include <linux/v4l2-dv-timings.h>
30 #include <media/v4l2-device.h>
31 #include <media/v4l2-event.h>
32 #include <media/v4l2-ctrls.h>
[all …]
/linux/drivers/clk/rockchip/
H A Dclk-pll.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Author: Xing Zheng <zhengxing@rock-chips.com>
12 #include <linux/io.h>
14 #include <linux/clk-provider.h>
53 const struct rockchip_pll_rate_table *rate_table = pll->rate_table; in rockchip_get_pll_settings()
56 for (i = 0; i < pll->rate_count; i++) { in rockchip_get_pll_settings()
68 const struct rockchip_pll_rate_table *rate_table = pll->rate_table; in rockchip_pll_round_rate()
72 for (i = 0; i < pll->rate_count; i++) { in rockchip_pll_round_rate()
78 return rate_table[i - 1].rate; in rockchip_pll_round_rate()
88 struct regmap *grf = pll->ctx->grf; in rockchip_pll_wait_lock()
[all …]
/linux/drivers/pinctrl/qcom/
H A Dpinctrl-msm.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/io.h>
25 #include <linux/pinctrl/pinconf-generic.h>
33 #include "../pinctrl-utils.h"
35 #include "pinctrl-msm.h"
42 * struct msm_pinctrl - state for a pinctrl-msm device
88 return readl(pctrl->regs[g->tile] + g->name##_reg); \
93 writel(val, pctrl->regs[g->tile] + g->name##_reg); \
97 MSM_ACCESSOR(io) in MSM_ACCESSOR() argument
105 u32 val = g->intr_ack_high ? BIT(g->intr_status_bit) : 0; in MSM_ACCESSOR()
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