| /linux/drivers/pinctrl/nomadik/ |
| H A D | pinctrl-abx500.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
34 * struct abx500_function - ABx500 pinctrl mux function
46 * struct abx500_pingroup - describes a ABx500 pin group
49 * from the driver-local pin enumeration space
73 #define UNUSED -1
109 * struct abx500_gpio_irq_cluster - indicates GPIOs which are interrupt
110 * capable
111 * @start: The pin number of the first pin interrupt capable
112 * @end: The pin number of the last pin interrupt capable
114 * together throughout the interrupt numbers at irregular
[all …]
|
| /linux/Documentation/devicetree/bindings/dma/ |
| H A D | marvell,orion-xor.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/marvell,orion-xor.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Gregory Clement <gregory.clement@bootlin.com>
16 - items:
17 - const: marvell,armada-380-xor
18 - const: marvell,orion-xor
19 - enum:
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/goldmontplus/ |
| H A D | pipeline.json | 3 "BriefDescription": "Retired branch instructions (Precise event capable)",
12 "BriefDescription": "Retired taken branch instructions (Precise event capable)",
22 "BriefDescription": "Retired near call instructions (Precise event capable)",
32 "BriefDescription": "Retired far branch instructions (Precise event capable)",
37 …instructions retired. This includes far jump, far call and return, and Interrupt call and return.…
42 "BriefDescription": "Retired near indirect call instructions (Precise event capable)",
52 "BriefDescription": "Retired conditional branch instructions (Precise event capable)",
62 … "BriefDescription": "Retired instructions of near indirect Jmp or call (Precise event capable)",
72 "BriefDescription": "Retired near relative call instructions (Precise event capable)",
82 "BriefDescription": "Retired near return instructions (Precise event capable)",
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/goldmont/ |
| H A D | pipeline.json | 3 "BriefDescription": "Retired branch instructions (Precise event capable)",
12 "BriefDescription": "Retired taken branch instructions (Precise event capable)",
22 "BriefDescription": "Retired near call instructions (Precise event capable)",
32 "BriefDescription": "Retired far branch instructions (Precise event capable)",
37 …instructions retired. This includes far jump, far call and return, and Interrupt call and return.…
42 "BriefDescription": "Retired near indirect call instructions (Precise event capable)",
52 "BriefDescription": "Retired conditional branch instructions (Precise event capable)",
62 … "BriefDescription": "Retired instructions of near indirect Jmp or call (Precise event capable)",
72 "BriefDescription": "Retired near relative call instructions (Precise event capable)",
82 "BriefDescription": "Retired near return instructions (Precise event capable)",
[all …]
|
| /linux/drivers/net/ethernet/atheros/atlx/ |
| H A D | atlx.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /* atlx_hw.h -- common hardware definitions for Attansic network drivers
4 * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
5 * Copyright(c) 2006 - 2007 Chris Snook <csnook@redhat.com>
6 * Copyright(c) 2006 - 2008 Jay Cliburn <jcliburn@gmail.com>
10 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
149 /* IRQ Anti-Lost Timer Initial Value Register */
228 /* MAC Half-Duplex Control Register */
246 /* Wake-On-Lan control register */
274 /* Interrupt Status Register */
[all …]
|
| /linux/Documentation/devicetree/bindings/usb/ |
| H A D | usb-xhci.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/usb-xhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mathias Nyman <mathias.nyman@intel.com>
13 - $ref: usb-hcd.yaml#
16 usb2-lpm-disable:
20 usb3-lpm-capable:
21 description: Determines if platform is USB3 LPM capable
24 quirk-broken-port-ped:
[all …]
|
| H A D | hisilicon,histb-xhci.txt | 6 - compatible: should be "hisilicon,hi3798cv200-xhci"
7 - reg: specifies physical base address and size of the registers
8 - interrupts : interrupt used by the controller
9 - clocks: a list of phandle + clock-specifier pairs, one for each
10 entry in clock-names
11 - clock-names: must contain
16 - resets: a list of phandle and reset specifier pairs as listed in
17 reset-names property.
18 - reset-names: must contain
20 - phys: a list of phandle + phy specifier pairs
[all …]
|
| H A D | mediatek,mtk-xhci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: usb-xhci.yaml
19 case 2: supports dual-role mode, and the host is based on xHCI driver.
25 - enum:
26 - mediatek,mt2701-xhci
27 - mediatek,mt2712-xhci
[all …]
|
| H A D | ti,hd3ss3220.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Biju Das <biju.das.jz@bp.renesas.com>
12 description: |-
14 Configuration (CC) logic and 5V VCONN sourcing for ecosystems implementing USB Type-C. The
28 id-gpios:
32 the HD3SS3220 will assert ID pin low. This is done to enforce Type-C
33 requirement that VBUS must be at VSafe0V before re-enabling VBUS.
39 SS data bus to the SS capable connector.
[all …]
|
| /linux/include/linux/soc/qcom/ |
| H A D | irq.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
12 * capable interrupts by different interrupt controllers.
15 * interrupt configuration is done at PDC
16 * IRQ_DOMAIN_FLAG_QCOM_MPM_WAKEUP: Interrupt configuration is handled at TLMM
22 * irq_domain_qcom_handle_wakeup: Return if the domain handles interrupt
26 * This QCOM specific irq domain call returns if the interrupt controller
27 * requires the interrupt be masked at the child interrupt controller.
31 return (d->flags & IRQ_DOMAIN_FLAG_QCOM_PDC_WAKEUP); in irq_domain_qcom_handle_wakeup()
|
| /linux/drivers/net/ethernet/intel/e1000/ |
| H A D | e1000_hw.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 1999 - 2006 Intel Corporation. */
422 /* MAC decode size is 128K - This is the size of BAR0 */
443 (MINIMUM_ETHERNET_FRAME_SIZE - ETHERNET_FCS_SIZE)
459 /* This defines the bits that are set in the Interrupt Mask
468 /* This defines the bits that are set in the Interrupt Mask
470 * o RXT0 = Receiver Timer Interrupt (ring 0)
486 * E1000_RAR_ENTRIES - 1 multicast addresses.
503 /* Receive Descriptor - Extended */
529 /* Receive Descriptor - Packet Split */
[all …]
|
| /linux/arch/powerpc/include/asm/ |
| H A D | pmac_pfunc.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
33 * A driver capable of interpreting commands provides a handlers
43 * locking policy or per-function instance data.
45 * For interrupt capable functions, irq_enable() is called when a client
49 * pmf interrupt during those calls.
135 /* The name is the "xxx" in "platform-do-xxx", this is how
152 /* Interrupt clients */
176 * Register/Unregister a function-capable driver and its handlers
186 * Register/Unregister interrupt clients
225 * This one looks for the platform-xxx first so you should call it to the
[all …]
|
| /linux/drivers/pinctrl/qcom/ |
| H A D | pinctrl-msm.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
53 * struct msm_pingroup - Qualcomm pingroup definition
62 * @intr_cfg_reg: Offset of the register holding interrupt configuration bits.
68 * explicitly on older SoCs where the interrupt target routing
77 * @intr_enable_bit: Offset in @intr_cfg_reg for enabling the interrupt for this group.
78 * @intr_status_bit: Offset in @intr_status_reg for reading and acking the interrupt
83 * @intr_target_bit: Offset in @intr_target_reg for configuring the interrupt routing.
84 * @intr_target_width: Number of bits used for specifying interrupt routing target.
85 * @intr_target_kpss_val: Value in @intr_target_bit for specifying that the interrupt from
88 * @intr_polarity_bit: Offset in @intr_cfg_reg for specifying polarity of the interrupt.
[all …]
|
| /linux/Documentation/networking/device_drivers/ethernet/3com/ |
| H A D | 3c509.rst | 1 .. SPDX-License-Identifier: GPL-2.0
21 ethercards in Linux. These cards are commonly known by the most widely-used
22 card's 3Com model number, 3c509. They are all 10mb/s ISA-bus cards and shouldn't
23 be (but sometimes are) confused with the similarly-numbered PCI-bus "3c905"
28 - 3c509 (original ISA card)
29 - 3c509B (later revision of the ISA card; supports full-duplex)
30 - 3c589 (PCMCIA)
31 - 3c589B (later revision of the 3c589; supports full-duplex)
32 - 3c579 (EISA)
45 The driver allows boot- or load-time overriding of the card's detected IOADDR,
[all …]
|
| /linux/include/uapi/linux/ |
| H A D | hpet.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
15 #define HPET_INFO_PERIODIC 0x0010 /* periodic-capable comparator */
17 #define HPET_IE_ON _IO('h', 0x01) /* interrupt on */
18 #define HPET_IE_OFF _IO('h', 0x02) /* interrupt off */
|
| /linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | samsung,pinctrl-gpio-bank.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/samsung,pinctrl-gpio-bank.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung S3C/S5P/Exynos SoC pin controller - gpio bank
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
12 - Tomasz Figa <tomasz.figa@gmail.com>
24 '#gpio-cells':
27 gpio-controller: true
[all …]
|
| H A D | samsung,pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
12 - Tomasz Figa <tomasz.figa@gmail.com>
22 - External GPIO interrupts (see interrupts property in pin controller node);
24 - External wake-up interrupts - multiplexed (capable of waking up the system
25 see interrupts property in external wake-up interrupt controller node -
26 samsung,pinctrl-wakeup-interrupt.yaml);
[all …]
|
| /linux/Documentation/devicetree/bindings/timer/ |
| H A D | arm,sp804.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Haojian Zhuang <haojian.zhuang@linaro.org>
14 16 or 32 bit operation and capable of running in one-shot, periodic, or
15 free-running mode. The input clock is shared, but can be gated and prescaled
18 There is a viriant of Arm SP804: Hisilicon 64-bit SP804 timer. Some Hisilicon
27 - arm,sp804
28 - hisilicon,sp804
30 - compatible
[all …]
|
| /linux/Documentation/devicetree/bindings/input/ |
| H A D | ariel-pwrbutton.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/input/ariel-pwrbutton.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lubomir Rintel <lkundrak@v3.sk>
14 SPI bus that is capable of sending keyboard and mouse data. A single
19 - $ref: input.yaml#
20 - $ref: /schemas/spi/spi-peripheral-props.yaml#
25 - const: dell,wyse-ariel-ec-input
26 - const: ene,kb3930-input
[all …]
|
| /linux/Documentation/devicetree/bindings/pci/ |
| H A D | xlnx,nwl-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/xlnx,nwl-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thippeswamy Havalige <thippeswamy.havalige@amd.com>
13 - $ref: /schemas/pci/pci-host-bridge.yaml#
14 - $ref: /schemas/interrupt-controller/msi-controller.yaml#
18 const: xlnx,nwl-pcie-2.11
22 - description: PCIe bridge registers location.
23 - description: PCIe Controller registers location.
[all …]
|
| /linux/Documentation/devicetree/bindings/display/imx/ |
| H A D | nxp,imx8mq-dcss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/display/imx/nxp,imx8mq-dcss.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Laurentiu Palcu <laurentiu.palcu@nxp.com>
17 2.2) or MIPI-DSI. The DCSS is intended to support up to 4kp60 displays. HDR10
18 image processing capabilities are included to provide a solution capable of
23 const: nxp,imx8mq-dcss
27 - description: DCSS base address and size, up to IRQ steer start
28 - description: DCSS BLKCTL base address and size
[all …]
|
| /linux/Documentation/devicetree/bindings/memory-controllers/ |
| H A D | snps,dw-umctl2-ddrc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/snps,dw-umctl2-ddrc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare Universal Multi-Protocol Memory Controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Michal Simek <michal.simek@amd.com>
14 Synopsys DesignWare Enhanced uMCTL2 DDR Memory Controller is capable of
17 16-bits or 32-bits or 64-bits wide.
20 controller. It has an optional SEC/DEC ECC support in 64- and 32-bits
[all …]
|
| /linux/Documentation/devicetree/bindings/media/ |
| H A D | img,e5010-jpeg-enc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/img,e5010-jpeg-enc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Devarsh Thakkar <devarsht@ti.com>
14 TI's AM62A SoC. It is capable of real time encoding of YUV420 and YUV422
15 inputs to JPEG and M-JPEG. It supports baseline JPEG Encoding up to
21 - items:
22 - const: ti,am62a-jpeg-enc
23 - const: img,e5010-jpeg-enc
[all …]
|
| /linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | interrupts.txt | 1 Specifying interrupt information for devices
4 1) Interrupt client nodes
5 -------------------------
8 "interrupts" property, an "interrupts-extended" property, or both. If both are
11 properties contain a list of interrupt specifiers, one per output interrupt. The
12 format of the interrupt specifier is determined by the interrupt controller to
16 interrupt-parent = <&intc1>;
19 The "interrupt-parent" property is used to specify the controller to which
20 interrupts are routed and contains a single phandle referring to the interrupt
22 interrupt client node or in any of its parent nodes. Interrupts listed in the
[all …]
|
| /linux/Documentation/devicetree/bindings/iio/humidity/ |
| H A D | dht11.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Harald Geyer <harald@ccbib.org>
27 Single, interrupt capable, GPIO used to communicate with the device.
30 - compatible
31 - gpios
36 - |
37 humidity-sensor {
|