/linux/kernel/irq/ |
H A D | cpuhotplug.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Generic cpu hotunplug interrupt migration code copied from the 12 #include <linux/interrupt.h> 19 /* For !GENERIC_IRQ_EFFECTIVE_AFF_MASK this looks at general affinity mask */ 27 * The cpumask_empty() check is a workaround for interrupt chips, in irq_needs_fixup() 28 * which do not implement effective affinity, but the architecture has in irq_needs_fixup() 29 * enabled the config switch. Use the general affinity mask instead. in irq_needs_fixup() 45 pr_warn("Eff. affinity %*pbl of IRQ %u contains only offline CPUs after offlining CPU %u\n", in irq_needs_fixup() 46 cpumask_pr_args(m), d->irq, cpu); in irq_needs_fixup() 58 const struct cpumask *affinity; in migrate_one_irq() local [all …]
|
H A D | irqdesc.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar 4 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King 6 * This file contains the interrupt descriptor management code. Detailed 7 * information is available in Documentation/core-api/genericirq.rst 13 #include <linux/interrupt.h> 23 * lockdep: we want to handle all irq_desc locks as a single lock-class: 57 if (!zalloc_cpumask_var_node(&desc->irq_common_data.affinity, in alloc_masks() 59 return -ENOMEM; in alloc_masks() 62 if (!zalloc_cpumask_var_node(&desc->irq_common_data.effective_affinity, in alloc_masks() [all …]
|
H A D | manage.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar 4 * Copyright (C) 2005-2006 Thomas Gleixner 15 #include <linux/interrupt.h> 50 while (irqd_irq_inprogress(&desc->irq_data)) in __synchronize_hardirq() 53 /* Ok, that indicated we're done: double-check carefully. */ in __synchronize_hardirq() 54 guard(raw_spinlock_irqsave)(&desc->lock); in __synchronize_hardirq() 55 inprogress = irqd_irq_inprogress(&desc->irq_data); in __synchronize_hardirq() 75 * synchronize_hardirq - wait for pending hard IRQ handlers (on other CPUs) 76 * @irq: interrupt number to wait for [all …]
|
H A D | affinity.c | 1 // SPDX-License-Identifier: GPL-2.0 4 * Copyright (C) 2016-2017 Christoph Hellwig. 6 #include <linux/interrupt.h> 14 affd->nr_sets = 1; in default_calc_sets() 15 affd->set_size[0] = affvecs; in default_calc_sets() 19 * irq_create_affinity_masks - Create affinity masks for multiqueue spreading 21 * @affd: Description of the affinity requirements 32 * Determine the number of vectors which need interrupt affinities in irq_create_affinity_masks() 37 if (nvecs > affd->pre_vectors + affd->post_vectors) in irq_create_affinity_masks() 38 affvecs = nvecs - affd->pre_vectors - affd->post_vectors; in irq_create_affinity_masks() [all …]
|
H A D | msi.c | 1 // SPDX-License-Identifier: GPL-2.0 26 * struct msi_device_data - MSI per device data 40 * struct msi_ctrl - MSI internal management control structure 45 * than the range due to PCI/multi-MSI. 55 #define MSI_XA_MAX_INDEX (ULONG_MAX - 1) 66 * msi_alloc_desc - Allocate an initialized msi_desc 69 * @affinity: Optional pointer to an affinity mask array size of @nvec 71 * If @affinity is not %NULL then an affinity array[@nvec] is allocated 72 * and the affinity masks and flags from @affinity are copied. 77 const struct irq_affinity_desc *affinity) in msi_alloc_desc() argument [all …]
|
H A D | proc.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 1992, 1998-2004 Linus Torvalds, Ingo Molnar 12 #include <linux/interrupt.h> 22 * concurrent free of the interrupt descriptor. remove_proc_entry() 26 * We remove the proc entries first and then delete the interrupt 40 AFFINITY, enumerator 48 struct irq_desc *desc = irq_to_desc((long)m->private); in show_irq_affinity() 52 case AFFINITY: in show_irq_affinity() 54 mask = desc->irq_common_data.affinity; in show_irq_affinity() 55 if (irq_move_pending(&desc->irq_data)) in show_irq_affinity() [all …]
|
H A D | irqdomain.c | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <linux/interrupt.h> 30 bool realloc, const struct irq_affinity_desc *affinity); 53 return fwid->name; in irqchip_fwnode_get_name() 62 * __irq_domain_alloc_fwnode - Allocate a fwnode_handle suitable for 67 * @pa: Optional user-provided physical address 91 n = kasprintf(GFP_KERNEL, "%s-%d", name, id); in __irq_domain_alloc_fwnode() 104 fwid->type = type; in __irq_domain_alloc_fwnode() 105 fwid->name = n; in __irq_domain_alloc_fwnode() 106 fwid->pa = pa; in __irq_domain_alloc_fwnode() [all …]
|
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 21 # Supports effective affinity mask 26 # Support for delayed migration from interrupt context 34 # Alpha specific irq affinity mechanism 38 # Interrupt injection mechanism 46 # Generic configurable interrupt chip implementation 51 # Generic irq_domain hw <--> linux irq number translation 66 # Support for obsolete non-mapping irq domains 86 # Generic MSI hierarchical interrupt domain support 104 # Snapshot for interrupt statistics [all …]
|
H A D | devres.c | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <linux/interrupt.h> 23 free_irq(this->irq, this->dev_id); in devm_irq_release() 30 return this->irq == match->irq && this->dev_id == match->dev_id; in devm_irq_match() 56 return -ENOMEM; in __devm_request_threaded_irq() 68 dr->irq = irq; in __devm_request_threaded_irq() 69 dr->dev_id = dev_id; in __devm_request_threaded_irq() 76 * devm_request_threaded_irq - allocate an interrupt line for a managed device with error logging 77 * @dev: Device to request interrupt for 78 * @irq: Interrupt line to allocate [all …]
|
/linux/drivers/pci/msi/ |
H A D | api.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * PCI MSI/MSI-X — Exported APIs for device drivers 5 * Copyright (C) 2003-2004 Intel 17 * pci_enable_msi() - Enable MSI interrupt mode on device 21 * allocate a single interrupt vector. On success, the allocated vector 22 * Linux IRQ will be saved at @dev->irq. The driver must invoke 40 * pci_disable_msi() - Disable MSI interrupt mode on device 43 * Legacy device driver API to disable MSI interrupt mode on device, 44 * free earlier allocated interrupt vectors, and restore INTx emulation. 45 * The PCI device Linux IRQ (@dev->irq) is restored to its default [all …]
|
/linux/Documentation/devicetree/bindings/interrupt-controller/ |
H A D | apple,aic.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interrupt-controller/apple,aic.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Apple Interrupt Controller 10 - Hector Martin <marcan@marcan.st> 13 The Apple Interrupt Controller is a simple interrupt controller present on 19 - Level-triggered hardware IRQs wired to SoC blocks 20 - Single mask bit per IRQ 21 - Per-IRQ affinity setting [all …]
|
H A D | arm,gic-v3.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/interrupt-controller/arm,gic-v3.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: ARM Generic Interrupt Controller, version 3 10 - Marc Zyngier <maz@kernel.org> 15 Software Generated Interrupts (SGI), and Locality-specific Peripheral 19 - $ref: /schemas/interrupt-controller.yaml# 24 - items: 25 - enum: [all …]
|
/linux/include/linux/ |
H A D | irq.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 10 * Thanks. --rmk 36 * Bits 0-7 are the same as the IRQF_* bits in linux/interrupt.h 38 * IRQ_TYPE_NONE - default, unspecified type 39 * IRQ_TYPE_EDGE_RISING - rising edge triggered 40 * IRQ_TYPE_EDGE_FALLING - falling edge triggered 41 * IRQ_TYPE_EDGE_BOTH - rising and falling edge triggered 42 * IRQ_TYPE_LEVEL_HIGH - high level triggered 43 * IRQ_TYPE_LEVEL_LOW - low level triggered 44 * IRQ_TYPE_LEVEL_MASK - Mask to filter out the level bits [all …]
|
H A D | interrupt.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* interrupt.h */ 26 * linux/ioport.h to select the interrupt line behaviour. When 27 * requesting an interrupt without specifying a IRQF_TRIGGER, the 44 * IRQF_SHARED - allow sharing the irq among several devices 45 * IRQF_PROBE_SHARED - set by callers when they expect sharing mismatches to occur 46 * IRQF_TIMER - Flag to mark this interrupt as timer interrupt 47 * IRQF_PERCPU - Interrupt is per cpu 48 * IRQF_NOBALANCING - Flag to exclude this interrupt from irq balancing 49 * IRQF_IRQPOLL - Interrupt is used for polling (only the interrupt that is [all …]
|
/linux/drivers/perf/ |
H A D | arm_pmu_platform.c | 1 // SPDX-License-Identifier: GPL-2.0 30 int ret = -ENODEV; in probe_current_pmu() 34 for (; info->init != NULL; info++) { in probe_current_pmu() 35 if ((cpuid & info->mask) != info->cpuid) in probe_current_pmu() 37 ret = info->init(pmu); in probe_current_pmu() 48 struct pmu_hw_events __percpu *hw_events = pmu->hw_events; in pmu_parse_percpu_irq() 50 ret = irq_get_percpu_devid_partition(irq, &pmu->supported_cpus); in pmu_parse_percpu_irq() 54 for_each_cpu(cpu, &pmu->supported_cpus) in pmu_parse_percpu_irq() 55 per_cpu(hw_events->irq, cpu) = irq; in pmu_parse_percpu_irq() 62 return of_property_present(node, "interrupt-affinity"); in pmu_has_irq_affinity() [all …]
|
/linux/drivers/irqchip/ |
H A D | irq-bcm7038-l1.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Broadcom BCM7038 style Level 1 interrupt controller driver 14 #include <linux/interrupt.h> 47 u8 affinity[MAX_WORDS * IRQS_PER_WORD]; member 82 return (0 * intc->n_words + word) * sizeof(u32); in reg_status() 88 return (1 * intc->n_words + word) * sizeof(u32); in reg_mask_status() 94 return (2 * intc->n_words + word) * sizeof(u32); in reg_mask_set() 100 return (3 * intc->n_words + word) * sizeof(u32); in reg_mask_clr() 127 cpu = intc->cpus[cpu_logical_map(smp_processor_id())]; in bcm7038_l1_irq_handle() 129 cpu = intc->cpus[0]; in bcm7038_l1_irq_handle() [all …]
|
H A D | irq-msi-lib.c | 1 // SPDX-License-Identifier: GPL-2.0-only 7 #include <linux/irqchip/irq-msi-lib.h> 10 * msi_lib_init_dev_msi_info - Domain info setup for MSI domains 30 const struct msi_parent_ops *pops = real_parent->msi_parent_ops; in msi_lib_init_dev_msi_info() 31 struct irq_chip *chip = info->chip; in msi_lib_init_dev_msi_info() 41 * possible to stack MSI parents. See x86 vector -> irq remapping in msi_lib_init_dev_msi_info() 43 if (domain->bus_token == pops->bus_select_token) { in msi_lib_init_dev_msi_info() 51 required_flags = pops->required_flags; in msi_lib_init_dev_msi_info() 54 switch(info->bus_token) { in msi_lib_init_dev_msi_info() 64 * set. It's sole purpose is to create a dumb interrupt in msi_lib_init_dev_msi_info() [all …]
|
/linux/arch/powerpc/sysdev/xics/ |
H A D | xics-common.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 12 #include <linux/interrupt.h> 60 ireg = of_get_property(np, "ibm,ppc-interrupt-gserver#s", &ilen); in xics_update_irq_servers() 68 /* Global interrupt distribution server is specified in the last in xics_update_irq_servers() 69 * entry of "ibm,ppc-interrupt-gserver#s" property. Get the last in xics_update_irq_servers() 96 index = (1UL << xics_interrupt_server_size) - 1 - gserver; in xics_set_cpu_giq() 100 WARN(status < 0, "set-indicator(%d, %d, %u) returned %d\n", in xics_set_cpu_giq() 107 icp_ops->set_priority(LOWEST_PRIORITY); in xics_setup_cpu() 114 pr_err("Interrupt 0x%x (real) is invalid, disabling it.\n", vec); in xics_mask_unknown_vec() 118 xics_ics->mask_unknown(xics_ics, vec); in xics_mask_unknown_vec() [all …]
|
/linux/arch/alpha/kernel/ |
H A D | sys_dp264.c | 1 // SPDX-License-Identifier: GPL-2.0 68 dim0 = &cchip->dim0.csr; in tsunami_update_irq_hw() 69 dim1 = &cchip->dim1.csr; in tsunami_update_irq_hw() 70 dim2 = &cchip->dim2.csr; in tsunami_update_irq_hw() 71 dim3 = &cchip->dim3.csr; in tsunami_update_irq_hw() 88 if (bcpu == 0) dimB = &cchip->dim0.csr; in tsunami_update_irq_hw() 89 else if (bcpu == 1) dimB = &cchip->dim1.csr; in tsunami_update_irq_hw() 90 else if (bcpu == 2) dimB = &cchip->dim2.csr; in tsunami_update_irq_hw() 91 else dimB = &cchip->dim3.csr; in tsunami_update_irq_hw() 103 cached_irq_mask |= 1UL << d->irq; in dp264_enable_irq() [all …]
|
/linux/lib/ |
H A D | cpu_rmap.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * cpu_rmap.c: CPU affinity reverse-map support 8 #include <linux/interrupt.h> 13 * objects with CPU affinities. This can be seen as a reverse-map of 14 * CPU affinity. However, we do not assume that the object affinities 21 * alloc_cpu_rmap - allocate CPU affinity reverse-map 39 rmap = kzalloc(obj_offset + size * sizeof(rmap->obj[0]), flags); in alloc_cpu_rmap() 43 kref_init(&rmap->refcount); in alloc_cpu_rmap() 44 rmap->obj = (void **)((char *)rmap + obj_offset); in alloc_cpu_rmap() 50 * any newly-hotplugged CPUs to have some object assigned. in alloc_cpu_rmap() [all …]
|
/linux/drivers/iommu/ |
H A D | hyperv-iommu.c | 1 // SPDX-License-Identifier: GPL-2.0 4 * Hyper-V stub IOMMU driver. 12 #include <linux/interrupt.h> 30 * According 82093AA IO-APIC spec , IO APIC has a 24-entry Interrupt 31 * Redirection Table. Hyper-V exposes one single IO-APIC and so define 42 struct irq_data *parent = data->parent_data; in hyperv_ir_set_affinity() 46 /* Return error If new irq affinity is out of ioapic_max_cpumask. */ in hyperv_ir_set_affinity() 48 return -EINVAL; in hyperv_ir_set_affinity() 50 ret = parent->chip->irq_set_affinity(parent, mask, force); in hyperv_ir_set_affinity() 60 .name = "HYPERV-IR", [all …]
|
/linux/arch/arm64/boot/dts/apple/ |
H A D | t6001.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/interrupt-controller/apple-aic.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 13 #include <dt-bindings/pinctrl/apple.h> 14 #include <dt-bindings/spmi/spmi.h> 16 #include "multi-die-cpp.h" 18 #include "t600x-common.dtsi" 21 compatible = "apple,t6001", "apple,arm-platform"; 24 compatible = "simple-bus"; [all …]
|
/linux/arch/x86/kernel/apic/ |
H A D | vector.c | 1 // SPDX-License-Identifier: GPL-2.0-only 10 #include <linux/interrupt.h> 78 info->mask = mask; in init_irq_alloc_info() 94 while (irqd->parent_data) in apic_chip_data() 95 irqd = irqd->parent_data; in apic_chip_data() 97 return irqd->chip_data; in apic_chip_data() 104 return apicd ? &apicd->hw_irq_cfg : NULL; in irqd_cfg() 119 INIT_HLIST_NODE(&apicd->clist); in alloc_apic_chip_data() 135 apicd->hw_irq_cfg.vector = vector; in apic_update_irq_cfg() 136 apicd->hw_irq_cfg.dest_apicid = apic->calc_dest_apicid(cpu); in apic_update_irq_cfg() [all …]
|
/linux/arch/mips/sibyte/sb1250/ |
H A D | irq.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 8 #include <linux/interrupt.h> 26 * These are the routines that handle all the low level interrupt stuff. 27 * Actions handled here are: initialization of the interrupt map, requesting of 28 * interrupt lines by handlers, dispatching if interrupts to handlers, probing 29 * for interrupt lines 74 unsigned int irq = d->irq; in sb1250_set_affinity() 83 /* Protect against other affinity changers and IMR manipulation */ in sb1250_set_affinity() 114 unsigned int irq = d->irq; in disable_sb1250_irq() 121 unsigned int irq = d->irq; in enable_sb1250_irq() [all …]
|
/linux/Documentation/virt/hyperv/ |
H A D | vpci.rst | 1 .. SPDX-License-Identifier: GPL-2.0 3 PCI pass-thru devices 5 In a Hyper-V guest VM, PCI pass-thru devices (also called 16 Hyper-V terminology for vPCI devices is "Discrete Device 17 Assignment" (DDA). Public documentation for Hyper-V DDA is 20 …tps://learn.microsoft.com/en-us/windows-server/virtualization/hyper-v/plan/plan-for-deploying-devi… 23 and for GPUs. A similar mechanism for NICs is called SR-IOV 25 driver to interact directly with the hardware. See Hyper-V 26 public documentation here: `SR-IOV`_ 28 .. _SR-IOV: https://learn.microsoft.com/en-us/windows-hardware/drivers/network/overview-of-single-r… [all …]
|