Home
last modified time | relevance | path

Searched +full:in +full:- +full:masks (Results 1 – 25 of 885) sorted by relevance

12345678910>>...36

/linux/lib/
H A Dgroup_cpus.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2016-2017 Christoph Hellwig.
29 cpus_per_grp--; in grp_spread_init_one()
33 for (sibl = -1; cpus_per_grp > 0; ) { in grp_spread_init_one()
40 cpus_per_grp--; in grp_spread_init_one()
47 cpumask_var_t *masks; in alloc_node_to_cpumask() local
50 masks = kcalloc(nr_node_ids, sizeof(cpumask_var_t), GFP_KERNEL); in alloc_node_to_cpumask()
51 if (!masks) in alloc_node_to_cpumask()
55 if (!zalloc_cpumask_var(&masks[node], GFP_KERNEL)) in alloc_node_to_cpumask()
59 return masks; in alloc_node_to_cpumask()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dpp/dcn30/
H A Ddcn30_dpp_cm.c6 * to deal in the Software without restriction, including without limitation
11 * The above copyright notice and this permission notice shall be included in
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
34 dpp->tf_regs->reg
37 dpp->base.ctx
41 dpp->tf_shift->field_name, dpp->tf_mask->field_name
50 // debug option: put CM in bypass mode in dpp3_enable_cm_block()
[all …]
/linux/drivers/usb/misc/
H A Dbrcmstb-usb-pinmap.c1 // SPDX-License-Identifier: GPL-2.0
64 val = gpiod_get_value(pin->gpiod); in sync_in_pin()
66 pinmap_set(pin->pdata->regs, pin->value_mask); in sync_in_pin()
68 pinmap_unset(pin->pdata->regs, pin->value_mask); in sync_in_pin()
83 pr_debug("%s: reg: 0x%x\n", __func__, readl(pdata->regs)); in brcmstb_usb_pinmap_ovr_isr()
84 pout = pdata->out_pins; in brcmstb_usb_pinmap_ovr_isr()
85 for (x = 0; x < pdata->out_count; x++) { in brcmstb_usb_pinmap_ovr_isr()
86 val = readl(pdata->regs); in brcmstb_usb_pinmap_ovr_isr()
87 if (val & pout->changed_mask) { in brcmstb_usb_pinmap_ovr_isr()
88 pinmap_set(pdata->regs, pout->clr_changed_mask); in brcmstb_usb_pinmap_ovr_isr()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dpp/dcn10/
H A Ddcn10_dpp_cm.c6 * to deal in the Software without restriction, including without limitation
11 * The above copyright notice and this permission notice shall be included in
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
43 dpp->tf_regs->reg
46 dpp->base.ctx
50 dpp->tf_shift->field_name, dpp->tf_mask->field_name
118 gam_regs.shifts.csc_c11 = dpp->tf_shift->CM_GAMUT_REMAP_C11; in program_gamut_remap()
[all …]
/linux/security/landlock/
H A Druleset.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Landlock LSM - Ruleset management
5 * Copyright © 2016-2020 Mickaël Salaün <mic@digikod.net>
6 * Copyright © 2018-2020 ANSSI
26 * struct landlock_layer - Access rights for a given layer
30 * @level: Position of this layer in the layer stack.
41 * union landlock_key - Ke
273 landlock_get_applicable_domain(const struct landlock_ruleset * const domain,const struct access_masks masks) landlock_get_applicable_domain() argument
[all...]
/linux/Documentation/devicetree/bindings/usb/
H A Dbrcm,usb-pinmap.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/brcm,usb-pinmap.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Al Cooper <alcooperx@gmail.com>
15 - const: brcm,usb-pinmap
22 description: Interrupt for signals mirrored to out-gpios.
24 in-gpios:
29 brcm,in-functions:
30 $ref: /schemas/types.yaml#/definitions/string-array
[all …]
/linux/drivers/net/ethernet/intel/ice/
H A Dice_flex_pipe.c1 // SPDX-License-Identifier: GPL-2.0
77 * ice_sect_id - returns section ID
90 * ice_hw_ptype_ena - check if the PTYPE is enabled or not
97 test_bit(ptype, hw->hw_ptype); in ice_hw_ptype_ena()
112 * ice_gen_key_word - generate 16-bits of a key/mask word
120 * This function generates 16-bits from a 8-bit value, an 8-bit don't care mask
121 * and an 8-bit never match mask. The 16-bits of output are divided into 8 bits
133 * ------------------------------
143 /* 'dont_care' and 'nvr_mtch' masks cannot overlap */ in ice_gen_key_word()
145 return -EIO; in ice_gen_key_word()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dwb/dcn30/
H A Ddcn30_dwb_cm.c6 * to deal in the Software without restriction, including without limitation
11 * The above copyright notice and this permission notice shall be included in
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
37 dwbc30->dwbc_regs->reg
40 dwbc30->base.ctx
44 dwbc30->dwbc_shift->field_name, dwbc30->dwbc_mask->field_name
52 reg->shifts.field_region_start_base = dwbc30->dwbc_shift->DWB_OGAM_RAMA_EXP_REGION_START_BASE_B; in dwb3_get_reg_field_ogam()
[all …]
/linux/kernel/bpf/
H A Dliveness.c1 // SPDX-License-Identifier: GPL-2.0-only
20 * leads to writes in the caller's stack.
23 * - As the verifier accumulates a set of visited states, the analysis instance
26 * - If several states happen to visit the same instruction with the same
28 * - "may_read" set represents a union of all possibly read slots
29 * (any slot in "may_read" set might be read at or after the instruction);
30 * - "must_write" set represents an intersection of all possibly written slots
31 * (any slot in "must_write" set is guaranteed to be written by the instruction).
32 * - The analysis is split into two phases:
33 * - read and write marks accumulation;
[all …]
/linux/sound/ppc/
H A Dawacs.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
25 unsigned byteswap; /* Data is little-endian if 1 */
29 /* Audio Bit Masks */
32 /* Audio Control Reg Bit Masks */
33 /* ----- ------- --- --- ----- */
43 /* Audio Codec Control Reg Bit Masks */
44 /* ----- ----- ------- --- --- ----- */
47 #define MASK_EXMODEADDR (0x3ff << 12) /* Extended Mode Address -- 10 bits */
48 #define MASK_EXMODEDATA (0xfff) /* Extended Mode Data -- 12 bits */
50 /* Audio Codec Control Address Values / Masks */
[all …]
/linux/drivers/net/dsa/microchip/
H A Dksz8.c1 // SPDX-License-Identifier: GPL-2.0
6 * - KSZ8463
7 * - KSZ8863, KSZ8873 aka KSZ88X3
8 * - KSZ8895, KSZ8864 aka KSZ8895 family
9 * - KSZ8794, KSZ8795, KSZ8765 aka KSZ87XX
11 * - KSZ8563, KSZ8567 - see KSZ9477 driver
24 #include <linux/platform_data/microchip-ksz.h>
45 ksz_rmw8(dev, dev->dev_ops->get_port_addr(port, offset), bits, in ksz_port_cfg()
50 * ksz8_ind_write8 - EEE/ACL/PME indirect register write
57 * PME switch functionalities. Both 8-bit registers 110 and 111 are
[all …]
/linux/Documentation/devicetree/bindings/sound/
H A Dtdm-slot.txt6 dai-tdm-slot-num : Number of slots in use.
7 dai-tdm-slot-width : Width in bits for each slot.
8 dai-tdm-slot-tx-mask : Transmit direction slot mask, optional
9 dai-tdm-slot-rx-mask : Receive direction slot mask, optional
12 dai-tdm-slot-num = <2>;
13 dai-tdm-slot-width = <8>;
14 dai-tdm-slot-tx-mask = <0 1>;
15 dai-tdm-slot-rx-mask = <1 0>;
20 tx and rx masks.
22 For snd_soc_of_xlate_tdm_slot_mask(), the tx and rx masks will use a 1 bit
[all …]
/linux/arch/arm/mach-s3c/
H A Dwakeup-mask.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
15 * struct samsung_wakeup_mask - wakeup mask information
25 * samsung_sync_wakemask - sync wakeup mask information for pm
27 * @masks: The list of masks to use.
28 * @nr_masks: The number of entries pointed to buy @masks.
31 * of interrupts and control bits in @masks. We do this at suspend time
36 const struct samsung_wakeup_mask *masks,
/linux/drivers/gpu/drm/amd/display/dc/mpc/dcn20/
H A Ddcn20_mpc.c2 * Copyright 2012-15 Advanced Micro Devices, Inc.
6 * to deal in the Software without restriction, including without limitation
11 * The above copyright notice and this permission notice shall be included in
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
34 mpc20->mpc_regs->reg
40 mpc20->base.ctx
44 mpc20->mpc_shift->field_name, mpc20->mpc_mask->field_name
[all …]
/linux/drivers/net/ethernet/xilinx/
H A Dxilinx_axienet.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * Copyright (c) 2010 - 2012 Xilinx, Inc. All rights reserved.
148 #define XAE_IFGP_OFFSET 0x00000008 /* Tx Inter-frame gap adjustment*/
178 #define XAE_AM0_OFFSET 0x00000750 /* Frame Filter Mask Value Bytes 3-0 */
179 #define XAE_AM1_OFFSET 0x00000754 /* Frame Filter Mask Value Bytes 7-4 */
185 /* Bit Masks for Axi Ethernet RAF register */
204 /* Bit Masks for Axi Ethernet TPF and IFGP registers */
206 /* Transmit inter-frame gap adjustment value */
209 /* Bit Masks for Axi Ethernet IS, IE and IP registers, Same masks apply
229 /* Bit masks for Axi Ethernet VLAN TPID Word 0 register */
[all …]
/linux/drivers/net/ethernet/ezchip/
H A Dnps_enet.h1 /* SPDX-License-Identifier: GPL-2.0-only */
35 /* Tx control register masks and shifts */
43 /* Rx control register masks and shifts */
53 /* Interrupt enable for data buffer events register masks and shifts */
59 /* Gbps Eth MAC Configuration 0 register masks and shifts */
93 /* Gbps Eth MAC Configuration 1 register masks and shifts */
103 /* Gbps Eth MAC Configuration 2 register masks and shifts */
119 /* Gbps Eth MAC Configuration 3 register masks and shifts */
141 /* GE MAC, PCS reset control register masks and shifts */
147 /* Tx phase sync FIFO control register masks and shifts */
[all …]
/linux/kernel/cgroup/
H A Dcpuset-internal.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
39 /* bits in struct cpuset flags field */
50 /* The various types of files and directories in a cpuset file system */
82 * The user-configured masks can only be changed by writing to
84 * parent masks.
86 * The effective masks is the real masks that apply to the tasks
87 * in the cpuset. They may be changed if the configured masks are
96 * The user-configured masks are always the same with effective masks.
99 /* user-configured CPUs and Memory Nodes allow to tasks */
112 * to sub-partitions below & hence excluded from its effective_cpus.
[all …]
/linux/kernel/sched/
H A Dtopology.c1 // SPDX-License-Identifier: GPL-2.0
46 struct sched_group *group = sd->groups; in sched_domain_debug_one()
47 unsigned long flags = sd->flags; in sched_domain_debug_one()
52 printk(KERN_DEBUG "%*s domain-%d: ", level, "", level); in sched_domain_debug_one()
54 cpumask_pr_args(sched_domain_span(sd)), sd->name); in sched_domain_debug_one()
57 printk(KERN_ERR "ERROR: domain->span does not contain CPU%d\n", cpu); in sched_domain_debug_one()
60 printk(KERN_ERR "ERROR: domain->groups does not contain CPU%d\n", cpu); in sched_domain_debug_one()
67 if ((meta_flags & SDF_SHARED_CHILD) && sd->child && in sched_domain_debug_one()
68 !(sd->child->flags & flag)) in sched_domain_debug_one()
69 printk(KERN_ERR "ERROR: flag %s set here but not in child\n", in sched_domain_debug_one()
[all …]
/linux/drivers/usb/gadget/udc/
H A Dfsl_usb2_udc.h1 // SPDX-License-Identifier: GPL-2.0+
46 u32 otgsc; /* On-The-Go Status and Control */
83 u32 otgsc; /* On-The-Go Status and Control */
93 /* non-EHCI USB system interface registers (Big Endian) */
115 /* Frame Index Register Bit Masks */
117 /* USB CMD Register Bit Masks */
139 /* bit 9-8 are async schedule park mode count */
146 /* bit 23-16 are interrupt threshold control */
157 /* USB STS Register Bit Masks */
172 /* USB INTR Register Bit Masks */
[all …]
/linux/drivers/usb/phy/
H A Dphy-fsl-usb.h1 /* SPDX-License-Identifier: GPL-2.0+ */
4 #include <linux/usb/otg-fsm.h>
8 /* USB Command Register Bit Masks */
30 /* bit 9-8 are async schedule park mode count */
37 /* bit 23-16 are interrupt threshold control */
48 /* USB Status Register Bit Masks */
63 /* USB Interrupt Enable Register Bit Masks */
74 /* Device Address bit masks */
77 /* PORTSC Register Bit Masks,Only one PORT in OTG mode*/
99 /* bit 11-10 are line status */
[all …]
/linux/drivers/gpu/drm/amd/display/dc/hubbub/dcn301/
H A Ddcn301_hubbub.c6 * to deal in the Software without restriction, including without limitation
11 * The above copyright notice and this permission notice shall be included in
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
30 hubbub1->regs->reg
32 hubbub1->base.ctx->logger
34 hubbub1->base.ctx
38 hubbub1->shifts->field_name, hubbub1->masks->field_name
[all …]
/linux/net/openvswitch/
H A Dflow_table.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2007-2014 Nicira, Inc.
20 #include <linux/in.h>
50 return range->end - range->start; in range_n_bytes()
56 int start = full ? 0 : mask->rang in ovs_flow_mask_key()
[all...]
/linux/block/
H A Dblk-mq-cpumap.c1 // SPDX-License-Identifier: GPL-2.0
3 * CPU <-> hardware queue mapping helpers
5 * Copyright (C) 2013-2014 Jens Axboe
18 #include "blk-mq.h"
30 * blk_mq_num_possible_queues - Calc nr of queues for multiqueue devices
45 * blk_mq_num_online_queues - Calc nr of queues for multiqueue devices
61 const struct cpumask *masks; in blk_mq_map_queues() local
64 masks = group_cpus_evenly(qmap->nr_queues, &nr_masks); in blk_mq_map_queues()
65 if (!masks) { in blk_mq_map_queues()
67 qmap->mq_map[cpu] = qmap->queue_offset; in blk_mq_map_queues()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/hubbub/dcn201/
H A Ddcn201_hubbub.c6 * to deal in the Software without restriction, including without limitation
11 * The above copyright notice and this permission notice shall be included in
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
31 hubbub1->regs->reg
34 hubbub1->base.ctx->logger
37 hubbub1->base.ctx
41 hubbub1->shifts->field_name, hubbub1->masks->field_name
[all …]
/linux/drivers/crypto/bcm/
H A Dspu2.h1 /* SPDX-License-Identifier: GPL-2.0-only */
84 /* Fixed part of request message header length in bytes. Just FMD. */
89 /* FMD ctrl0 field masks */
113 /* FMD ctrl1 field masks */
120 #define SPU2_HASH_KEY_LEN 0xFF00 /* len of hash key in bytes.
124 #define SPU2_CIPH_KEY_LEN 0xFF00000 /* len of cipher key in bytes */
127 #define SPU2_HASH_IV 0x20000000 /* 1: IV incl in hash */
128 #define SPU2_RET_IV 0x40000000 /* 1: return IV in output msg
131 #define SPU2_RET_IV_LEN 0xF00000000 /* length in bytes of IV returned.
137 #define SPU2_IV_LEN 0x1F0000000000 /* length of input IV in bytes */
[all …]

12345678910>>...36