Searched +full:imx93 +full:- +full:media +full:- +full:blk +full:- +full:ctrl (Results 1 – 7 of 7) sorted by relevance
/linux/Documentation/devicetree/bindings/display/bridge/ |
H A D | fsl,imx93-mipi-dsi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx93-mipi-dsi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Liu Ying <victor.liu@nxp.com> 15 and extensions to them are controlled by i.MX93 media blk-ctrl. 18 - $ref: snps,dw-mipi-dsi.yaml# 22 const: fsl,imx93-mipi-dsi 26 - description: apb clock 27 - description: pixel clock [all …]
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/linux/Documentation/devicetree/bindings/soc/imx/ |
H A D | fsl,imx93-media-blk-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx93-media-blk-ctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NXP i.MX93 Media blk-ctrl 10 - Peng Fan <peng.fan@nxp.com> 15 clocking, reset, and miscellaneous top-level controls for peripherals 21 - const: fsl,imx93-media-blk-ctrl 22 - const: syscon 27 '#power-domain-cells': [all …]
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/linux/Documentation/devicetree/bindings/media/ |
H A D | nxp,imx8-isi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/nxp,imx8-isi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com> 16 number and nature is SoC-dependent. They cover both capture interfaces (MIPI 17 CSI-2 RX, HDMI RX, ...) and display engine outputs for writeback support. 22 - fsl,imx8mn-isi 23 - fsl,imx8mp-isi 24 - fsl,imx93-isi [all …]
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/linux/drivers/pmdomain/imx/ |
H A D | imx93-blk-ctrl.c | 1 // SPDX-License-Identifier: GPL-2.0 16 #include <dt-bindings/power/fsl,imx93-power.h> 103 const struct imx93_blk_ctrl_domain_data *data = domain->data; in imx93_blk_ctrl_set_qos() 104 struct imx93_blk_ctrl *bc = domain->bc; in imx93_blk_ctrl_set_qos() 109 for (i = 0; i < data->num_qos; i++) { in imx93_blk_ctrl_set_qos() 110 qos = &data->qos[i]; in imx93_blk_ctrl_set_qos() 112 mask = PRIO_MASK << qos->cfg_off; in imx93_blk_ctrl_set_qos() 113 mask |= PRIO_MASK << (qos->cfg_off + 4); in imx93_blk_ctrl_set_qos() 114 val = qos->cfg_prio << qos->cfg_off; in imx93_blk_ctrl_set_qos() 115 val |= qos->default_prio << (qos->cfg_off + 4); in imx93_blk_ctrl_set_qos() [all …]
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/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx93.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx93-clock.h> 7 #include <dt-bindings/dma/fsl-edma.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/power/fsl,imx93-power.h> 12 #include <dt-bindings/thermal/thermal.h> 14 #include "imx93-pinfunc.h" 17 interrupt-parent = <&gic>; [all …]
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/linux/drivers/gpu/drm/bridge/imx/ |
H A D | imx93-mipi-dsi.c | 1 // SPDX-License-Identifier: GPL-2.0+ 12 #include <linux/media-bus-format.h> 17 #include <linux/phy/phy-mipi-dphy.h> 42 #define M(x) FIELD_PREP(M_MASK, ((x) - 2)) 44 #define N(x) FIELD_PREP(N_MASK, ((x) - 1)) 121 /* DPHY Databook Table 3-13 Charge-pump Programmability */ 136 /* DPHY Databook Table 5-7 Frequency Ranges and Defaults */ 207 ret = regmap_write(dsi->regmap, reg, value); in dphy_pll_write() 209 dev_err(dsi->dev, "failed to write 0x%08x to pll reg 0x%x: %d\n", in dphy_pll_write() 224 struct device *dev = dsi->dev; in dphy_pll_get_configure_from_opts() [all …]
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/linux/ |
H A D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-scsi@vger.kernel.org 88 F: drivers/scsi/3w-* [all …]
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