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Searched +full:imx8qxp +full:- +full:iomuxc (Results 1 – 11 of 11) sorted by relevance

/linux/arch/arm64/boot/dts/freescale/
H A Dimx8qxp-ss-lsio.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2020 NXP
8 compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio";
9 gpio-ranges = <&iomuxc 1 56 12>,
10 <&iomuxc 13 69 4>,
11 <&iomuxc 19 75 4>,
12 <&iomuxc 24 80 1>,
13 <&iomuxc 25 82 7>;
17 compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio";
18 gpio-ranges = <&iomuxc 0 89 9>,
[all …]
H A Dimx8dxl-ss-lsio.dtsi1 // SPDX-License-Identifier: GPL-2.0+
7 compatible = "nxp,imx8dxl-fspi";
12 compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
14 gpio-ranges = <&iomuxc 0 47 13>,
15 <&iomuxc 13 61 4>,
16 <&iomuxc 19 67 4>,
17 <&iomuxc 24 72 1>;
21 compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
23 gpio-ranges = <&iomuxc 4 74 5>,
24 <&iomuxc 9 80 16>;
[all …]
H A Dimx8qxp-ai_ml.dts1 // SPDX-License-Identifier: GPL-2.0+
7 /dts-v1/;
9 #include "imx8qxp.dtsi"
13 compatible = "einfochips,imx8qxp-ai_ml", "fsl,imx8qxp";
22 stdout-path = &lpuart2;
31 compatible = "gpio-leds";
32 pinctrl-names = "default";
33 pinctrl-0 = <&pinctrl_leds>;
35 user-led1 {
38 linux,default-trigger = "heartbeat";
[all …]
H A Dtqma8xx.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR X11)
3 * Copyright 2018-2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
4 * D-82229 Seefeld, Germany.
14 reg_1v8: regulator-1v8 {
15 compatible = "regulator-fixed";
16 regulator-name = "V_1V8";
17 regulator-min-microvolt = <1800000>;
18 regulator-max-microvolt = <1800000>;
21 reg_3v3: regulator-3v3 {
22 compatible = "regulator-fixed";
[all …]
H A Dimx8qm.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 NXP
7 #include <dt-bindings/clock/imx8-lpcg.h>
8 #include <dt-bindings/firmware/imx/rsrc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/pinctrl/pads-imx8qm.h>
12 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
[all …]
H A Dimx8dxl-evk.dts1 // SPDX-License-Identifier: GPL-2.0+
6 /dts-v1/;
12 compatible = "fsl,imx8dxl-evk", "fsl,imx8dxl";
24 stdout-path = &lpuart0;
27 imx8dxl-cm4 {
28 compatible = "fsl,imx8qxp-cm4";
30 mbox-names = "tx", "rx", "rxdb";
32 memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>,
34 power-domains = <&pd IMX_SC_R_M4_0_PID0>, <&pd IMX_SC_R_M4_0_MU_1A>;
35 fsl,resource-id = <IMX_SC_R_M4_0_PID0>;
[all …]
H A Dimx8x-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
8 stdout-path = &lpuart3;
11 colibri_gpio_keys: gpio-keys {
12 compatible = "gpio-keys";
13 pinctrl-names = "default";
14 pinctrl-0 = <&pinctrl_gpiokeys>;
17 key-wakeup {
18 debounce-interval = <10>;
20 label = "Wake-Up";
22 wakeup-source;
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dfsl,scu-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/fsl,scu-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: i.MX SCU Client Device Node - Pinctrl Based on SCU Message Protocol
10 - Dong Aisheng <aisheng.dong@nxp.com>
13 Client nodes are maintained as children of the relevant IMX-SCU device node.
15 (Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt)
18 - $ref: pinctrl.yaml#
23 - fsl,imx8qm-iomuxc
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/linux/Documentation/devicetree/bindings/remoteproc/
H A Dfsl,imx-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/fsl,imx-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX Co-Processor
10 This binding provides support for ARM Cortex M4 Co-processor found on some NXP iMX SoCs.
13 - Peng Fan <peng.fan@nxp.com>
18 - fsl,imx6sx-cm4
19 - fsl,imx7d-cm4
20 - fsl,imx7ulp-cm4
[all …]
/linux/Documentation/devicetree/bindings/firmware/
H A Dfsl,scu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dong Aisheng <aisheng.dong@nxp.com>
13 The System Controller Firmware (SCFW) is a low-level system function
14 which runs on a dedicated Cortex-M core to provide power, clock, and
17 The AP communicates with the SC using a multi-ported MU module found
26 const: fsl,imx-scu
28 clock-controller:
31 $ref: /schemas/clock/fsl,scu-clk.yaml
[all …]
/linux/drivers/pinctrl/freescale/
H A Dpinctrl-imx8qxp.c1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright 2017-2018 NXP
8 #include <dt-bindings/pinctrl/pads-imx8qxp.h>
19 #include "pinctrl-imx.h"
208 { .compatible = "fsl,imx8qxp-iomuxc", },
226 .name = "imx8qxp-pinctrl",