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/freebsd/sys/contrib/device-tree/Bindings/display/imx/
H A Dfsl,imx8qxp-dc-pixel-engine.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-pixel-engine.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
13 functions. Interconnection of Processing Units is re-configurable.
16 - Liu Ying <victor.liu@nxp.com>
20 const: fsl,imx8qxp-dc-pixel-engine
28 "#address-cells":
31 "#size-cells":
37 "^blit-engine@[0-9a-f]+$":
[all …]
H A Dfsl,imx8qxp-dc-blit-engine.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-blit-engine.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
35 Modify colors by linear or non-linear transformations.
47 Performs a re-sampling of the source image with any pattern. The sample
59 - Liu Ying <victor.liu@nxp.com>
63 const: fsl,imx8qxp-dc-blit-engine
68 reg-names:
70 - const: pec
[all …]
H A Dfsl,imx8qxp-dc-display-engine.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-display-engine.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Liu Ying <victor.liu@nxp.com>
19 const: fsl,imx8qxp-dc-display-engine
24 reg-names:
26 - const: top
27 - const: cfg
35 interrupt-names:
[all …]
H A Dfsl,imx8qxp-dc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The Freescale i.MX8qxp Display Controller(DC) is comprised of three main
17 +---------------------------+------------+------------------+-+-+------+
18 | Display Controller (DC) | .......... | | | | |
20 | @@@@@@@@@@@ +----------+------------+------------+ | | | |
22 X <-+->| Sequencer | | @@@@@@@@@@@@@@@@@@@@@@@@@@@@ | V V V |
28 H <-+->| Configure | | V V V V | | Engine | |
[all …]
H A Dfsl,imx8qxp-dc-fetchunit.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-fetchunit.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 and the internal pixel processing pipeline, which is 30-bit RGB plus 8-bit
15 planes in Blit Engines, and comprises the following built-in functions to
18 +---------X-----------------------------------------+
21 | +---------+ |
25 | +---------+ |
28 | +---------+ |
[all …]
H A Dfsl,imx8qxp-dc-scaling-engine.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-scaling-engine.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 re-sampling with 1/32 sub pixel precision.
22 are LSBit precise (e.g. DC ripple free).
24 +-----------+
27 +-----------+
31 |\ +-----------+
32 ------+ | | |
[all …]
H A Dfsl,imx8qxp-dc-gammacor.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-gammacor.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
9 description: The unit supports non-linear color transformation.
12 - Liu Ying <victor.liu@nxp.com>
16 const: fsl,imx8qxp-dc-gammacor
22 - compatible
23 - reg
28 - |
[all …]
H A Dfsl,imx8qxp-dc-safety.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-safety.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Liu Ying <victor.liu@nxp.com>
18 const: fsl,imx8qxp-dc-safety
24 - compatible
25 - reg
30 - |
32 compatible = "fsl,imx8qxp-dc-safety";
H A Dfsl,imx8qxp-dc-layerblend.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-layerblend.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 - Liu Ying <victor.liu@nxp.com>
16 const: fsl,imx8qxp-dc-layerblend
21 reg-names:
23 - const: pec
24 - const: cfg
27 - compatible
[all …]
H A Dfsl,imx8qxp-dc-matrix.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-matrix.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The unit supports linear color transformation, alpha pre-multiply and
14 - Liu Ying <victor.liu@nxp.com>
18 const: fsl,imx8qxp-dc-matrix
24 reg-names:
26 - const: cfg # matrix in display engine
27 - items: # matrix in pixel engine
[all …]
H A Dfsl,imx8qxp-dc-filter.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-filter.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
16 - Liu Ying <victor.liu@nxp.com>
20 const: fsl,imx8qxp-dc-filter
25 reg-names:
27 - const: pec
28 - const: cfg
31 - compatible
[all …]
H A Dfsl,imx8qxp-dc-blitblend.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-blitblend.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Liu Ying <victor.liu@nxp.com>
18 const: fsl,imx8qxp-dc-blitblend
23 reg-names:
25 - const: pec
26 - const: cfg
29 - compatible
[all …]
H A Dfsl,imx8qxp-dc-rop.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-rop.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
16 - Liu Ying <victor.liu@nxp.com>
20 const: fsl,imx8qxp-dc-rop
25 reg-names:
27 - const: pec
28 - const: cfg
31 - compatible
[all …]
H A Dfsl,imx8qxp-dc-tcon.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-tcon.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Liu Ying <victor.liu@nxp.com>
18 const: fsl,imx8qxp-dc-tcon
28 - compatible
29 - reg
30 - port
35 - |
[all …]
H A Dfsl,imx8qxp-dc-command-sequencer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-command-sequencer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 By that it can load setups into the DC configuration and synchronize to
20 - Liu Ying <victor.liu@nxp.com>
24 const: fsl,imx8qxp-dc-command-sequencer
35 interrupt-names:
37 - const: error
38 - const: sw0
[all …]
H A Dfsl,imx8qxp-dc-clut.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-clut.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The unit implements 3 look-up tables with 256 x 10 bit entries each. These
11 can be used for different kinds of applications. From 10-bit input values
17 - Liu Ying <victor.liu@nxp.com>
21 const: fsl,imx8qxp-dc-clut
26 reg-names:
28 - const: pec
[all …]
H A Dfsl,imx8qxp-dc-constframe.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-constframe.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
17 - Liu Ying <victor.liu@nxp.com>
21 const: fsl,imx8qxp-dc-constframe
26 reg-names:
28 - const: pec
29 - const: cfg
32 - compatible
[all …]
H A Dfsl,imx8qxp-dc-dither.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-dither.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
25 - Liu Ying <victor.liu@nxp.com>
29 const: fsl,imx8qxp-dc-dither
35 - compatible
36 - reg
41 - |
43 compatible = "fsl,imx8qxp-dc-dither";
H A Dfsl,imx8qxp-dc-signature.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-signature.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
19 - Liu Ying <victor.liu@nxp.com>
23 const: fsl,imx8qxp-dc-signature
31 interrupt-names:
33 - const: shdload
34 - const: valid
35 - const: error
[all …]
H A Dfsl,imx8qxp-dc-framegen.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-framegen.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Liu Ying <victor.liu@nxp.com>
19 const: fsl,imx8qxp-dc-framegen
30 interrupt-names:
32 - const: int0
33 - const: int1
34 - const: int2
[all …]
H A Dfsl,imx8qxp-dc-axi-performance-counter.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-axi-performance-counter.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
16 - GLOBAL_COUNTER for overall measurement time
17 - BUSY_COUNTER for number of data bus busy cycles
18 - DATA_COUNTER for number of data transfer cycles
19 - TRANSFER_COUNTER for number of transfers
20 - ADDRBUSY_COUNTER for number of address bus busy cycles
21 - LATENCY_COUNTER for average latency
[all …]
H A Dfsl,imx8qxp-dc-extdst.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-extdst.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 processing pipeline of the Pixel Engine, which is 30-bit RGB plus 8-bit Alpha,
14 It comprises the following built-in Gamma apply function.
16 +------X-----------------------+
19 | +-------+ |
21 | +-------+ |
24 +------X-----------------------+
[all …]
H A Dfsl,imx8qxp-dc-store.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-store.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 pipeline, which is 30-bit RGB plus 8-bit Alpha, and the AXI bus for
13 It comprises a set of built-in functions to generate a wide range of buffer
17 +------X-------------------------+
20 | +-------+ |
22 | +-------+ |
25 | +-------+ |
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/bridge/
H A Dfsl,imx8qxp-pixel-link.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pixel-link.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <victor.liu@nxp.com>
27 - fsl,imx8qm-dc-pixel-link
28 - fsl,imx8qxp-dc-pixel-link
30 fsl,dc-id:
36 fsl,dc-stream-id:
52 "^port@[1-4]$":
[all …]
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dimx8qxp-lpcg.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/imx8qxp-lpcg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8QXP LPCG (Low-Power Clock Gating) Clock
10 - Aisheng Dong <aisheng.dong@nxp.com>
13 The Low-Power Clock Gate (LPCG) modules contain a local programming
24 include/dt-bindings/clock/imx8-lpcg.h
29 - const: fsl,imx8qxp-lpcg
30 - items:
[all …]

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