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/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dfsl,imx8mm-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/fsl,imx8mm-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale IMX8MM IOMUX Controller
10 - Anson Huang <Anson.Huang@nxp.com>
13 Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
18 const: fsl,imx8mm-iomuxc
37 be found in <arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h>. The last
38 integer CONFIG is the pad setting value like pull-up on this pin. Please
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H A Dfsl,imx8m-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/fsl,imx8m-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peng Fan <peng.fan@nxp.com>
13 Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
19 - fsl,imx8mm-iomuxc
20 - fsl,imx8mn-iomuxc
21 - fsl,imx8mp-iomuxc
22 - fsl,imx8mq-iomuxc
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/freebsd/sys/contrib/device-tree/Bindings/remoteproc/
H A Dfsl,imx-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/fsl,imx-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX Co-Processor
10 This binding provides support for ARM Cortex M4 Co-processor found on some NXP iMX SoCs.
13 - Peng Fan <peng.fan@nxp.com>
18 - fsl,imx6sx-cm4
19 - fsl,imx7d-cm4
20 - fsl,imx7ulp-cm4
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8mm.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mm-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/imx8mm-power.h>
11 #include <dt-bindings/reset/imx8mq-reset.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx8mm-pinfunc.h"
17 interrupt-parent = <&gic>;
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H A Dimx8mm-emtop-baseboard.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "imx8mm-emtop-som.dtsi"
12 compatible = "ees,imx8mm-emtop-baseboard", "ees,imx8mm-emtop-som",
13 "fsl,imx8mm";
17 pinctrl-names = "default";
18 pinctrl-0 = <&pinctrl_fec1>;
19 phy-mode = "rgmii-id";
20 phy-handle = <&ethphy0>;
21 fsl,magic-packet;
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H A Dimx8mm-ddr4-evk.dts1 // SPDX-License-Identifier: GPL-2.0+
6 /dts-v1/;
8 #include "imx8mm-evk.dtsi"
12 compatible = "fsl,imx8mm-ddr4-evk", "fsl,imx8mm";
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H A Dimx8mm-beacon-kit.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
8 #include "imx8mm.dtsi"
9 #include "imx8mm-beacon-som.dtsi"
10 #include "imx8mm-beacon-baseboard.dtsi"
14 compatible = "beacon,imx8mm-beacon-kit", "fsl,imx8mm";
17 stdout-path = &uart2;
21 compatible = "hdmi-connector";
26 remote-endpoint = <&adv7535_out>;
31 reg_hdmi: regulator-hdmi-dvdd {
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H A Dimx8mm-icore-mx8mm-ctouch2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include "imx8mm.dtsi"
10 #include "imx8mm-icore-mx8mm.dtsi"
14 compatible = "engicam,icore-mx8mm-ctouch2", "engicam,icore-mx8mm",
15 "fsl,imx8mm";
18 stdout-path = &uart2;
27 clock-frequency = <400000>;
28 pinctrl-names = "default";
29 pinctrl-0 = <&pinctrl_i2c2>;
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H A Dimx8mm-icore-mx8mm-edimm2.2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include "imx8mm.dtsi"
10 #include "imx8mm-icore-mx8mm.dtsi"
14 compatible = "engicam,icore-mx8mm-edimm2.2", "engicam,icore-mx8mm",
15 "fsl,imx8mm";
18 stdout-path = &uart2;
27 clock-frequency = <400000>;
28 pinctrl-names = "default";
29 pinctrl-0 = <&pinctrl_i2c2>;
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H A Dimx8mm-phygate-tauri-l-rs232-rts-cts.dtso1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * Tauri-L RS232 with RTS/CTS hardware flow control:
7 * - UART4_TX becomes RTS
8 * - UART4_RX becomes CTS
11 #include <dt-bindings/clock/imx8mm-clock.h>
12 #include "imx8mm-pinfunc.h"
14 /dts-v1/;
18 pinctrl-names = "default";
19 pinctrl-0 = <&pinctrl_uart2>;
20 assigned-clocks = <&clk IMX8MM_CLK_UART2>;
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H A Dimx8mm-venice-gw72xx-0x-imx219.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
8 #include "imx8mm-pinfunc.h"
10 /dts-v1/;
14 compatible = "gw,imx8mm-gw72xx-0x", "fsl,imx8mm";
16 reg_cam: regulator-cam {
17 pinctrl-names = "default";
18 pinctrl-0 = <&pinctrl_reg_cam>;
19 compatible = "regulator-fixed";
20 regulator-name = "reg_cam";
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H A Dimx8mm-venice-gw73xx-0x-imx219.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
8 #include "imx8mm-pinfunc.h"
10 /dts-v1/;
14 compatible = "gw,imx8mm-gw73xx-0x", "fsl,imx8mm";
16 reg_cam: regulator-cam {
17 pinctrl-names = "default";
18 pinctrl-0 = <&pinctrl_reg_cam>;
19 compatible = "regulator-fixed";
20 regulator-name = "reg_cam";
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H A Dimx8mm-venice-gw72xx-0x-rs232-rts.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * - GPIO4_0 rs485_en needs to be driven low (in-active)
7 * - UART4_TX becomes RTS
8 * - UART4_RX becomes CTS
11 #include <dt-bindings/gpio/gpio.h>
13 #include "imx8mm-pinfunc.h"
15 /dts-v1/;
19 compatible = "gw,imx8mm-gw72xx-0x";
24 gpio-hog;
26 output-low;
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H A Dimx8mm-venice-gw73xx-0x-rs232-rts.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * - GPIO4_0 rs485_en needs to be driven low (in-active)
7 * - UART4_TX becomes RTS
8 * - UART4_RX becomes CTS
11 #include <dt-bindings/gpio/gpio.h>
13 #include "imx8mm-pinfunc.h"
15 /dts-v1/;
19 compatible = "gw,imx8mm-gw73xx-0x";
24 gpio-hog;
26 output-low;
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H A Dimx8mm-venice-gw73xx-0x-rs232-rts.dtso1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * - GPIO4_0 rs485_en needs to be driven low (in-active)
7 * - UART4_TX becomes RTS
8 * - UART4_RX becomes CTS
11 #include <dt-bindings/gpio/gpio.h>
13 #include "imx8mm-pinfunc.h"
15 /dts-v1/;
19 compatible = "gw,imx8mm-gw73xx-0x";
23 rs485-en-hog {
24 gpio-hog;
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H A Dimx8mm-venice-gw72xx-0x-imx219.dtso1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
8 #include "imx8mm-pinfunc.h"
10 /dts-v1/;
14 compatible = "gw,imx8mm-gw72xx-0x", "fsl,imx8mm";
16 reg_vana: regulator-2p8v {
17 compatible = "regulator-fixed";
18 regulator-name = "2P8V";
19 regulator-min-microvolt = <2800000>;
20 regulator-max-microvolt = <2800000>;
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H A Dimx8mm-venice-gw73xx-0x-imx219.dtso1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
8 #include "imx8mm-pinfunc.h"
10 /dts-v1/;
14 compatible = "gw,imx8mm-gw73xx-0x", "fsl,imx8mm";
16 reg_vana: regulator-2p8v {
17 compatible = "regulator-fixed";
18 regulator-name = "2P8V";
19 regulator-min-microvolt = <2800000>;
20 regulator-max-microvolt = <2800000>;
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H A Dimx8mm-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright 2019-2020 NXP
6 /dts-v1/;
8 #include <dt-bindings/usb/pd.h>
9 #include "imx8mm-evk.dtsi"
13 compatible = "fsl,imx8mm-evk", "fsl,imx8mm";
21 operating-points-v2 = <&ddrc_opp_table>;
23 ddrc_opp_table: opp-table {
24 compatible = "operating-points-v2";
26 opp-25000000 {
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H A Dimx8mm-venice-gw72xx-0x-rs422.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * - GPIO1_0 rs485_term selects on-chip termination
7 * - GPIO4_0 rs485_en needs to be driven high (active)
8 * - GPIO4_2 rs485_hd needs to be driven low (in-active)
9 * - UART4_TX is DE for RS485 transmitter
10 * - RS485_EN needs to be pulled high
11 * - RS485_HALF needs to be low
14 #include <dt-bindings/gpio/gpio.h>
16 #include "imx8mm-pinfunc.h"
18 /dts-v1/;
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H A Dimx8mm-venice-gw73xx-0x-rs422.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * - GPIO1_0 rs485_term selects on-chip termination
7 * - GPIO4_0 rs485_en needs to be driven high (active)
8 * - GPIO4_2 rs485_hd needs to be driven low (in-active)
9 * - UART4_TX is DE for RS485 transmitter
10 * - RS485_EN needs to be pulled high
11 * - RS485_HALF needs to be low
14 #include <dt-bindings/gpio/gpio.h>
16 #include "imx8mm-pinfunc.h"
18 /dts-v1/;
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H A Dimx8mm-venice-gw72xx-0x-rs485.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * - GPIO1_0 rs485_term selects on-chip termination
7 * - GPIO4_0 rs485_en needs to be driven high (active)
8 * - GPIO4_2 rs485_hd needs to be driven high (active)
9 * - UART4_TX is DE for RS485 transmitter
10 * - RS485_EN needs to be pulled high
11 * - RS485_HALF needs to be pulled high
14 #include <dt-bindings/gpio/gpio.h>
16 #include "imx8mm-pinfunc.h"
18 /dts-v1/;
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H A Dimx8mm-venice-gw73xx-0x-rs485.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * - GPIO1_0 rs485_term selects on-chip termination
7 * - GPIO4_0 rs485_en needs to be driven high (active)
8 * - GPIO4_2 rs485_hd needs to be driven high (active)
9 * - UART4_TX is DE for RS485 transmitter
10 * - RS485_EN needs to be pulled high
11 * - RS485_HALF needs to be pulled high
14 #include <dt-bindings/gpio/gpio.h>
16 #include "imx8mm-pinfunc.h"
18 /dts-v1/;
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H A Dimx8mm-venice-gw73xx-0x-rs422.dtso1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * - GPIO1_0 rs485_term selects on-chip termination
7 * - GPIO4_0 rs485_en needs to be driven high (active)
8 * - GPIO4_2 rs485_hd needs to be driven low (in-active)
9 * - UART4_TX is DE for RS485 transmitter
10 * - RS485_EN needs to be pulled high
11 * - RS485_HALF needs to be low
14 #include <dt-bindings/gpio/gpio.h>
16 #include "imx8mm-pinfunc.h"
18 /dts-v1/;
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H A Dimx8mm-venice-gw73xx-0x-rs485.dtso1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * - GPIO1_0 rs485_term selects on-chip termination
7 * - GPIO4_0 rs485_en needs to be driven high (active)
8 * - GPIO4_2 rs485_hd needs to be driven high (active)
9 * - UART4_TX is DE for RS485 transmitter
10 * - RS485_EN needs to be pulled high
11 * - RS485_HALF needs to be pulled high
14 #include <dt-bindings/gpio/gpio.h>
16 #include "imx8mm-pinfunc.h"
18 /dts-v1/;
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/freebsd/sys/contrib/device-tree/Bindings/soc/imx/
H A Dfsl,imx-iomuxc-gpr.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx-iomuxc-gpr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peng Fan <peng.fan@nxp.com>
13 i.MX Processors have an IOMUXC General Purpose Register group for
19 - items:
20 - enum:
21 - fsl,imx6q-iomuxc-gpr
22 - fsl,imx8mq-iomuxc-gpr
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