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Searched +full:imx6sll +full:- +full:ccm (Results 1 – 5 of 5) sorted by relevance

/linux/Documentation/devicetree/bindings/clock/
H A Dimx6sll-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/imx6sll-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Abel Vesa <abelvesa@kernel.org>
11 - Peng Fan <peng.fan@nxp.com>
15 const: fsl,imx6sll-ccm
21 description: CCM provides 2 interrupt requests, request 1 is to generate
25 - description: CCM interrupt request 1
26 - description: CCM interrupt request 2
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/linux/arch/arm/mach-imx/
H A Dmach-imx6sl.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
23 gpr = syscon_regmap_lookup_by_compatible("fsl,imx6sl-iomuxc-gpr"); in imx6sl_fec_init()
30 pr_err("failed to find fsl,imx6sl-iomux-gpr regmap\n"); in imx6sl_fec_init()
38 platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0); in imx6sl_init_late()
64 imx6_pm_ccm_init("fsl,imx6sl-ccm"); in imx6sl_init_irq()
66 imx6_pm_ccm_init("fsl,imx6sll-ccm"); in imx6sl_init_irq()
71 "fsl,imx6sll",
H A Dpm-imx6.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2011-2014 Freescale Semiconductor, Inc.
13 #include <linux/irqchip/arm-gic.h>
15 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
24 #include <asm/proc-fns.h>
147 0x27c, 0x498, 0x4a4, 0x490, /* SDCLK0, GPR_B0DS-B1DS, GPR_ADDS */
153 .mmdc_compat = "fsl,imx6q-mmdc",
154 .src_compat = "fsl,imx6q-src",
155 .iomuxc_compat = "fsl,imx6q-iomuxc",
156 .gpc_compat = "fsl,imx6q-gpc",
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/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6sll.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Copyright 2017-2018 NXP.
8 #include <dt-bindings/clock/imx6sll-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include "imx6sll-pinfunc.h"
14 #address-cells = <1>;
15 #size-cells = <1>;
46 #address-cells = <1>;
47 #size-cells = <0>;
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/linux/drivers/clk/imx/
H A Dclk-imx6sll.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright 2017-2018 NXP.
7 #include <dt-bindings/clock/imx6sll-clock.h>
10 #include <linux/clk-provider.h>
89 clk_hw_data->num = IMX6SLL_CLK_END; in imx6sll_clocks_init()
90 hws = clk_hw_data->hws; in imx6sll_clocks_init()
101 np = of_find_compatible_node(NULL, NULL, "fsl,imx6sll-anatop"); in imx6sll_clocks_init()
148 * Bit 20 is the reserved and read-only bit, we do this only for: in imx6sll_clocks_init()
149 * - Do nothing for usbphy clk_enable/disable in imx6sll_clocks_init()
150 * - Keep refcount when do usbphy clk_enable/disable, in that case, in imx6sll_clocks_init()
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