Home
last modified time | relevance | path

Searched +full:imx27 +full:- +full:clock (Results 1 – 25 of 53) sorted by relevance

123

/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx27.dtsi1 // SPDX-License-Identifier: GPL-2.0+
5 #include "imx27-pinfunc.h"
7 #include <dt-bindings/clock/imx27-clock.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
17 * pre-existing /chosen node to be available to insert the
43 aitc: aitc-interrupt-controller@10040000 {
[all …]
H A Dimx51.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include "imx51-pinfunc.h"
7 #include <dt-bindings/clock/imx5-clock.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
17 * pre-existing /chosen node to be available to insert the
42 tzic: tz-interrupt-controller@e0000000 {
[all …]
H A Dimx27-apf27dev.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2013 Armadeus Systems - <support@armadeus.com>
7 #include "imx27-apf27.dts"
11 compatible = "armadeus,imx27-apf27dev", "armadeus,imx27-apf27", "fsl,imx27";
14 model = "Chimei-LW700AT9003";
15 bits-per-pixel = <16>; /* non-standard but required */
16 fsl,pcr = <0xfae80083>; /* non-standard but required */
17 display-timings {
18 native-mode = <&timing0>;
20 clock-frequency = <33000033>;
[all …]
H A Dimx27-apf27.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
9 /dts-v1/;
10 #include "imx27.dtsi"
14 compatible = "armadeus,imx27-apf27", "fsl,imx27";
23 clock-frequency = <0>;
27 imx27-apf27 {
61 pinctrl-names = "default";
62 pinctrl-0 = <&pinctrl_uart1>;
67 pinctrl-names = "default";
68 pinctrl-0 = <&pinctrl_fec1>;
[all …]
H A Dimx27-phytec-phycard-s-rdk.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include "imx27-phytec-phycard-s-som.dtsi"
10 compatible = "phytec,imx27-pca100-rdk", "phytec,imx27-pca100", "fsl,imx27";
13 stdout-path = &uart1;
17 model = "Primeview-PD050VL1";
18 bits-per-pixel = <16>; /* non-standard but required */
19 fsl,pcr = <0xf0c88080>; /* non-standard but required */
20 display-timings {
21 native-mode = <&timing0>;
25 hback-porch = <112>;
[all …]
H A Dimx27-phytec-phycore-rdk.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
5 #include "imx27-phytec-phycore-som.dtsi"
9 compatible = "phytec,imx27-pcm970", "phytec,imx27-pcm038", "fsl,imx27";
12 stdout-path = &uart1;
16 model = "Sharp-LQ035Q7";
17 bits-per-pixel = <16>;
20 display-timings {
21 native-mode = <&timing0>;
23 clock-frequency = <5500000>;
26 hback-porch = <5>;
[all …]
H A Dimx35.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 // based on imx27.dtsi
7 #include "imx35-pinfunc.h"
10 #address-cells = <1>;
11 #size-cells = <1>;
14 * pre-existing /chosen node to be available to insert the
38 #address-cells = <1>;
39 #size-cells = <0>;
42 compatible = "arm,arm1136jf-s";
48 avic: avic-interrupt-controller@68000000 {
[all …]
H A Dimx25.dtsi1 // SPDX-License-Identifier: GPL-2.0+
5 #include <dt-bindings/gpio/gpio.h>
6 #include "imx25-pinfunc.h"
9 #address-cells = <1>;
10 #size-cells = <1>;
13 * pre-existing /chosen node to be available to insert the
46 #address-cells = <1>;
47 #size-cells = <0>;
50 compatible = "arm,arm926ej-s";
56 asic: asic-interrupt-controller@68000000 {
[all …]
H A Dimx27-pdk.dts1 // SPDX-License-Identifier: GPL-2.0+
5 /dts-v1/;
6 #include "imx27.dtsi"
10 compatible = "fsl,imx27-pdk", "fsl,imx27";
19 compatible = "usb-nop-xceiv";
21 clock-names = "main_clk";
22 #phy-cells = <0>;
27 pinctrl-names = "default";
28 pinctrl-0 = <&pinctrl_cspi2>;
29 cs-gpios = <&gpio4 21 GPIO_ACTIVE_HIGH>;
[all …]
H A Dimx31.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright 2016-2018 Vladimir Zapolskiy <vz@mleia.com>
4 // Copyright 2012 Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
7 #address-cells = <1>;
8 #size-cells = <1>;
11 * pre-existing /chosen node to be available to insert the
34 #address-cells = <1>;
35 #size-cells = <0>;
38 compatible = "arm,arm1136jf-s";
44 avic: interrupt-controller@68000000 {
[all …]
H A Dimx27-eukrea-cpuimx27.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 /dts-v1/;
7 #include "imx27.dtsi"
11 compatible = "eukrea,cpuimx27", "fsl,imx27";
18 clk14745600: clk-uart {
19 compatible = "fixed-clock";
20 #clock-cells = <0>;
21 clock-frequency = <14745600>;
26 pinctrl-names = "default";
27 pinctrl-0 = <&pinctrl_fec>;
[all …]
H A Dimx53.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include "imx53-pinfunc.h"
7 #include <dt-bindings/clock/imx5-clock.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
17 * pre-existing /chosen node to be available to insert the
50 #address-cells = <1>;
[all …]
H A Dimx50.dtsi1 // SPDX-License-Identifier: GPL-2.0+
7 #include "imx50-pinfunc.h"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/imx5-clock.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
16 * pre-existing /chosen node to be available to insert the
47 #address-cells = <1>;
48 #size-cells = <0>;
51 compatible = "arm,cortex-a8";
[all …]
H A Dimx27-phytec-phycore-som.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 /dts-v1/;
7 #include "imx27.dtsi"
11 compatible = "phytec,imx27-pcm038", "fsl,imx27";
18 reg_3v3: regulator-0 {
19 compatible = "regulator-fixed";
20 regulator-name = "3V3";
21 regulator-min-microvolt = <3300000>;
22 regulator-max-microvolt = <3300000>;
25 reg_5v0: regulator-1 {
[all …]
H A Dimx27-eukrea-mbimxsd27-baseboard.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include "imx27-eukrea-cpuimx27.dtsi"
10 compatible = "eukrea,mbimxsd27-baseboard", "eukrea,cpuimx27", "fsl,imx27";
12 display0: CMO-QVGA {
13 model = "CMO-QVGA";
14 bits-per-pixel = <16>;
17 display-timings {
18 native-mode = <&timing0>;
20 clock-frequency = <6500000>;
23 hback-porch = <20>;
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dimx27-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/imx27-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX27 Clock Controller
10 - Fabio Estevam <festevam@gmail.com>
13 The clock consumer should specify the desired clock by having the clock
14 ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx27-clock.h
15 for the full list of i.MX27 clock IDs.
19 const: fsl,imx27-ccm
[all …]
/linux/Documentation/devicetree/bindings/usb/
H A Dchipidea,usb2-imx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/chipidea,usb2-imx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Xu Yang <xu.yang_2@nxp.com>
15 - enum:
16 - fsl,imx27-usb
17 - items:
18 - enum:
19 - fsl,imx23-usb
[all …]
/linux/Documentation/devicetree/bindings/crypto/
H A Dfsl-imx-sahara.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/crypto/fsl-imx-sahara.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Steffen Trumtrar <s.trumtrar@pengutronix.de>
15 - fsl,imx27-sahara
16 - fsl,imx53-sahara
23 - description: SAHARA Interrupt for Host 0
24 - description: SAHARA Interrupt for Host 1
29 - description: Sahara IPG clock
[all …]
/linux/Documentation/devicetree/bindings/dma/
H A Dfsl,imx-dma.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/dma/fsl,imx-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Animesh Agarwal <animeshagarwal28@gmail.com>
13 - $ref: dma-controller.yaml#
18 - fsl,imx1-dma
19 - fsl,imx21-dma
20 - fsl,imx27-dma
27 - description: DMA complete interrupt
[all …]
/linux/Documentation/devicetree/bindings/pwm/
H A Dimx-pwm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pwm/imx-pwm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Philipp Zabel <p.zabel@pengutronix.de>
13 - $ref: pwm.yaml#
16 "#pwm-cells":
19 PWM_POLARITY_INVERTED. fsl,imx1-pwm does not support this flags.
24 - enum:
25 - fsl,imx1-pwm
[all …]
/linux/Documentation/devicetree/bindings/mmc/
H A Dfsl-imx-mmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/fsl-imx-mmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Markus Pargmann <mpa@pengutronix.de>
13 - $ref: mmc-controller.yaml
18 - const: fsl,imx21-mmc
19 - const: fsl,imx31-mmc
20 - items:
21 - const: fsl,imx27-mmc
[all …]
/linux/Documentation/devicetree/bindings/memory-controllers/fsl/
H A Dfsl,imx-weim.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/fsl/fsl,imx-weim.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
11 - Sascha Hauer <s.hauer@pengutronix.de>
16 wireless and mobile applications that use low-power technology. The actual
21 pattern: "^memory-controller@[0-9a-f]+$"
25 - enum:
26 - fsl,imx1-weim
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8-ss-lsio.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2020 NXP
7 #include <dt-bindings/clock/imx8-lpcg.h>
8 #include <dt-bindings/firmware/imx/rsrc.h>
10 lsio_bus_clk: clock-lsio-bus {
11 compatible = "fixed-clock";
12 #clock-cells = <0>;
13 clock-frequency = <100000000>;
14 clock-output-names = "lsio_bus_clk";
18 compatible = "simple-bus";
[all …]
/linux/Documentation/devicetree/bindings/sound/
H A Dimx-audmux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/imx-audmux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Oleksij Rempel <o.rempel@pengutronix.de>
15 - items:
16 - enum:
17 - fsl,imx27-audmux
18 - const: fsl,imx21-audmux
19 - items:
[all …]
/linux/Documentation/devicetree/bindings/rtc/
H A Drtc-mxc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/rtc-mxc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Real Time Clock of the i.MX SoCs
10 - $ref: rtc.yaml#
13 - Philippe Reynes <tremyfr@gmail.com>
18 - const: fsl,imx1-rtc
19 - const: fsl,imx21-rtc
20 - items:
[all …]

123