| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/ |
| H A D | XtensaOperands.td | 11 // Immediate operands with a shared generic render method.
18 class Immediate<ValueType vt, code pred, string asmop>
24 // imm8 predicate - Immediate in the range [-128,127]
26 def imm8 : Immediate<i32, [{ return Imm >= -128 && Imm <= 127; }], "Imm8_AsmOperand"> {
31 // imm8_sh8 predicate - Immediate in the range [-32768,32512] with (bits[7-0] == 0)
34 def imm8_sh8 : Immediate<i32, [{ return Imm >= -32768 && Imm <= 32512 && ((Imm & 0xFF) == 0); }],
40 // imm12 predicate - Immediate in the range [-2048,2047]
42 def imm12 : Immediate<i32, [{ return Imm >= -2048 && Imm <= 2047; }], "Imm12_AsmOperand"> {
47 // imm12m predicate - Immediate for MOV operation
49 def imm12m : Immediate<i32, [{ return Imm >= -2048 && Imm <= 2047; }], "Imm12m_AsmOperand"> {
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| /freebsd/contrib/libpcap/ |
| H A D | pcap_set_immediate_mode.3pcap.in | 23 pcap_set_immediate_mode \- set immediate mode for a not-yet-activated capture
36 sets whether immediate mode should be set on a capture handle when
37 the handle is activated. In immediate mode, packets are always
41 is non-zero, immediate mode will be set, otherwise it will not be set.
52 releases, if immediate delivery of packets is required:
55 immediate mode must be turned on with a
66 on Solaris 10 and earlier versions of Solaris, immediate mode must be
68 will not provide immediate delivery of packets on other platforms, so
71 on Digital UNIX/Tru64 UNIX, immediate mode must be turned on by doing a
84 on Windows, immediate mode must be turned on by calling
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| /freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/ARM/ |
| H A D | EmulateInstructionARM.h | 192 // See A8.6.96 MOV (immediate) Operation.
207 // See A8.6.35 CMP (immediate) Operation.
322 // A8.6.8 ADD (SP plus immediate)
335 // A8.6.8 ADD (SP plus immediate)
341 // A8.6.23 BL, BLX (immediate)
353 // A8.6.212 SUB (immediate, ARM) -- Rd == r7 and Rm == ip
356 // A8.6.215 SUB (SP minus immediate) -- Rd == ip
359 // A8.6.215 SUB (SP minus immediate)
365 // A8.6.194 STR (immediate, ARM) -- Rn == sp
392 // A8.6.4 ADD (immediate, Thumb)
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZOperands.td | 41 // Constructs both a DAG pattern and instruction operand for an immediate
45 multiclass Immediate<ValueType vt, code pred, SDNodeXForm xform, string asmop> {
145 // A BDMode paired with an immediate length operand of LENSIZE bits.
169 // Extracting immediate operands from nodes
221 // Truncate an immediate to a 8-bit signed quantity.
227 // Truncate an immediate to a 8-bit unsigned quantity.
233 // Truncate an immediate to a 8-bit unsigned quantity and mask off low bit.
239 // Truncate an immediate to a 12-bit unsigned quantity.
245 // Truncate an immediate to a 16-bit signed quantity.
251 // Negate and then truncate an immediate t
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/MCTargetDesc/ |
| H A D | AVRFixupKinds.h | 48 /// Replaces the 8-bit immediate with another value.
51 /// Replaces the immediate operand of a 16-bit `Rd, K` instruction
54 /// Replaces the immediate operand of a 16-bit `Rd, K` instruction
57 /// Replaces the immediate operand of a 16-bit `Rd, K` instruction
60 /// Replaces the immediate operand of a 16-bit `Rd, K` instruction
64 /// Replaces the immediate operand of a 16-bit `Rd, K` instruction
67 /// Replaces the immediate operand of a 16-bit `Rd, K` instruction
70 /// Replaces the immediate operand of a 16-bit `Rd, K` instruction
73 /// Replaces the immediate operand of a 16-bit `Rd, K` instruction
77 /// Replaces the immediate operan
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| /freebsd/contrib/bearssl/T0/ |
| H A D | kern.t0 | 1 : \ `\n parse drop ; immediate
8 \ : ( `) parse drop ; immediate
10 : else postpone ahead 1 cs-roll postpone then ; immediate
11 : while postpone if 1 cs-roll ; immediate
12 : repeat postpone again postpone then ; immediate
14 : ['] ' ; immediate
15 : [compile] compile ; immediate
45 -1 __deflocals ; immediate
134 : case 0 ; immediate
135 : of 1+ postpone over postpone = postpone if postpone drop ; immediate
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/Disassembler/ |
| H A D | XtensaDisassembler.cpp | 108 assert(isUInt<18>(Imm) && "Invalid immediate"); in decodeCallOperand()
115 assert(isUInt<18>(Imm) && "Invalid immediate"); in decodeJumpOperand()
127 assert(isUInt<12>(Imm) && "Invalid immediate"); in decodeBranchOperand()
133 assert(isUInt<8>(Imm) && "Invalid immediate"); in decodeBranchOperand()
144 assert(isUInt<16>(Imm) && "Invalid immediate"); in decodeL32ROperand()
152 assert(isUInt<8>(Imm) && "Invalid immediate"); in decodeImm8Operand()
160 assert(isUInt<8>(Imm) && "Invalid immediate"); in decodeImm8_sh8Operand()
167 assert(isUInt<12>(Imm) && "Invalid immediate"); in decodeImm12Operand()
174 assert(isUInt<4>(Imm) && "Invalid immediate"); in decodeUimm4Operand()
181 assert(isUInt<5>(Imm) && "Invalid immediate"); in decodeUimm5Operand()
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| /freebsd/stand/ficl/softwords/ |
| H A D | prefix.fr | 20 : " postpone s" ; immediate
24 : .( postpone .( ; immediate
29 \ : // postpone \ ; immediate
46 : 0b 2 __tempbase ; immediate
48 : 0o 8 __tempbase ; immediate
50 \ : 0d 10 __tempbase ; immediate
53 \ : 0x 16 __tempbase ; immediate
|
| H A D | ifbrack.fr | 41 ; immediate
44 0= if postpone [else] then ; immediate
46 : [then] ( -- ) ; immediate
47 : [endif] ( -- ) ; immediate
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCCodeEmitter.cpp | 65 /// getLdStUImm12OpValue - Return encoding info for 12-bit unsigned immediate
73 /// getAdrLabelOpValue - Return encoding info for 21-bit immediate ADR label
79 /// getAddSubImmOpValue - Return encoding for the 12-bit immediate value and
122 /// getMoveWideImmOpValue - Return the encoded value for the immediate operand
252 /// getAdrLabelOpValue - Return encoding info for 21-bit immediate ADR label in getAdrLabelOpValue()
260 // If the destination is an immediate, we have nothing to do. in getAdrLabelOpValue()
277 /// getAddSubImmOpValue - Return encoding for the 12-bit immediate value and in getAddSubImmOpValue()
288 "unexpected shift type for add/sub immediate"); in getAddSubImmOpValue()
291 "unexpected shift value for add/sub immediate"); in getAddSubImmOpValue()
322 // If the destination is an immediate, w in getCondBranchTargetOpValue()
605 auto Immediate = MI.getOperand(OpIdx).getImm(); getImm8OptLsl() local
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| H A D | AArch64FixupKinds.h | 18 // A 21-bit pc-relative immediate inserted into an ADR instruction.
21 // A 21-bit pc-relative immediate inserted into an ADRP instruction.
35 // The high 19 bits of a 21-bit pc-relative immediate. Same encoding as
43 // The high 14 bits of a 21-bit pc-relative immediate.
46 // The high 16 bits of a 18-bit unsigned PC-relative immediate. Used by
51 // The high 19 bits of a 21-bit pc-relative immediate. Same encoding as
56 // The high 26 bits of a 28-bit pc-relative immediate.
59 // The high 26 bits of a 28-bit pc-relative immediate. Distinguished from
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/AsmParser/ |
| H A D | XtensaAsmParser.cpp | 108 Immediate, enumerator
137 case Immediate: in XtensaOperand()
148 bool isImm() const override { return Kind == Immediate; } in isImm()
152 return Kind == Immediate && inRange(getImm(), MinValue, MaxValue); in isImm()
164 // Convert MOVI to literal load, when immediate is not in range (-2048, 2047)
165 bool isImm12m() const { return Kind == Immediate; } in isImm12m()
197 if (Kind != Immediate) in isB4const()
227 if (Kind != Immediate) in isB4constu()
267 assert(Kind == Immediate && "Invalid type access!"); in getImm()
278 case Immediate: in print()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCInst.h | 40 kImmediate, ///< Immediate operand.
41 kSFPImmediate, ///< Single-floating-point immediate operand.
42 kDFPImmediate, ///< Double-Floating-point immediate operand.
43 kExpr, ///< Relocatable immediate operand.
81 assert(isImm() && "This is not an immediate"); in getImm()
86 assert(isImm() && "This is not an immediate"); in setImm()
91 assert(isSFPImm() && "This is not an SFP immediate"); in getSFPImm()
96 assert(isSFPImm() && "This is not an SFP immediate"); in setSFPImm()
101 assert(isDFPImm() && "This is not an FP immediate"); in getDFPImm()
106 assert(isDFPImm() && "This is not an FP immediate"); in setDFPImm()
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | X86RecognizableInstr.cpp | 519 // Operand 1 (optional) is an address or immediate. in emitInstructionSpecifier()
537 // Operand 1 (optional) is an address or immediate. in emitInstructionSpecifier()
555 // Operand 3 (optional) is an immediate. in emitInstructionSpecifier()
573 HANDLE_OPTIONAL(immediate) in emitInstructionSpecifier()
574 HANDLE_OPTIONAL(immediate) in emitInstructionSpecifier()
600 // Operand 3 (optional) is an immediate. in emitInstructionSpecifier()
619 HANDLE_OPTIONAL(immediate) in emitInstructionSpecifier()
620 HANDLE_OPTIONAL(immediate) in emitInstructionSpecifier()
626 // Operand 3 (optional) is an immediate. in emitInstructionSpecifier()
627 // Operand 4 (optional) is an immediate. in emitInstructionSpecifier()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ExpandImm.cpp | 1 //===- AArch64ExpandImm.h - AArch64 Immediate Expansion -------------------===//
128 // Clear chunk in the immediate. in updateImm()
131 // Set all bits in the immediate for the particular chunk. in updateImm()
220 // Create the ORR-immediate instruction. in trySequenceOfOnes()
270 // Find the logical immediate that covers the most bits in RemainingBits,
296 // Find the largest logical immediate that fits within the full immediate. in decomposeIntoOrrOfLogicalImmediates()
302 // Find the largest logical immediate covering the remaining bits, allowing in decomposeIntoOrrOfLogicalImmediates()
303 // for additional bits to be set that were also set in the original immediate. in decomposeIntoOrrOfLogicalImmediates()
315 // Attempt to expand an immediate as the ORR of a pair of logical immediates.
329 // Create the ORR-immediate instructions. in tryOrrOfLogicalImmediates()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMAddressingModes.h | 111 /// getSOImmValRotate - Try to handle Imm with an immediate shifter operand,
112 /// computing the rotate amount to use. If this immediate value cannot be
114 /// take a maximal chunk of bits out of the immediate.
141 // shifter_op immediate. Return a chunk of bits that will be useful to in getSOImmValRotate()
146 /// getSOImmVal - Given a 32-bit immediate, if it is something that can fit
147 /// into an shifter_operand immediate operand, return the 12-bit encoding for
208 /// getThumbImmValShift - Try to handle Imm with a 8-bit immediate followed
211 // 8-bit (or less) immediates are trivially immediate operand with a shift in getThumbImmValShift()
220 /// by left shifting a 8-bit immediate.
227 /// getThumbImm16ValShift - Try to handle Imm with a 16-bit immediate followed
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| H A D | ARMInstPrinter.cpp | 40 /// translateShiftImm - Convert shift immediate from 0-31 to 1-32 for printing.
63 printer.markup(O, llvm::MCInstPrinter::Markup::Immediate) in printRegImmShift()
171 markup(O, Markup::Immediate) in printInst()
348 markup(O, Markup::Immediate) << '#' << formatImm(Op.getImm()); in printOperand()
414 markup(O, Markup::Immediate) << "#-" << formatImm(-OffImm); in printThumbLdrLabelOperand()
416 markup(O, Markup::Immediate) << "#" << formatImm(OffImm); in printThumbLdrLabelOperand()
477 markup(O, Markup::Immediate) in printAM2PreOrOffsetIndexOp()
519 markup(O, Markup::Immediate) << "#1"; in printAddrModeTBH()
551 markup(O, Markup::Immediate) in printAddrMode2OffsetOperand()
586 // If the op is sub we have to print the immediate even if it is 0 in printAM3PreOrOffsetIndexOp()
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| /freebsd/sys/arm64/arm64/ |
| H A D | disassem.c | 44 #define OP_SIGN_EXT (1UL << 0) /* Sign-extend immediate value */
46 #define OP_MULT_4 (1UL << 2) /* Multiply immediate by 4 */
154 * IMM - immediate value
157 * SCALE - scaling of immediate value
165 TYPE_01, OP_RD_SP | OP_RN_SP }, /* add immediate */
172 /* ldr immediate post/pre index */
174 TYPE_02, 0 }, /* ldr immediate unsigned */
181 /* ldrb immediate post/pre index */
183 TYPE_02, OP_SF32 }, /* ldrb immediate unsigned */
188 /* ldrh immediate post/pre index */
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVMatInt.h | 1 //===- RISCVMatInt.h - Immediate materialisation ---------------*- C++ -*--===//
46 // immediate value into a register. A sequence of instructions represented by a
57 // immediate value into a register using an additional temporary register. This
65 // given immediate value into a register. This estimate does not account for
66 // `Val` possibly fitting into an immediate, and so may over-estimate.
69 // `Size`-bit immediate.
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/MCTargetDesc/ |
| H A D | M68kBaseInfo.h | 129 /// On a symbol operand this indicates that the immediate is the absolute
133 /// On a symbol operand this indicates that the immediate is the pc-relative
137 /// On a symbol operand this indicates that the immediate is the offset to
143 /// On a symbol operand this indicates that the immediate is the offset to
149 /// On a symbol operand this indicates that the immediate is offset to the
155 /// On a symbol operand this indicates that the immediate is offset to the
161 /// On a symbol operand, this indicates that the immediate is the offset to
167 /// On a symbol operand, this indicates that the immediate is the offset to
173 /// On a symbol operand, this indicates that the immediate is the offset to
179 /// On a symbol operand, this indicates that the immediate i
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| /freebsd/sys/arm64/include/ |
| H A D | db_machdep.h | 89 (((ins) & 0xffe00c00u) != 0x3c800400u)) || /* immediate post-indexed */ \
92 (((ins) & 0xffe00c00u) != 0x3c800c00u)) || /* immediate pre-indexed */ \
100 (((ins) & 0xffe00c00u) != 0x3c800000u)) || /* unscaled immediate */ \
103 (((ins) & 0xffc00000u) != 0x3d800000u)) || /* unsigned immediate */ \
111 (((ins) & 0xffe00c00u) == 0x3c800400u)) || /* immediate post-indexed */ \
113 (((ins) & 0xffe00c00u) == 0x3c800c00u)) || /* immediate pre-indexed */ \
118 (((ins) & 0xffe00c00u) == 0x3c800000u)) || /* unscaled immediate */ \
120 (((ins) & 0xffc00000u) == 0x3d800000u)) || /* unsigned immediate */ \
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/AsmParser/ |
| H A D | PPCAsmParser.cpp | 171 Immediate, enumerator
217 case Immediate: in PPCOperand()
248 assert(Kind == Immediate && "Invalid access!"); in getImm()
252 assert((Kind == Immediate || Kind == ContextImmediate) && in getImmS16Context()
254 if (Kind == Immediate) in getImmS16Context()
259 assert((Kind == Immediate || Kind == ContextImmediate) && in getImmU16Context()
333 return (unsigned) (Kind == Immediate ? Imm.Val : Expr.CRVal); in getCCReg()
338 return (unsigned) (Kind == Immediate ? Imm.Val : Expr.CRVal); in getCRBit()
348 return Kind == Immediate || Kind == Expression; in isImm()
350 bool isU1Imm() const { return Kind == Immediate && isUInt<1>(getImm()); } in isU1Imm()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsMCCodeEmitter.cpp | 230 // If the destination is an immediate, divide by 4.
252 // If the destination is an immediate, divide by 2.
274 // If the destination is an immediate, divide by 2.
297 // If the destination is an immediate, divide by 4.
320 // If the destination is an immediate, divide by 2.
341 // If the destination is an immediate, divide by 2.
362 // If the destination is an immediate, divide by 2.
384 // If the destination is an immediate, divide by 4.
406 // If the destination is an immediate, divide by 4.
428 // If the destination is an immediate, divid
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsAnalyzeImmediate.h | 26 /// Analyze - Get an instruction sequence to load immediate Imm. The last
38 /// load immediate Imm
42 /// load immediate Imm
46 /// load immediate Imm
49 /// GetInstSeqLs - Get instruction sequences to load immediate Imm.
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| /freebsd/contrib/llvm-project/clang/lib/Sema/ |
| H A D | SemaMIPS.cpp | 78 // These intrinsics take an unsigned 3 bit immediate. in CheckMipsBuiltinArgument()
91 // These intrinsics take an unsigned 4 bit immediate. in CheckMipsBuiltinArgument()
104 // These intrinsics take an unsigned 5 bit immediate. in CheckMipsBuiltinArgument()
145 // These intrinsics take an unsigned 6 bit immediate. in CheckMipsBuiltinArgument()
158 // These intrinsics take a signed 5 bit immediate. in CheckMipsBuiltinArgument()
179 // These intrinsics take an unsigned 8 bit immediate. in CheckMipsBuiltinArgument()
191 // These intrinsics take an unsigned 4 bit immediate. in CheckMipsBuiltinArgument()
197 // These intrinsics take an unsigned 3 bit immediate. in CheckMipsBuiltinArgument()
203 // These intrinsics take an unsigned 2 bit immediate. in CheckMipsBuiltinArgument()
209 // These intrinsics take an unsigned 1 bit immediate. in CheckMipsBuiltinArgument()
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|