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/freebsd/sys/contrib/device-tree/Bindings/ptp/
H A Dptp-idtcm.yaml7 title: IDT ClockMatrix (TM) PTP Clock
16 - idt,8a34000
17 - idt,8a34001
18 - idt,8a34002
19 - idt,8a34003
20 - idt,8a34004
21 - idt,8a34005
22 - idt,8a34006
23 - idt,8a34007
24 - idt,8a34008
[all …]
H A Dptp-idt82p33.yaml7 title: IDT 82P33 PTP Clock
10 IDT 82P33XXX Synchronization Management Unit (SMU) based PTP clock
18 - idt,82p33810
19 - idt,82p33813
20 - idt,82p33814
21 - idt,82p33831
22 - idt,82p33910
23 - idt,82p33913
24 - idt,82p33914
25 - idt,82p33931
[all …]
/freebsd/lib/libcalendar/
H A Dcalendar.c56 static date *date2idt(date *idt, date *dt);
57 static date *idt2date(date *dt, date *idt);
58 static int ndaysji(date *idt);
59 static int ndaysgi(date *idt);
69 date idt; /* Internal date representation */ in jdate() local
77 idt.y = ndays / 365; in jdate()
78 idt.m = 0; in jdate()
79 idt.d = 0; in jdate()
80 while ((r = ndaysji(&idt)) > ndays) in jdate()
81 idt.y--; in jdate()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Didt,versaclock5.yaml4 $id: http://devicetree.org/schemas/clock/idt,versaclock5.yaml#
7 title: IDT VersaClock 5 and 6 programmable I2C clock generators
10 The IDT VersaClock 5 and VersaClock 6 are programmable I2C
33 The idt,shutdown and idt,output-enable-active properties control the
53 - idt,5p49v5923
54 - idt,5p49v5925
55 - idt,5p49v5933
56 - idt,5p49v5935
57 - idt,5p49v60
58 - idt,5p49v6901
[all …]
H A Didt,versaclock5.txt1 Binding for IDT VersaClock 5,6 programmable i2c clock generators.
3 The IDT VersaClock 5 and VersaClock 6 are programmable i2c clock
10 "idt,5p49v5923"
11 "idt,5p49v5925"
12 "idt,5p49v5933"
13 "idt,5p49v5935"
14 "idt,5p49v6901"
15 "idt,5p49v6965"
75 /* IDT 5P49V5923 i2c clock generator */
77 compatible = "idt,5p49v5923";
/freebsd/sys/dev/sound/pci/hda/
H A Dhdacc.c216 { HDA_CODEC_IDT92HD005, 0, "IDT 92HD005" },
217 { HDA_CODEC_IDT92HD005D, 0, "IDT 92HD005D" },
218 { HDA_CODEC_IDT92HD206X, 0, "IDT 92HD206X" },
219 { HDA_CODEC_IDT92HD206D, 0, "IDT 92HD206D" },
220 { HDA_CODEC_IDT92HD66B1X5, 0, "IDT 92HD66B1X5" },
221 { HDA_CODEC_IDT92HD66B2X5, 0, "IDT 92HD66B2X5" },
222 { HDA_CODEC_IDT92HD66B3X5, 0, "IDT 92HD66B3X5" },
223 { HDA_CODEC_IDT92HD66C1X5, 0, "IDT 92HD66C1X5" },
224 { HDA_CODEC_IDT92HD66C2X5, 0, "IDT 92HD66C2X5" },
225 { HDA_CODEC_IDT92HD66C3X5, 0, "IDT 92HD66C3X5" },
[all …]
H A Dhdac.h708 /* IDT / Tempo Semiconductor */
710 #define HDA_CODEC_IDT92HD75BX HDA_CODEC_CONSTRUCT(IDT, 0x7603)
711 #define HDA_CODEC_IDT92HD83C1X HDA_CODEC_CONSTRUCT(IDT, 0x7604)
712 #define HDA_CODEC_IDT92HD81B1X HDA_CODEC_CONSTRUCT(IDT, 0x7605)
713 #define HDA_CODEC_IDT92HD75B3 HDA_CODEC_CONSTRUCT(IDT, 0x7608)
714 #define HDA_CODEC_IDT92HD73D1 HDA_CODEC_CONSTRUCT(IDT, 0x7674)
715 #define HDA_CODEC_IDT92HD73C1 HDA_CODEC_CONSTRUCT(IDT, 0x7675)
716 #define HDA_CODEC_IDT92HD73E1 HDA_CODEC_CONSTRUCT(IDT, 0x7676)
717 #define HDA_CODEC_IDT92HD95B HDA_CODEC_CONSTRUCT(IDT, 0x7695)
718 #define HDA_CODEC_IDT92HD71B8 HDA_CODEC_CONSTRUCT(IDT, 0x76b0)
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/freebsd/sys/contrib/device-tree/Bindings/misc/
H A Didt,89hpesx.yaml4 $id: http://devicetree.org/schemas/misc/idt,89hpesx.yaml#
7 title: EEPROM / CSR SMBus-slave interface of IDT 89HPESx devices
16 pattern: '^idt,89hpes'
23 - pattern: '^idt,89hpes(8nt2|12nt3|12n3a?|24n3a?|(12|24)t3g2|4t4g2|10t4g2|[56]t5|8t5a?)$'
24 - pattern: '^idt,89hpes(6t6g2|16t7|(24t6|32t8|48t12|16t4a?)(g2)?)$'
25 - pattern: '^idt,89hpes(24nt6a|32nt8[ab]|12nt12|16nt16|24nt24|32nt24[ab])g2$'
26 - pattern: '^idt,89hpes((32h8|48h12a?|22h16|34h16|64h16a?)(g2)?|16h16)$'
59 idt@74 {
60 compatible = "idt,89hpes32nt8ag2";
H A Didt_89hpesx.txt1 EEPROM / CSR SMBus-slave interface of IDT 89HPESx devices
5 Basically there is only one manufacturer: idt, but some
20 - reg : I2C address of the IDT 89HPESx device.
25 - reg: Custom address of EEPROM device (If not specified IDT 89HPESx
32 idt@60 {
33 compatible = "idt,89hpes32nt8ag2";
/freebsd/sys/contrib/device-tree/src/arm64/renesas/
H A Dbeacon-renesom-som.dtsi164 compatible = "idt,5p49v6965";
178 idt,mode = <VC5_CMOS>;
179 idt,voltage-microvolt = <1800000>;
180 idt,slew-percent = <100>;
184 idt,mode = <VC5_CMOS>;
185 idt,voltage-microvolt = <1800000>;
186 idt,slew-percent = <100>;
190 idt,mode = <VC5_CMOS>;
191 idt,voltage-microvolt = <1800000>;
192 idt,slew-percent = <100>;
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H A Dbeacon-renesom-baseboard.dtsi362 compatible = "idt,5p49v6965";
374 idt,mode = <VC5_CMOS>;
375 idt,voltage-microvolt = <1800000>;
376 idt,slew-percent = <100>;
380 idt,mode = <VC5_CMOS>;
381 idt,voltage-microvolt = <1800000>;
382 idt,slew-percent = <100>;
386 idt,mode = <VC5_CMOS>;
387 idt,voltage-microvolt = <3300000>;
388 idt,sle
[all...]
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Didt,3243x-emac.yaml4 $id: http://devicetree.org/schemas/net/idt,3243x-emac.yaml#
7 title: IDT 79rc3243x Ethernet controller
9 description: Ethernet controller integrated into IDT 79RC3243x family SoCs
19 const: idt,3243x-emac
60 compatible = "idt,3243x-emac";
/freebsd/sys/contrib/device-tree/Bindings/hwmon/
H A Djc42.txt30 idt,tse2002
31 idt,tse2004
32 idt,ts3000
33 idt,ts3001
H A Djedec,jc42.yaml30 - idt,tse2002
31 - idt,tse2004
32 - idt,ts3000
33 - idt,ts3001
/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Didt,32434-pic.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/idt,32434-pic.yaml#
7 title: IDT 79RC32434 Interrupt Controller
20 const: idt,32434-pic
42 compatible = "idt,32434-pic";
/freebsd/sys/contrib/device-tree/Bindings/gpio/
H A Didt,32434-gpio.yaml4 $id: http://devicetree.org/schemas/gpio/idt,32434-gpio.yaml#
7 title: IDT 79RC32434 GPIO controller
14 const: idt,32434-gpio
53 compatible = "idt,32434-gpio";
/freebsd/sys/dev/cxgb/common/
H A Dcxgb_mc5.c46 /* IDT 75P52100 commands */
52 /* IDT LAR register address and value for 144-bit mode (low 32 bits) */
56 /* IDT SCR and SSR addresses (low 32 bits) */
61 /* IDT GMR base address (low 32 bits) */
64 /* IDT data and mask array base addresses (low 32 bits) */
68 /* IDT 75N43102 commands */
73 /* IDT 75N43102 SCR address (low 32 bits) */
76 /* IDT 75N43102 GMR base addresses (low 32 bits) */
81 /* IDT 75N43102 data and mask array base addresses (low 32 bits) */
204 /* Set DBGI command mode for IDT TCAM. */ in init_idt52100()
[all …]
/freebsd/sys/x86/include/
H A Dintr_machdep.h39 * IDT vectors, but all other device interrupts allocate IDT vectors
40 * on demand. Currently we have 191 IDT vectors available for device
43 * can exceed the number of available IDT slots.
73 * "turn on" the interrupt on the CPU side by setting up an IDT entry, and
/freebsd/stand/efi/loader/arch/amd64/
H A Dtrap.c61 static struct region_descriptor fw_idt; /* Descriptor for pristine fw IDT */
63 shadow IDT */
64 static EFI_PHYSICAL_ADDRESS lidt_pa; /* Address of loader shadow IDT */
69 EFI_PHYSICAL_ADDRESS fw_intr_handlers[NUM_EXC]; /* fw handlers for < 32 IDT
254 printf("efi_redirect_exceptions: AllocatePages IDT error %lu\n", in efi_redirect_exceptions()
381 /* Switch to new IDT */ in efi_redirect_exceptions()
/freebsd/sys/dev/hyperv/vmbus/x86/
H A Dvmbus_x86.c151 * free IDT vector for Hyper-V ISR and set it up. in vmbus_setup_intr1()
159 device_printf(sc->vmbus_dev, "cannot find free IDT vector\n"); in vmbus_setup_intr1()
163 device_printf(sc->vmbus_dev, "vmbus IDT vector %d\n", in vmbus_setup_intr1()
/freebsd/stand/i386/btx/btx/
H A Dbtx.S25 .set MEM_IDT,0x5e00 # IDT
108 .set _IDTLM,MEM_TSS-MEM_IDT-1 # IDT limit
146 * Update real mode IDT for reflecting hardware interrupts.
150 mov $0x20*4,%di # First real mode IDT entry
158 * Create IDT.
192 lidt idtdesc # Set IDT
524 * Look up real mode IDT entry for hardware interrupts and VM86 INTx
619 lidt idtdesc # Set IDT
983 mov %ax,%ds # IDT entry
1009 idtdesc: .word _IDTLM,MEM_IDT,0x0 # IDT
[all …]
/freebsd/sys/i386/include/
H A Dsegments.h65 * region descriptors, used to load gdt/idt tables before segments yet exist.
87 extern struct gate_descriptor *idt;
/freebsd/contrib/llvm-project/llvm/include/llvm/Support/
H A DBalancedPartitioning.h60 using IDT = uint64_t;
64 BPFunctionNode(IDT Id, ArrayRef<UtilityNodeT> UtilityNodes) in BPFunctionNode()
68 IDT Id;
/freebsd/sys/x86/x86/
H A Dmsi.c121 u_int msi_vector:8; /* IDT vector. */
278 /* Allocate IDT vectors on this cpu. */ in msi_assign_cpu()
400 * Try to allocate 'count' interrupt sources with contiguous IDT values.
465 /* Allocate 'count' IDT vectors. */ in msi_alloc()
493 /* Assign IDT vectors and make these messages owned by 'dev'. */ in msi_alloc()
708 /* Allocate an IDT vector. */ in msix_alloc()
/freebsd/sys/i386/i386/
H A Dmachdep.c349 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */ variable
612 ip = idt + idx; in setidt_nodisp()
639 * Display the index and function name of any IDT entries that don't use
642 DB_SHOW_COMMAND_FLAGS(idt, db_show_idt, DB_CMD_MEMSAFE) in DB_SHOW_COMMAND_FLAGS() argument
649 ip = idt; in DB_SHOW_COMMAND_FLAGS()
1283 ip = &idt[x]; in fixup_idt()
1290 ("IDT[%d] type %d off %#x", x, ip->gd_type, off)); in fixup_idt()
1482 r_idt.rd_base = (int) idt; in init386()
1643 idt = pmap_trm_alloc(sizeof(idt0), M_NOWAIT | M_ZERO); in machdep_init_trampoline()
1644 bcopy(idt0, idt, sizeof(idt0)); in machdep_init_trampoline()
[all …]

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