14d846d26SWarner Losh /*- SPDX-License-Identifier: BSD-2-Clause
23f8f02b2SSouradeep Chakrabarti * Copyright (c) 2009-2012,2016-2017, 2022 Microsoft Corp.
33f8f02b2SSouradeep Chakrabarti * Copyright (c) 2012 NetApp Inc.
43f8f02b2SSouradeep Chakrabarti * Copyright (c) 2012 Citrix Inc.
53f8f02b2SSouradeep Chakrabarti * All rights reserved.
63f8f02b2SSouradeep Chakrabarti *
73f8f02b2SSouradeep Chakrabarti * Redistribution and use in source and binary forms, with or without
83f8f02b2SSouradeep Chakrabarti * modification, are permitted provided that the following conditions
93f8f02b2SSouradeep Chakrabarti * are met:
103f8f02b2SSouradeep Chakrabarti * 1. Redistributions of source code must retain the above copyright
113f8f02b2SSouradeep Chakrabarti * notice unmodified, this list of conditions, and the following
123f8f02b2SSouradeep Chakrabarti * disclaimer.
133f8f02b2SSouradeep Chakrabarti * 2. Redistributions in binary form must reproduce the above copyright
143f8f02b2SSouradeep Chakrabarti * notice, this list of conditions and the following disclaimer in the
153f8f02b2SSouradeep Chakrabarti * documentation and/or other materials provided with the distribution.
163f8f02b2SSouradeep Chakrabarti *
173f8f02b2SSouradeep Chakrabarti * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
183f8f02b2SSouradeep Chakrabarti * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
193f8f02b2SSouradeep Chakrabarti * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
203f8f02b2SSouradeep Chakrabarti * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
213f8f02b2SSouradeep Chakrabarti * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
223f8f02b2SSouradeep Chakrabarti * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
233f8f02b2SSouradeep Chakrabarti * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
243f8f02b2SSouradeep Chakrabarti * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
253f8f02b2SSouradeep Chakrabarti * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
263f8f02b2SSouradeep Chakrabarti * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
273f8f02b2SSouradeep Chakrabarti */
283f8f02b2SSouradeep Chakrabarti
293f8f02b2SSouradeep Chakrabarti /*
303f8f02b2SSouradeep Chakrabarti * VM Bus Driver Implementation
313f8f02b2SSouradeep Chakrabarti */
32*fdafd315SWarner Losh
333f8f02b2SSouradeep Chakrabarti #include <sys/param.h>
343f8f02b2SSouradeep Chakrabarti #include <sys/bus.h>
353f8f02b2SSouradeep Chakrabarti #include <sys/kernel.h>
363f8f02b2SSouradeep Chakrabarti #include <sys/linker.h>
373f8f02b2SSouradeep Chakrabarti #include <sys/lock.h>
383f8f02b2SSouradeep Chakrabarti #include <sys/malloc.h>
393f8f02b2SSouradeep Chakrabarti #include <sys/module.h>
403f8f02b2SSouradeep Chakrabarti #include <sys/mutex.h>
413f8f02b2SSouradeep Chakrabarti #include <sys/sbuf.h>
423f8f02b2SSouradeep Chakrabarti #include <sys/smp.h>
433f8f02b2SSouradeep Chakrabarti #include <sys/sysctl.h>
443f8f02b2SSouradeep Chakrabarti #include <sys/systm.h>
453f8f02b2SSouradeep Chakrabarti #include <sys/taskqueue.h>
463f8f02b2SSouradeep Chakrabarti
473f8f02b2SSouradeep Chakrabarti #include <vm/vm.h>
483f8f02b2SSouradeep Chakrabarti #include <vm/vm_param.h>
493f8f02b2SSouradeep Chakrabarti #include <vm/pmap.h>
503f8f02b2SSouradeep Chakrabarti
513f8f02b2SSouradeep Chakrabarti #include <machine/bus.h>
523f8f02b2SSouradeep Chakrabarti #include <machine/metadata.h>
533f8f02b2SSouradeep Chakrabarti #include <machine/md_var.h>
543f8f02b2SSouradeep Chakrabarti #include <machine/resource.h>
553f8f02b2SSouradeep Chakrabarti #include <machine/intr_machdep.h>
563f8f02b2SSouradeep Chakrabarti #include <contrib/dev/acpica/include/acpi.h>
573f8f02b2SSouradeep Chakrabarti #include <dev/acpica/acpivar.h>
583f8f02b2SSouradeep Chakrabarti
593f8f02b2SSouradeep Chakrabarti #include <dev/hyperv/include/hyperv.h>
603f8f02b2SSouradeep Chakrabarti #include <dev/hyperv/include/vmbus_xact.h>
613f8f02b2SSouradeep Chakrabarti #include <dev/hyperv/vmbus/hyperv_var.h>
623f8f02b2SSouradeep Chakrabarti #include <dev/hyperv/vmbus/vmbus_reg.h>
633f8f02b2SSouradeep Chakrabarti #include <dev/hyperv/vmbus/vmbus_var.h>
643f8f02b2SSouradeep Chakrabarti #include <dev/hyperv/vmbus/vmbus_chanvar.h>
653f8f02b2SSouradeep Chakrabarti #include <x86/include/apicvar.h>
663f8f02b2SSouradeep Chakrabarti #include <dev/hyperv/vmbus/x86/hyperv_machdep.h>
673f8f02b2SSouradeep Chakrabarti #include <dev/hyperv/vmbus/x86/hyperv_reg.h>
68d16d0b6bSSouradeep Chakrabarti #include <dev/hyperv/vmbus/hyperv_common_reg.h>
693f8f02b2SSouradeep Chakrabarti #include "acpi_if.h"
703f8f02b2SSouradeep Chakrabarti #include "pcib_if.h"
713f8f02b2SSouradeep Chakrabarti #include "vmbus_if.h"
723f8f02b2SSouradeep Chakrabarti
733f8f02b2SSouradeep Chakrabarti extern inthand_t IDTVEC(vmbus_isr), IDTVEC(vmbus_isr_pti);
743f8f02b2SSouradeep Chakrabarti #define VMBUS_ISR_ADDR trunc_page((uintptr_t)IDTVEC(vmbus_isr_pti))
753f8f02b2SSouradeep Chakrabarti
763f8f02b2SSouradeep Chakrabarti void vmbus_handle_timer_intr1(struct vmbus_message *msg_base,
773f8f02b2SSouradeep Chakrabarti struct trapframe *frame);
783f8f02b2SSouradeep Chakrabarti void vmbus_synic_setup1(void *xsc);
793f8f02b2SSouradeep Chakrabarti void vmbus_synic_teardown1(void);
803f8f02b2SSouradeep Chakrabarti int vmbus_setup_intr1(struct vmbus_softc *sc);
813f8f02b2SSouradeep Chakrabarti void vmbus_intr_teardown1(struct vmbus_softc *sc);
823f8f02b2SSouradeep Chakrabarti
833f8f02b2SSouradeep Chakrabarti void
vmbus_handle_timer_intr1(struct vmbus_message * msg_base,struct trapframe * frame)843f8f02b2SSouradeep Chakrabarti vmbus_handle_timer_intr1(struct vmbus_message *msg_base,
853f8f02b2SSouradeep Chakrabarti struct trapframe *frame)
863f8f02b2SSouradeep Chakrabarti {
873f8f02b2SSouradeep Chakrabarti volatile struct vmbus_message *msg;
883f8f02b2SSouradeep Chakrabarti msg = msg_base + VMBUS_SINT_TIMER;
893f8f02b2SSouradeep Chakrabarti if (msg->msg_type == HYPERV_MSGTYPE_TIMER_EXPIRED) {
903f8f02b2SSouradeep Chakrabarti msg->msg_type = HYPERV_MSGTYPE_NONE;
913f8f02b2SSouradeep Chakrabarti vmbus_et_intr(frame);
923f8f02b2SSouradeep Chakrabarti /*
933f8f02b2SSouradeep Chakrabarti * Make sure the write to msg_type (i.e. set to
943f8f02b2SSouradeep Chakrabarti * HYPERV_MSGTYPE_NONE) happens before we read the
953f8f02b2SSouradeep Chakrabarti * msg_flags and EOMing. Otherwise, the EOMing will
963f8f02b2SSouradeep Chakrabarti * not deliver any more messages since there is no
973f8f02b2SSouradeep Chakrabarti * empty slot
983f8f02b2SSouradeep Chakrabarti *
993f8f02b2SSouradeep Chakrabarti * NOTE:
1003f8f02b2SSouradeep Chakrabarti * mb() is used here, since atomic_thread_fence_seq_cst()
1013f8f02b2SSouradeep Chakrabarti * will become compiler fence on UP kernel.
1023f8f02b2SSouradeep Chakrabarti */
1033f8f02b2SSouradeep Chakrabarti mb();
1043f8f02b2SSouradeep Chakrabarti if (msg->msg_flags & VMBUS_MSGFLAG_PENDING) {
1053f8f02b2SSouradeep Chakrabarti /*
1063f8f02b2SSouradeep Chakrabarti * This will cause message queue rescan to possibly
1073f8f02b2SSouradeep Chakrabarti * deliver another msg from the hypervisor
1083f8f02b2SSouradeep Chakrabarti */
1093f8f02b2SSouradeep Chakrabarti wrmsr(MSR_HV_EOM, 0);
1103f8f02b2SSouradeep Chakrabarti }
1113f8f02b2SSouradeep Chakrabarti }
1123f8f02b2SSouradeep Chakrabarti return;
1133f8f02b2SSouradeep Chakrabarti }
1143f8f02b2SSouradeep Chakrabarti
1153f8f02b2SSouradeep Chakrabarti void
vmbus_synic_setup1(void * xsc)1163f8f02b2SSouradeep Chakrabarti vmbus_synic_setup1(void *xsc)
1173f8f02b2SSouradeep Chakrabarti {
1183f8f02b2SSouradeep Chakrabarti struct vmbus_softc *sc = xsc;
1193f8f02b2SSouradeep Chakrabarti uint32_t sint;
1203f8f02b2SSouradeep Chakrabarti uint64_t val, orig;
1213f8f02b2SSouradeep Chakrabarti
1223f8f02b2SSouradeep Chakrabarti sint = MSR_HV_SINT0 + VMBUS_SINT_TIMER;
1233f8f02b2SSouradeep Chakrabarti orig = RDMSR(sint);
1243f8f02b2SSouradeep Chakrabarti val = sc->vmbus_idtvec | MSR_HV_SINT_AUTOEOI |
1253f8f02b2SSouradeep Chakrabarti (orig & MSR_HV_SINT_RSVD_MASK);
1263f8f02b2SSouradeep Chakrabarti WRMSR(sint, val);
1273f8f02b2SSouradeep Chakrabarti return;
1283f8f02b2SSouradeep Chakrabarti }
1293f8f02b2SSouradeep Chakrabarti
1303f8f02b2SSouradeep Chakrabarti void
vmbus_synic_teardown1(void)1313f8f02b2SSouradeep Chakrabarti vmbus_synic_teardown1(void)
1323f8f02b2SSouradeep Chakrabarti {
1333f8f02b2SSouradeep Chakrabarti uint64_t orig;
1343f8f02b2SSouradeep Chakrabarti uint32_t sint;
1353f8f02b2SSouradeep Chakrabarti
1363f8f02b2SSouradeep Chakrabarti sint = MSR_HV_SINT0 + VMBUS_SINT_TIMER;
1373f8f02b2SSouradeep Chakrabarti orig = RDMSR(sint);
1383f8f02b2SSouradeep Chakrabarti WRMSR(sint, orig | MSR_HV_SINT_MASKED);
1393f8f02b2SSouradeep Chakrabarti return;
1403f8f02b2SSouradeep Chakrabarti }
1413f8f02b2SSouradeep Chakrabarti
1423f8f02b2SSouradeep Chakrabarti int
vmbus_setup_intr1(struct vmbus_softc * sc)1433f8f02b2SSouradeep Chakrabarti vmbus_setup_intr1(struct vmbus_softc *sc)
1443f8f02b2SSouradeep Chakrabarti {
1453f8f02b2SSouradeep Chakrabarti #if defined(__amd64__) && defined(KLD_MODULE)
1463f8f02b2SSouradeep Chakrabarti pmap_pti_add_kva(VMBUS_ISR_ADDR, VMBUS_ISR_ADDR + PAGE_SIZE, true);
1473f8f02b2SSouradeep Chakrabarti #endif
1483f8f02b2SSouradeep Chakrabarti
1493f8f02b2SSouradeep Chakrabarti /*
1503f8f02b2SSouradeep Chakrabarti * All Hyper-V ISR required resources are setup, now let's find a
1513f8f02b2SSouradeep Chakrabarti * free IDT vector for Hyper-V ISR and set it up.
1523f8f02b2SSouradeep Chakrabarti */
1533f8f02b2SSouradeep Chakrabarti sc->vmbus_idtvec = lapic_ipi_alloc(
1543f8f02b2SSouradeep Chakrabarti pti ? IDTVEC(vmbus_isr_pti) : IDTVEC(vmbus_isr));
1553f8f02b2SSouradeep Chakrabarti if (sc->vmbus_idtvec < 0) {
1563f8f02b2SSouradeep Chakrabarti #if defined(__amd64__) && defined(KLD_MODULE)
1573f8f02b2SSouradeep Chakrabarti pmap_pti_remove_kva(VMBUS_ISR_ADDR, VMBUS_ISR_ADDR + PAGE_SIZE);
1583f8f02b2SSouradeep Chakrabarti #endif
1593f8f02b2SSouradeep Chakrabarti device_printf(sc->vmbus_dev, "cannot find free IDT vector\n");
1603f8f02b2SSouradeep Chakrabarti return ENXIO;
1613f8f02b2SSouradeep Chakrabarti }
1623f8f02b2SSouradeep Chakrabarti if (bootverbose) {
1633f8f02b2SSouradeep Chakrabarti device_printf(sc->vmbus_dev, "vmbus IDT vector %d\n",
1643f8f02b2SSouradeep Chakrabarti sc->vmbus_idtvec);
1653f8f02b2SSouradeep Chakrabarti }
1663f8f02b2SSouradeep Chakrabarti return 0;
1673f8f02b2SSouradeep Chakrabarti }
1683f8f02b2SSouradeep Chakrabarti
1693f8f02b2SSouradeep Chakrabarti void
vmbus_intr_teardown1(struct vmbus_softc * sc)1703f8f02b2SSouradeep Chakrabarti vmbus_intr_teardown1(struct vmbus_softc *sc)
1713f8f02b2SSouradeep Chakrabarti {
1723f8f02b2SSouradeep Chakrabarti int cpu;
1733f8f02b2SSouradeep Chakrabarti
1743f8f02b2SSouradeep Chakrabarti if (sc->vmbus_idtvec >= 0) {
1753f8f02b2SSouradeep Chakrabarti lapic_ipi_free(sc->vmbus_idtvec);
1763f8f02b2SSouradeep Chakrabarti sc->vmbus_idtvec = -1;
1773f8f02b2SSouradeep Chakrabarti }
1783f8f02b2SSouradeep Chakrabarti
1793f8f02b2SSouradeep Chakrabarti #if defined(__amd64__) && defined(KLD_MODULE)
1803f8f02b2SSouradeep Chakrabarti pmap_pti_remove_kva(VMBUS_ISR_ADDR, VMBUS_ISR_ADDR + PAGE_SIZE);
1813f8f02b2SSouradeep Chakrabarti #endif
1823f8f02b2SSouradeep Chakrabarti
1833f8f02b2SSouradeep Chakrabarti CPU_FOREACH(cpu) {
1843f8f02b2SSouradeep Chakrabarti if (VMBUS_PCPU_GET(sc, event_tq, cpu) != NULL) {
1853f8f02b2SSouradeep Chakrabarti taskqueue_free(VMBUS_PCPU_GET(sc, event_tq, cpu));
1863f8f02b2SSouradeep Chakrabarti VMBUS_PCPU_GET(sc, event_tq, cpu) = NULL;
1873f8f02b2SSouradeep Chakrabarti }
1883f8f02b2SSouradeep Chakrabarti if (VMBUS_PCPU_GET(sc, message_tq, cpu) != NULL) {
1893f8f02b2SSouradeep Chakrabarti taskqueue_drain(VMBUS_PCPU_GET(sc, message_tq, cpu),
1903f8f02b2SSouradeep Chakrabarti VMBUS_PCPU_PTR(sc, message_task, cpu));
1913f8f02b2SSouradeep Chakrabarti taskqueue_free(VMBUS_PCPU_GET(sc, message_tq, cpu));
1923f8f02b2SSouradeep Chakrabarti VMBUS_PCPU_GET(sc, message_tq, cpu) = NULL;
1933f8f02b2SSouradeep Chakrabarti }
1943f8f02b2SSouradeep Chakrabarti }
1953f8f02b2SSouradeep Chakrabarti }
196