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/linux/drivers/gpu/drm/i915/
H A Di915_drv.h1 /* i915_drv.h -- Private header for the I915 driver -*- linux-c -*-
71 /* Data Stolen Memory (DSM) aka "i915 stolen memory" */
185 /* i915 device parameters */
262 * scheduling within i915, which used to be scheduled on the
372 static inline struct intel_gt *to_gt(const struct drm_i915_private *i915) in to_gt() argument
374 return i915->gt[0]; in to_gt()
385 #define INTEL_INFO(i915) ((i915)->__info) argument
386 #define RUNTIME_INFO(i915) (&(i915)->__runtime) argument
387 #define DRIVER_CAPS(i915) (&(i915)->caps) argument
389 #define INTEL_DEVID(i915) (RUNTIME_INFO(i915)->device_id) argument
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H A Dvlv_sideband.h28 void vlv_iosf_sb_init(struct drm_i915_private *i915);
29 void vlv_iosf_sb_fini(struct drm_i915_private *i915);
31 void vlv_iosf_sb_get(struct drm_i915_private *i915, unsigned long ports);
32 void vlv_iosf_sb_put(struct drm_i915_private *i915, unsigned long ports);
34 static inline void vlv_bunit_get(struct drm_i915_private *i915) in vlv_bunit_get() argument
36 vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_BUNIT)); in vlv_bunit_get()
39 u32 vlv_bunit_read(struct drm_i915_private *i915, u32 reg);
40 void vlv_bunit_write(struct drm_i915_private *i915, u32 reg, u32 val);
42 static inline void vlv_bunit_put(struct drm_i915_private *i915) in vlv_bunit_put() argument
44 vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_BUNIT)); in vlv_bunit_put()
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H A Dvlv_sideband.c31 static void __vlv_punit_get(struct drm_i915_private *i915) in __vlv_punit_get() argument
45 if (IS_VALLEYVIEW(i915)) { in __vlv_punit_get()
46 cpu_latency_qos_update_request(&i915->vlv_iosf_sb.qos, 0); in __vlv_punit_get()
51 static void __vlv_punit_put(struct drm_i915_private *i915) in __vlv_punit_put() argument
53 if (IS_VALLEYVIEW(i915)) in __vlv_punit_put()
54 cpu_latency_qos_update_request(&i915->vlv_iosf_sb.qos, in __vlv_punit_put()
60 void vlv_iosf_sb_get(struct drm_i915_private *i915, unsigned long ports) in vlv_iosf_sb_get() argument
63 __vlv_punit_get(i915); in vlv_iosf_sb_get()
65 mutex_lock(&i915->vlv_iosf_sb.lock); in vlv_iosf_sb_get()
68 void vlv_iosf_sb_put(struct drm_i915_private *i915, unsigned long ports) in vlv_iosf_sb_put() argument
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H A Di915_getparam.c18 struct drm_i915_private *i915 = to_i915(dev); in i915_getparam_ioctl() local
19 struct intel_display *display = &i915->display; in i915_getparam_ioctl()
21 const struct sseu_dev_info *sseu = &to_gt(i915)->info.sseu; in i915_getparam_ioctl()
39 value = to_gt(i915)->ggtt->num_fences; in i915_getparam_ioctl()
45 value = !!intel_engine_lookup_user(i915, in i915_getparam_ioctl()
49 value = !!intel_engine_lookup_user(i915, in i915_getparam_ioctl()
53 value = !!intel_engine_lookup_user(i915, in i915_getparam_ioctl()
57 value = !!intel_engine_lookup_user(i915, in i915_getparam_ioctl()
61 value = HAS_LLC(i915); in i915_getparam_ioctl()
64 value = HAS_WT(i915); in i915_getparam_ioctl()
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H A Di915_switcheroo.c15 struct drm_i915_private *i915 = pdev_to_i915(pdev); in i915_switcheroo_set_state() local
18 if (!i915) { in i915_switcheroo_set_state()
22 if (!HAS_DISPLAY(i915)) { in i915_switcheroo_set_state()
28 drm_info(&i915->drm, "switched on\n"); in i915_switcheroo_set_state()
29 i915->drm.switch_power_state = DRM_SWITCH_POWER_CHANGING; in i915_switcheroo_set_state()
30 /* i915 resume handler doesn't set to D0 */ in i915_switcheroo_set_state()
32 i915_driver_resume_switcheroo(i915); in i915_switcheroo_set_state()
33 i915->drm.switch_power_state = DRM_SWITCH_POWER_ON; in i915_switcheroo_set_state()
35 drm_info(&i915->drm, "switched off\n"); in i915_switcheroo_set_state()
36 i915->drm.switch_power_state = DRM_SWITCH_POWER_CHANGING; in i915_switcheroo_set_state()
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H A Dintel_sbi.c13 static int intel_sbi_rw(struct drm_i915_private *i915, u16 reg, in intel_sbi_rw() argument
17 struct intel_uncore *uncore = &i915->uncore; in intel_sbi_rw()
20 lockdep_assert_held(&i915->sbi_lock); in intel_sbi_rw()
25 drm_err(&i915->drm, in intel_sbi_rw()
44 drm_err(&i915->drm, in intel_sbi_rw()
50 drm_err(&i915->drm, "error during SBI read of reg %x\n", reg); in intel_sbi_rw()
60 void intel_sbi_lock(struct drm_i915_private *i915) in intel_sbi_lock() argument
62 mutex_lock(&i915->sbi_lock); in intel_sbi_lock()
65 void intel_sbi_unlock(struct drm_i915_private *i915) in intel_sbi_unlock() argument
67 mutex_unlock(&i915->sbi_lock); in intel_sbi_unlock()
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H A Dintel_step.c135 static u8 gmd_to_intel_step(struct drm_i915_private *i915, in gmd_to_intel_step() argument
141 drm_dbg(&i915->drm, "Using future steppings\n"); in gmd_to_intel_step()
148 void intel_step_init(struct drm_i915_private *i915) in intel_step_init() argument
152 int revid = INTEL_REVID(i915); in intel_step_init()
155 if (HAS_GMD_ID(i915)) { in intel_step_init()
156 step.graphics_step = gmd_to_intel_step(i915, in intel_step_init()
157 &RUNTIME_INFO(i915)->graphics.ip); in intel_step_init()
158 step.media_step = gmd_to_intel_step(i915, in intel_step_init()
159 &RUNTIME_INFO(i915)->media.ip); in intel_step_init()
161 RUNTIME_INFO(i915)->step = step; in intel_step_init()
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H A Dintel_device_info.c229 static void intel_device_info_subplatform_init(struct drm_i915_private *i915) in intel_device_info_subplatform_init() argument
231 const struct intel_device_info *info = INTEL_INFO(i915); in intel_device_info_subplatform_init()
232 const struct intel_runtime_info *rinfo = RUNTIME_INFO(i915); in intel_device_info_subplatform_init()
235 u16 devid = INTEL_DEVID(i915); in intel_device_info_subplatform_init()
239 RUNTIME_INFO(i915)->platform_mask[pi] = BIT(pb); in intel_device_info_subplatform_init()
248 if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { in intel_device_info_subplatform_init()
294 RUNTIME_INFO(i915)->platform_mask[pi] |= mask; in intel_device_info_subplatform_init()
297 static void ip_ver_read(struct drm_i915_private *i915, u32 offset, struct intel_ip_version *ip) in ip_ver_read() argument
299 struct pci_dev *pdev = to_pci_dev(i915->drm.dev); in ip_ver_read()
306 if (drm_WARN_ON(&i915->drm, !addr)) in ip_ver_read()
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H A Di915_pmu.c151 struct drm_i915_private *i915 = pmu_to_i915(pmu); in pmu_needs_timer() local
171 if (i915->caps.scheduler & I915_SCHEDULER_CAP_ENGINE_BUSY_STATS) in pmu_needs_timer()
182 struct drm_i915_private *i915 = gt->i915; in __get_rc6() local
187 if (HAS_RC6p(i915)) in __get_rc6()
190 if (HAS_RC6pp(i915)) in __get_rc6()
220 struct drm_i915_private *i915 = gt->i915; in get_rc6() local
222 struct i915_pmu *pmu = &i915->pmu; in get_rc6()
261 struct drm_i915_private *i915 = pmu_to_i915(pmu); in init_rc6() local
265 for_each_gt(gt, i915, i) { in init_rc6()
281 struct i915_pmu *pmu = &gt->i915->pmu; in park_rc6()
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/linux/drivers/gpu/drm/i915/soc/
H A Dintel_gmch.c22 int intel_gmch_bridge_setup(struct drm_i915_private *i915) in intel_gmch_bridge_setup() argument
24 int domain = pci_domain_nr(to_pci_dev(i915->drm.dev)->bus); in intel_gmch_bridge_setup()
26 i915->gmch.pdev = pci_get_domain_bus_and_slot(domain, 0, PCI_DEVFN(0, 0)); in intel_gmch_bridge_setup()
27 if (!i915->gmch.pdev) { in intel_gmch_bridge_setup()
28 drm_err(&i915->drm, "bridge device not found\n"); in intel_gmch_bridge_setup()
32 return drmm_add_action_or_reset(&i915->drm, intel_gmch_bridge_release, in intel_gmch_bridge_setup()
33 i915->gmch.pdev); in intel_gmch_bridge_setup()
36 static int mchbar_reg(struct drm_i915_private *i915) in mchbar_reg() argument
38 return GRAPHICS_VER(i915) >= 4 ? MCHBAR_I965 : MCHBAR_I915; in mchbar_reg()
43 intel_alloc_mchbar_resource(struct drm_i915_private *i915) in intel_alloc_mchbar_resource() argument
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H A Dintel_dram.c52 static bool pnv_is_ddr3(struct drm_i915_private *i915) in pnv_is_ddr3() argument
54 return intel_uncore_read(&i915->uncore, CSHRDDR3CTL) & CSHRDDR3CTL_DDR3; in pnv_is_ddr3()
96 static unsigned int chv_mem_freq(struct drm_i915_private *i915) in chv_mem_freq() argument
100 vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_CCK)); in chv_mem_freq()
101 val = vlv_cck_read(i915, CCK_FUSE_REG); in chv_mem_freq()
102 vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_CCK)); in chv_mem_freq()
112 static unsigned int vlv_mem_freq(struct drm_i915_private *i915) in vlv_mem_freq() argument
116 vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_PUNIT)); in vlv_mem_freq()
117 val = vlv_punit_read(i915, PUNIT_REG_GPU_FREQ_STS); in vlv_mem_freq()
118 vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_PUNIT)); in vlv_mem_freq()
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/linux/drivers/gpu/drm/i915/selftests/
H A Dmock_gem_device.c46 void mock_device_flush(struct drm_i915_private *i915) in mock_device_flush() argument
48 struct intel_gt *gt = to_gt(i915); in mock_device_flush()
61 struct drm_i915_private *i915 = to_i915(dev); in mock_device_release() local
63 if (!i915->do_release) in mock_device_release()
66 mock_device_flush(i915); in mock_device_release()
67 intel_gt_driver_remove(to_gt(i915)); in mock_device_release()
69 i915_gem_drain_workqueue(i915); in mock_device_release()
71 mock_fini_ggtt(to_gt(i915)->ggtt); in mock_device_release()
72 destroy_workqueue(i915->unordered_wq); in mock_device_release()
73 destroy_workqueue(i915->wq); in mock_device_release()
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H A Digt_live_test.c16 struct drm_i915_private *i915, in igt_live_test_begin() argument
26 t->i915 = i915; in igt_live_test_begin()
30 for_each_gt(gt, i915, i) { in igt_live_test_begin()
41 i915_reset_engine_count(&i915->gpu_error, in igt_live_test_begin()
45 t->reset_global = i915_reset_count(&i915->gpu_error); in igt_live_test_begin()
52 struct drm_i915_private *i915 = t->i915; in igt_live_test_end() local
58 if (igt_flush_test(i915)) in igt_live_test_end()
61 if (t->reset_global != i915_reset_count(&i915->gpu_error)) { in igt_live_test_end()
64 i915_reset_count(&i915->gpu_error) - t->reset_global); in igt_live_test_end()
68 for_each_gt(gt, i915, i) { in igt_live_test_end()
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/linux/drivers/gpu/drm/xe/compat-i915-headers/
H A Dvlv_sideband.h27 static inline void vlv_iosf_sb_get(struct drm_i915_private *i915, unsigned long ports) in vlv_iosf_sb_get() argument
30 static inline u32 vlv_iosf_sb_read(struct drm_i915_private *i915, u8 port, u32 reg) in vlv_iosf_sb_read() argument
34 static inline void vlv_iosf_sb_write(struct drm_i915_private *i915, in vlv_iosf_sb_write() argument
38 static inline void vlv_iosf_sb_put(struct drm_i915_private *i915, unsigned long ports) in vlv_iosf_sb_put() argument
41 static inline void vlv_bunit_get(struct drm_i915_private *i915) in vlv_bunit_get() argument
44 static inline u32 vlv_bunit_read(struct drm_i915_private *i915, u32 reg) in vlv_bunit_read() argument
48 static inline void vlv_bunit_write(struct drm_i915_private *i915, u32 reg, u32 val) in vlv_bunit_write() argument
51 static inline void vlv_bunit_put(struct drm_i915_private *i915) in vlv_bunit_put() argument
54 static inline void vlv_cck_get(struct drm_i915_private *i915) in vlv_cck_get() argument
57 static inline u32 vlv_cck_read(struct drm_i915_private *i915, u32 reg) in vlv_cck_read() argument
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/linux/drivers/gpu/drm/i915/pxp/
H A Dintel_pxp_tee.c63 struct drm_i915_private *i915 = pxp->ctrl_gt->i915; in intel_pxp_tee_io_message() local
70 * The binding of the component is asynchronous from i915 probe, so we in intel_pxp_tee_io_message()
81 drm_err(&i915->drm, "Failed to send PXP TEE message\n"); in intel_pxp_tee_io_message()
88 drm_err(&i915->drm, "Failed to receive PXP TEE message\n"); in intel_pxp_tee_io_message()
93 drm_err(&i915->drm, in intel_pxp_tee_io_message()
115 struct drm_i915_private *i915 = pxp->ctrl_gt->i915; in intel_pxp_tee_stream_message() local
140 drm_err(&i915->drm, "Failed to send PXP TEE gsc command\n"); in intel_pxp_tee_stream_message()
151 * @i915_kdev: pointer to i915 kernel device
162 struct drm_i915_private *i915 = kdev_to_i915(i915_kdev); in i915_pxp_tee_component_bind() local
163 struct intel_pxp *pxp = i915->pxp; in i915_pxp_tee_component_bind()
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H A Dintel_pxp_gsccs.c60 struct drm_i915_private *i915 = gt->i915; in gsccs_send_message() local
117 drm_err(&i915->drm, "failed to send gsc PXP msg (%d)\n", ret); in gsccs_send_message()
123 drm_err(&i915->drm, "gsc PXP reply with invalid validity marker\n"); in gsccs_send_message()
128 drm_dbg(&i915->drm, "gsc PXP reply status has error = 0x%08x\n", in gsccs_send_message()
134 drm_dbg(&i915->drm, "gsc PXP reply is busy\n"); in gsccs_send_message()
148 drm_warn(&i915->drm, "caller with insufficient PXP reply size %u (%zu)\n", in gsccs_send_message()
211 struct drm_i915_private *i915 = pxp->ctrl_gt->i915; in intel_pxp_gsccs_create_session() local
228 drm_err(&i915->drm, "Failed to init session %d, ret=[%d]\n", arb_session_id, ret); in intel_pxp_gsccs_create_session()
231 drm_info_once(&i915->drm, in intel_pxp_gsccs_create_session()
236 drm_dbg(&i915->drm, "PXP init-session-%d failed 0x%08x:%st:\n", in intel_pxp_gsccs_create_session()
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/linux/drivers/gpu/drm/i915/gt/
H A Dintel_region_lmem.c32 _resize_bar(struct drm_i915_private *i915, int resno, resource_size_t size) in _resize_bar() argument
34 struct pci_dev *pdev = to_pci_dev(i915->drm.dev); in _resize_bar()
42 drm_info(&i915->drm, "Failed to resize BAR%d to %dM (%pe)\n", in _resize_bar()
47 drm_info(&i915->drm, "BAR%d resized to %dM\n", resno, 1 << bar_size); in _resize_bar()
50 static void i915_resize_lmem_bar(struct drm_i915_private *i915, resource_size_t lmem_size) in i915_resize_lmem_bar() argument
52 struct pci_dev *pdev = to_pci_dev(i915->drm.dev); in i915_resize_lmem_bar()
63 if (i915->params.lmem_bar_size) { in i915_resize_lmem_bar()
66 rebar_size = i915->params.lmem_bar_size * in i915_resize_lmem_bar()
77 drm_info(&i915->drm, in i915_resize_lmem_bar()
102 drm_info(&i915->drm, "Can't resize LMEM BAR - platform support is missing\n"); in i915_resize_lmem_bar()
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H A Dintel_rps.c43 return rps_to_gt(rps)->i915; in rps_to_i915()
139 queue_work(gt->i915->unordered_wq, &rps->work); in rps_timer()
144 queue_work(gt->i915->unordered_wq, &rps->work); in rps_timer()
227 if (GRAPHICS_VER(gt->i915) >= 11) in rps_reset_interrupts()
247 intel_synchronize_irq(gt->i915); in rps_disable_interrupts()
277 struct drm_i915_private *i915 = rps_to_i915(rps); in gen5_rps_init() local
283 if (i915->fsb_freq <= 3200000) in gen5_rps_init()
285 else if (i915->fsb_freq <= 4800000) in gen5_rps_init()
292 cparams[i].t == DIV_ROUND_CLOSEST(i915->mem_freq, 1000)) { in gen5_rps_init()
306 drm_dbg(&i915->drm, "fmax: %d, fmin: %d, fstart: %d\n", in gen5_rps_init()
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H A Dintel_wopcm.c81 struct drm_i915_private *i915 = gt->i915; in intel_wopcm_init_early() local
83 if (!HAS_GT_UC(i915)) in intel_wopcm_init_early()
86 if (GRAPHICS_VER(i915) >= 11) in intel_wopcm_init_early()
91 drm_dbg(&i915->drm, "WOPCM: %uK\n", wopcm->size / 1024); in intel_wopcm_init_early()
94 static u32 context_reserved_size(struct drm_i915_private *i915) in context_reserved_size() argument
96 if (IS_GEN9_LP(i915)) in context_reserved_size()
98 else if (GRAPHICS_VER(i915) >= 11) in context_reserved_size()
104 static bool gen9_check_dword_gap(struct drm_i915_private *i915, in gen9_check_dword_gap() argument
117 drm_err(&i915->drm, in gen9_check_dword_gap()
127 static bool gen9_check_huc_fw_fits(struct drm_i915_private *i915, in gen9_check_huc_fw_fits() argument
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H A Dintel_engine_user.c17 intel_engine_lookup_user(struct drm_i915_private *i915, u8 class, u8 instance) in intel_engine_lookup_user() argument
19 struct rb_node *p = i915->uabi_engines.rb_node; in intel_engine_lookup_user()
41 llist_add(&engine->uabi_llist, &engine->i915->uabi_engines_llist); in intel_engine_add_user()
76 static struct llist_node *get_engines(struct drm_i915_private *i915) in get_engines() argument
78 return llist_del_all(&i915->uabi_engines_llist); in get_engines()
81 static void sort_engines(struct drm_i915_private *i915, in sort_engines() argument
86 llist_for_each_safe(pos, next, get_engines(i915)) { in sort_engines()
94 static void set_scheduler_caps(struct drm_i915_private *i915) in set_scheduler_caps() argument
111 for_each_uabi_engine(engine, i915) { /* all engines must agree! */ in set_scheduler_caps()
132 i915->caps.scheduler = enabled & ~disabled; in set_scheduler_caps()
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H A Dintel_rc6.c53 return rc6_to_gt(rc)->i915; in rc6_to_i915()
125 if (GRAPHICS_VER(gt->i915) >= 12 && !IS_DG1(gt->i915)) { in gen11_rc6_enable()
230 struct drm_i915_private *i915 = rc6_to_i915(rc6); in gen6_rc6_enable() local
253 if (HAS_RC6p(i915)) in gen6_rc6_enable()
255 if (HAS_RC6pp(i915)) in gen6_rc6_enable()
264 if (GRAPHICS_VER(i915) == 6 && ret) { in gen6_rc6_enable()
265 drm_dbg(&i915->drm, "Couldn't check for BIOS workaround\n"); in gen6_rc6_enable()
266 } else if (GRAPHICS_VER(i915) == 6 && in gen6_rc6_enable()
268 drm_dbg(&i915->drm, in gen6_rc6_enable()
275 drm_err(&i915->drm, in gen6_rc6_enable()
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H A Dintel_gsc.c49 obj = i915_gem_object_create_lmem(gt->i915, size, in gsc_ext_om_alloc()
128 static void gsc_destroy_one(struct drm_i915_private *i915, in gsc_destroy_one() argument
152 static void gsc_init_one(struct drm_i915_private *i915, struct intel_gsc *gsc, in gsc_init_one() argument
155 struct pci_dev *pdev = to_pci_dev(i915->drm.dev); in gsc_init_one()
169 drm_dbg(&i915->drm, "Not initializing gsc for remote tiles\n"); in gsc_init_one()
173 if (intf_id == 0 && !HAS_HECI_PXP(i915)) in gsc_init_one()
176 if (IS_DG1(i915)) { in gsc_init_one()
178 } else if (IS_DG2(i915)) { in gsc_init_one()
181 drm_warn_once(&i915->drm, "Unknown platform\n"); in gsc_init_one()
186 drm_warn_once(&i915->drm, "HECI%d is not implemented!\n", intf_id + 1); in gsc_init_one()
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/linux/Documentation/ABI/testing/
H A Dsysfs-driver-intel-i915-hwmon1 What: /sys/bus/pci/drivers/i915/.../hwmon/hwmon<i>/in0_input
7 Only supported for particular Intel i915 graphics platforms.
9 What: /sys/bus/pci/drivers/i915/.../hwmon/hwmon<i>/power1_max
21 Only supported for particular Intel i915 graphics platforms.
23 What: /sys/bus/pci/drivers/i915/.../hwmon/hwmon<i>/power1_rated_max
29 Only supported for particular Intel i915 graphics platforms.
31 What: /sys/bus/pci/drivers/i915/.../hwmon/hwmon<i>/power1_max_interval
38 Only supported for particular Intel i915 graphics platforms.
40 What: /sys/bus/pci/drivers/i915/.../hwmon/hwmon<i>/power1_crit
51 Only supported for particular Intel i915 graphics platforms.
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/linux/drivers/gpu/drm/i915/gem/selftests/
H A Di915_gem_dmabuf.c20 struct drm_i915_private *i915 = arg; in igt_dmabuf_export() local
24 obj = i915_gem_object_create_shmem(i915, PAGE_SIZE); in igt_dmabuf_export()
42 struct drm_i915_private *i915 = arg; in igt_dmabuf_import_self() local
48 obj = i915_gem_object_create_shmem(i915, PAGE_SIZE); in igt_dmabuf_import_self()
60 import = i915_gem_prime_import(&i915->drm, dmabuf); in igt_dmabuf_import_self()
95 struct drm_i915_private *i915 = arg; in igt_dmabuf_import_same_driver_lmem() local
96 struct intel_memory_region *lmem = i915->mm.regions[INTEL_REGION_LMEM_0]; in igt_dmabuf_import_same_driver_lmem()
107 obj = __i915_gem_object_create_user(i915, PAGE_SIZE, &lmem, 1); in igt_dmabuf_import_same_driver_lmem()
127 import = i915_gem_prime_import(&i915->drm, dmabuf); in igt_dmabuf_import_same_driver_lmem()
148 static int verify_access(struct drm_i915_private *i915, in verify_access() argument
[all …]
H A Di915_gem_object.c15 struct drm_i915_private *i915 = arg; in igt_gem_object() local
21 obj = i915_gem_object_create_shmem(i915, PAGE_SIZE); in igt_gem_object()
37 struct drm_i915_private *i915 = arg; in igt_gem_huge() local
44 obj = huge_gem_object(i915, in igt_gem_huge()
46 to_gt(i915)->ggtt->vm.total + PAGE_SIZE); in igt_gem_huge()
79 struct drm_i915_private *i915; in i915_gem_object_mock_selftests() local
82 i915 = mock_gem_device(); in i915_gem_object_mock_selftests()
83 if (!i915) in i915_gem_object_mock_selftests()
86 err = i915_subtests(tests, i915); in i915_gem_object_mock_selftests()
88 mock_destroy_device(i915); in i915_gem_object_mock_selftests()
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