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/linux/drivers/gpu/drm/i915/
H A Di915_drv.h1 /* i915_drv.h -- Private header for the I915 driver -*- linux-c -*-
73 /* Data Stolen Memory (DSM) aka "i915 stolen memory" */
195 /* i915 device parameters */
265 * scheduling within i915, which used to be scheduled on the
380 static inline struct intel_gt *to_gt(const struct drm_i915_private *i915) in to_gt() argument
382 return i915->gt[0]; in to_gt()
393 #define INTEL_INFO(i915) ((i915)->__info) argument
394 #define RUNTIME_INFO(i915) (&(i915)->__runtime) argument
395 #define DRIVER_CAPS(i915) (&(i915)->caps) argument
397 #define INTEL_DEVID(i915) (RUNTIME_INFO(i915)->device_id) argument
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H A Dintel_clock_gating.c43 void (*init_clock_gating)(struct drm_i915_private *i915);
46 static void gen9_init_clock_gating(struct drm_i915_private *i915) in gen9_init_clock_gating() argument
48 if (HAS_LLC(i915)) { in gen9_init_clock_gating()
56 intel_uncore_rmw(&i915->uncore, CHICKEN_PAR1_1, 0, SKL_DE_COMPRESSED_HASH_MODE); in gen9_init_clock_gating()
60 intel_uncore_rmw(&i915->uncore, CHICKEN_PAR1_1, 0, SKL_EDP_PSR_FIX_RDWRAP); in gen9_init_clock_gating()
63 intel_uncore_rmw(&i915->uncore, GEN8_CHICKEN_DCPR_1, 0, MASK_WAKEMEM); in gen9_init_clock_gating()
69 intel_uncore_rmw(&i915->uncore, DISP_ARB_CTL, 0, DISP_FBC_MEMORY_WAKE); in gen9_init_clock_gating()
72 static void bxt_init_clock_gating(struct drm_i915_private *i915) in bxt_init_clock_gating() argument
74 gen9_init_clock_gating(i915); in bxt_init_clock_gating()
77 intel_uncore_rmw(&i915->uncore, GEN8_UCGCTL6, 0, GEN8_SDEUNIT_CLOCK_GATE_DISABLE); in bxt_init_clock_gating()
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H A Dvlv_sideband.h28 void vlv_iosf_sb_get(struct drm_i915_private *i915, unsigned long ports);
29 void vlv_iosf_sb_put(struct drm_i915_private *i915, unsigned long ports);
31 static inline void vlv_bunit_get(struct drm_i915_private *i915) in vlv_bunit_get() argument
33 vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_BUNIT)); in vlv_bunit_get()
36 u32 vlv_bunit_read(struct drm_i915_private *i915, u32 reg);
37 void vlv_bunit_write(struct drm_i915_private *i915, u32 reg, u32 val);
39 static inline void vlv_bunit_put(struct drm_i915_private *i915) in vlv_bunit_put() argument
41 vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_BUNIT)); in vlv_bunit_put()
44 static inline void vlv_cck_get(struct drm_i915_private *i915) in vlv_cck_get() argument
46 vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_CCK)); in vlv_cck_get()
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H A Dvlv_sideband.c31 static void __vlv_punit_get(struct drm_i915_private *i915) in __vlv_punit_get() argument
45 if (IS_VALLEYVIEW(i915)) { in __vlv_punit_get()
46 cpu_latency_qos_update_request(&i915->sb_qos, 0); in __vlv_punit_get()
51 static void __vlv_punit_put(struct drm_i915_private *i915) in __vlv_punit_put() argument
53 if (IS_VALLEYVIEW(i915)) in __vlv_punit_put()
54 cpu_latency_qos_update_request(&i915->sb_qos, in __vlv_punit_put()
60 void vlv_iosf_sb_get(struct drm_i915_private *i915, unsigned long ports) in vlv_iosf_sb_get() argument
63 __vlv_punit_get(i915); in vlv_iosf_sb_get()
65 mutex_lock(&i915->sb_lock); in vlv_iosf_sb_get()
68 void vlv_iosf_sb_put(struct drm_i915_private *i915, unsigned long ports) in vlv_iosf_sb_put() argument
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/linux/drivers/gpu/drm/i915/display/
H A Dintel_display_driver.c83 void intel_display_driver_init_hw(struct drm_i915_private *i915) in intel_display_driver_init_hw() argument
87 if (!HAS_DISPLAY(i915)) in intel_display_driver_init_hw()
90 cdclk_state = to_intel_cdclk_state(i915->display.cdclk.obj.state); in intel_display_driver_init_hw()
92 intel_update_cdclk(i915); in intel_display_driver_init_hw()
93 intel_cdclk_dump_config(i915, &i915->display.cdclk.hw, "Current CDCLK"); in intel_display_driver_init_hw()
94 cdclk_state->logical = cdclk_state->actual = i915->display.cdclk.hw; in intel_display_driver_init_hw()
96 intel_display_wa_apply(i915); in intel_display_driver_init_hw()
114 static void intel_mode_config_init(struct drm_i915_private *i915) in intel_mode_config_init() argument
116 struct drm_mode_config *mode_config = &i915->drm.mode_config; in intel_mode_config_init()
118 drm_mode_config_init(&i915->drm); in intel_mode_config_init()
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H A Dintel_display_device.h119 #define HAS_4TILE(i915) (IS_DG2(i915) || DISPLAY_VER(i915) >= 14) argument
120 #define HAS_ASYNC_FLIPS(i915) (DISPLAY_VER(i915) >= 5) argument
121 #define HAS_CDCLK_CRAWL(i915) (DISPLAY_INFO(i915)->has_cdclk_crawl) argument
122 #define HAS_CDCLK_SQUASH(i915) (DISPLAY_INFO(i915)->has_cdclk_squash) argument
123 #define HAS_CUR_FBC(i915) (!HAS_GMCH(i915) && IS_DISPLAY_VER(i915, 7, 13)) argument
124 #define HAS_D12_PLANE_MINIMIZATION(i915) (IS_ROCKETLAKE(i915) || IS_ALDERLAKE_S(i915)) argument
125 #define HAS_DDI(i915) (DISPLAY_INFO(i915)->has_ddi) argument
126 #define HAS_DISPLAY(i915) (DISPLAY_RUNTIME_INFO(i915)->pipe_mask != 0) argument
127 #define HAS_DMC(i915) (DISPLAY_RUNTIME_INFO(i915)->has_dmc) argument
128 #define HAS_DOUBLE_BUFFERED_M_N(i915) (DISPLAY_VER(i915) >= 9 || IS_BROADWELL(i915)) argument
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H A Dintel_gmbus.c51 struct drm_i915_private *i915; member
152 static const struct gmbus_pin *get_gmbus_pin(struct drm_i915_private *i915, in get_gmbus_pin() argument
158 if (INTEL_PCH_TYPE(i915) >= PCH_MTL) { in get_gmbus_pin()
161 } else if (INTEL_PCH_TYPE(i915) >= PCH_DG2) { in get_gmbus_pin()
164 } else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) { in get_gmbus_pin()
167 } else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) { in get_gmbus_pin()
170 } else if (HAS_PCH_CNP(i915)) { in get_gmbus_pin()
173 } else if (IS_GEMINILAKE(i915) || IS_BROXTON(i915)) { in get_gmbus_pin()
176 } else if (DISPLAY_VER(i915) == 9) { in get_gmbus_pin()
179 } else if (IS_BROADWELL(i915)) { in get_gmbus_pin()
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H A Dintel_dmc.c55 struct drm_i915_private *i915; member
73 static struct intel_dmc *i915_to_dmc(struct drm_i915_private *i915) in i915_to_dmc() argument
75 return i915->display.dmc.dmc; in i915_to_dmc()
78 static const char *dmc_firmware_param(struct drm_i915_private *i915) in dmc_firmware_param() argument
80 const char *p = i915->display.params.dmc_firmware_path; in dmc_firmware_param()
85 static bool dmc_firmware_param_disabled(struct drm_i915_private *i915) in dmc_firmware_param_disabled() argument
87 const char *p = dmc_firmware_param(i915); in dmc_firmware_param_disabled()
98 "i915/" __stringify(platform) "_dmc.bin"
106 "i915/" \
165 static const char *dmc_firmware_default(struct drm_i915_private *i915, u32 *size) in dmc_firmware_default() argument
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H A Dintel_audio.c66 * struct &i915_audio_component_audio_ops @audio_ops is called from i915 driver.
191 static bool needs_wa_14020863754(struct drm_i915_private *i915) in needs_wa_14020863754() argument
193 return (DISPLAY_VER(i915) == 20 || IS_BATTLEMAGE(i915)); in needs_wa_14020863754()
199 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); in audio_config_hdmi_pixel_clock() local
209 if (DISPLAY_VER(i915) < 12 && adjusted_mode->crtc_clock > 148500) in audio_config_hdmi_pixel_clock()
213 drm_dbg_kms(&i915->drm, in audio_config_hdmi_pixel_clock()
219 drm_dbg_kms(&i915->drm, in audio_config_hdmi_pixel_clock()
254 static int g4x_eld_buffer_size(struct drm_i915_private *i915) in g4x_eld_buffer_size() argument
258 tmp = intel_de_read(i915, G4X_AUD_CNTL_ST); in g4x_eld_buffer_size()
266 struct drm_i915_private *i915 = to_i915(encoder->base.dev); in g4x_audio_codec_get_config() local
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H A Dintel_display_irq.h17 void valleyview_enable_display_irqs(struct drm_i915_private *i915);
18 void valleyview_disable_display_irqs(struct drm_i915_private *i915);
20 void ilk_update_display_irq(struct drm_i915_private *i915,
22 void ilk_enable_display_irq(struct drm_i915_private *i915, u32 bits);
23 void ilk_disable_display_irq(struct drm_i915_private *i915, u32 bits);
25 void bdw_update_port_irq(struct drm_i915_private *i915, u32 interrupt_mask, u32 enabled_irq_mask);
26 void bdw_enable_pipe_irq(struct drm_i915_private *i915, enum pipe pipe, u32 bits);
27 void bdw_disable_pipe_irq(struct drm_i915_private *i915, enum pipe pipe, u32 bits);
29 void ibx_display_interrupt_update(struct drm_i915_private *i915,
31 void ibx_enable_display_interrupt(struct drm_i915_private *i915, u32 bits);
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H A Dintel_hdcp.c101 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); in intel_hdcp_required_content_stream() local
114 drm_connector_list_iter_begin(&i915->drm, &conn_iter); in intel_hdcp_required_content_stream()
136 if (drm_WARN_ON(&i915->drm, data->k > INTEL_NUM_PIPES(i915) || data->k == 0)) in intel_hdcp_required_content_stream()
184 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); in intel_hdcp_read_valid_bksv() local
196 drm_dbg_kms(&i915->drm, "Bksv is invalid\n"); in intel_hdcp_read_valid_bksv()
235 struct drm_i915_private *i915 = to_i915(connector->base.dev); in intel_hdcp2_prerequisite() local
238 /* I915 support for HDCP2.2 */ in intel_hdcp2_prerequisite()
243 if (intel_hdcp_gsc_cs_required(i915)) { in intel_hdcp2_prerequisite()
244 if (!intel_hdcp_gsc_check_status(i915)) in intel_hdcp2_prerequisite()
249 mutex_lock(&i915->display.hdcp.hdcp_mutex); in intel_hdcp2_prerequisite()
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H A Dintel_dkl_phy.c15 * @i915: i915 device instance
17 void intel_dkl_phy_init(struct drm_i915_private *i915) in intel_dkl_phy_init() argument
19 spin_lock_init(&i915->display.dkl.phy_lock); in intel_dkl_phy_init()
23 dkl_phy_set_hip_idx(struct drm_i915_private *i915, struct intel_dkl_phy_reg reg) in dkl_phy_set_hip_idx() argument
27 drm_WARN_ON(&i915->drm, tc_port < TC_PORT_1 || tc_port >= I915_MAX_TC_PORTS); in dkl_phy_set_hip_idx()
29 intel_de_write(i915, in dkl_phy_set_hip_idx()
36 * @i915: i915 device instance
44 intel_dkl_phy_read(struct drm_i915_private *i915, struct intel_dkl_phy_reg reg) in intel_dkl_phy_read() argument
48 spin_lock(&i915->display.dkl.phy_lock); in intel_dkl_phy_read()
50 dkl_phy_set_hip_idx(i915, reg); in intel_dkl_phy_read()
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H A Dintel_backlight.c105 struct drm_i915_private *i915 = to_i915(connector->base.dev); in intel_backlight_set_pwm_level() local
108 drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] set backlight PWM = %d\n", in intel_backlight_set_pwm_level()
115 struct drm_i915_private *i915 = to_i915(connector->base.dev); in intel_backlight_level_to_pwm() local
118 drm_WARN_ON_ONCE(&i915->drm, in intel_backlight_level_to_pwm()
146 struct drm_i915_private *i915 = to_i915(connector->base.dev); in lpt_get_backlight() local
148 return intel_de_read(i915, BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK; in lpt_get_backlight()
153 struct drm_i915_private *i915 = to_i915(connector->base.dev); in pch_get_backlight() local
155 return intel_de_read(i915, BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; in pch_get_backlight()
160 struct drm_i915_private *i915 = to_i915(connector->base.dev); in i9xx_get_backlight() local
164 val = intel_de_read(i915, BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; in i9xx_get_backlight()
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H A Dintel_modeset_setup.c38 struct drm_i915_private *i915 = to_i915(crtc->base.dev); in intel_crtc_disable_noatomic_begin() local
49 for_each_intel_plane_on_crtc(&i915->drm, crtc, plane) { in intel_crtc_disable_noatomic_begin()
57 state = drm_atomic_state_alloc(&i915->drm); in intel_crtc_disable_noatomic_begin()
59 drm_dbg_kms(&i915->drm, in intel_crtc_disable_noatomic_begin()
69 for_each_intel_crtc_in_pipe_mask(&i915->drm, temp_crtc, in intel_crtc_disable_noatomic_begin()
78 drm_WARN_ON(&i915->drm, IS_ERR(temp_crtc_state) || ret); in intel_crtc_disable_noatomic_begin()
81 i915->display.funcs.display->crtc_disable(to_intel_atomic_state(state), crtc); in intel_crtc_disable_noatomic_begin()
85 drm_dbg_kms(&i915->drm, in intel_crtc_disable_noatomic_begin()
118 struct drm_i915_private *i915 = to_i915(encoder->base.dev); in reset_encoder_connector_state() local
120 to_intel_pmdemand_state(i915->display.pmdemand.obj.state); in reset_encoder_connector_state()
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H A Dintel_dpll_mgr.c67 void (*enable)(struct drm_i915_private *i915,
76 void (*disable)(struct drm_i915_private *i915,
84 bool (*get_hw_state)(struct drm_i915_private *i915,
92 int (*get_freq)(struct drm_i915_private *i915,
111 void (*update_ref_clks)(struct drm_i915_private *i915);
119 intel_atomic_duplicate_dpll_state(struct drm_i915_private *i915, in intel_atomic_duplicate_dpll_state() argument
126 for_each_shared_dpll(i915, pll, i) in intel_atomic_duplicate_dpll_state()
149 * @i915: i915 device instance
156 intel_get_shared_dpll_by_id(struct drm_i915_private *i915, in intel_get_shared_dpll_by_id() argument
162 for_each_shared_dpll(i915, pll, i) { in intel_get_shared_dpll_by_id()
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H A Dintel_pmdemand.c44 struct drm_i915_private *i915 = to_i915(state->base.dev); in intel_atomic_get_pmdemand_state() local
47 &i915->display.pmdemand.obj); in intel_atomic_get_pmdemand_state()
58 struct drm_i915_private *i915 = to_i915(state->base.dev); in intel_atomic_get_old_pmdemand_state() local
61 &i915->display.pmdemand.obj); in intel_atomic_get_old_pmdemand_state()
72 struct drm_i915_private *i915 = to_i915(state->base.dev); in intel_atomic_get_new_pmdemand_state() local
75 &i915->display.pmdemand.obj); in intel_atomic_get_new_pmdemand_state()
83 int intel_pmdemand_init(struct drm_i915_private *i915) in intel_pmdemand_init() argument
91 intel_atomic_global_obj_init(i915, &i915->display.pmdemand.obj, in intel_pmdemand_init()
95 if (IS_DISPLAY_VER_STEP(i915, IP_VER(14, 0), STEP_A0, STEP_C0)) in intel_pmdemand_init()
97 intel_de_rmw(i915, XELPD_CHICKEN_DCPR_3, 0, DMD_RSP_TIMEOUT_DISABLE); in intel_pmdemand_init()
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H A Dintel_display_power.c227 * @dev_priv: i915 device instance
258 sanitize_target_dc_state(struct drm_i915_private *i915, in sanitize_target_dc_state() argument
261 struct i915_power_domains *power_domains = &i915->display.power.domains; in sanitize_target_dc_state()
285 * @dev_priv: i915 device
341 struct drm_i915_private *i915 = container_of(power_domains, in assert_async_put_domain_masks_disjoint() local
345 return !drm_WARN_ON(&i915->drm, in assert_async_put_domain_masks_disjoint()
354 struct drm_i915_private *i915 = container_of(power_domains, in __async_put_domains_state_ok() local
363 err |= drm_WARN_ON(&i915->drm, in __async_put_domains_state_ok()
368 err |= drm_WARN_ON(&i915->drm, in __async_put_domains_state_ok()
377 struct drm_i915_private *i915 = container_of(power_domains, in print_power_domains() local
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/linux/drivers/gpu/drm/xe/
H A DMakefile146 # i915 Display compat #defines and #includes
149 -I$(src)/compat-i915-headers \
150 -I$(srctree)/drivers/gpu/drm/i915/display/ \
154 # Rule to build SOC code shared with i915
155 $(obj)/i915-soc/%.o: $(srctree)/drivers/gpu/drm/i915/soc/%.c FORCE
159 # Rule to build display code shared with i915
160 $(obj)/i915-display/%.o: $(srctree)/drivers/gpu/drm/i915/display/%.c FORCE
180 # SOC code shared with i915
182 i915-soc/intel_dram.o \
183 i915-soc/intel_pch.o
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/linux/drivers/gpu/drm/i915/soc/
H A Dintel_gmch.c22 int intel_gmch_bridge_setup(struct drm_i915_private *i915) in intel_gmch_bridge_setup() argument
24 int domain = pci_domain_nr(to_pci_dev(i915->drm.dev)->bus); in intel_gmch_bridge_setup()
26 i915->gmch.pdev = pci_get_domain_bus_and_slot(domain, 0, PCI_DEVFN(0, 0)); in intel_gmch_bridge_setup()
27 if (!i915->gmch.pdev) { in intel_gmch_bridge_setup()
28 drm_err(&i915->drm, "bridge device not found\n"); in intel_gmch_bridge_setup()
32 return drmm_add_action_or_reset(&i915->drm, intel_gmch_bridge_release, in intel_gmch_bridge_setup()
33 i915->gmch.pdev); in intel_gmch_bridge_setup()
36 static int mchbar_reg(struct drm_i915_private *i915) in mchbar_reg() argument
38 return GRAPHICS_VER(i915) >= 4 ? MCHBAR_I965 : MCHBAR_I915; in mchbar_reg()
43 intel_alloc_mchbar_resource(struct drm_i915_private *i915) in intel_alloc_mchbar_resource() argument
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H A Dintel_dram.c46 static bool pnv_is_ddr3(struct drm_i915_private *i915) in pnv_is_ddr3() argument
48 return intel_uncore_read(&i915->uncore, CSHRDDR3CTL) & CSHRDDR3CTL_DDR3; in pnv_is_ddr3()
90 static unsigned int chv_mem_freq(struct drm_i915_private *i915) in chv_mem_freq() argument
94 vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_CCK)); in chv_mem_freq()
95 val = vlv_cck_read(i915, CCK_FUSE_REG); in chv_mem_freq()
96 vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_CCK)); in chv_mem_freq()
106 static unsigned int vlv_mem_freq(struct drm_i915_private *i915) in vlv_mem_freq() argument
110 vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_PUNIT)); in vlv_mem_freq()
111 val = vlv_punit_read(i915, PUNIT_REG_GPU_FREQ_STS); in vlv_mem_freq()
112 vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_PUNIT)); in vlv_mem_freq()
[all …]
/linux/drivers/gpu/drm/i915/selftests/
H A Dmock_gem_device.c46 void mock_device_flush(struct drm_i915_private *i915) in mock_device_flush() argument
48 struct intel_gt *gt = to_gt(i915); in mock_device_flush()
61 struct drm_i915_private *i915 = to_i915(dev); in mock_device_release() local
63 if (!i915->do_release) in mock_device_release()
66 mock_device_flush(i915); in mock_device_release()
67 intel_gt_driver_remove(to_gt(i915)); in mock_device_release()
69 i915_gem_drain_workqueue(i915); in mock_device_release()
71 mock_fini_ggtt(to_gt(i915)->ggtt); in mock_device_release()
72 destroy_workqueue(i915->unordered_wq); in mock_device_release()
73 destroy_workqueue(i915->wq); in mock_device_release()
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H A Di915_gem.c43 static void trash_stolen(struct drm_i915_private *i915) in trash_stolen() argument
45 struct i915_ggtt *ggtt = to_gt(i915)->ggtt; in trash_stolen()
47 const resource_size_t size = resource_size(&i915->dsm.stolen); in trash_stolen()
56 const dma_addr_t dma = i915->dsm.stolen.start + page; in trash_stolen()
61 i915_gem_get_pat_index(i915, in trash_stolen()
76 static void simulate_hibernate(struct drm_i915_private *i915) in simulate_hibernate() argument
80 wakeref = intel_runtime_pm_get(&i915->runtime_pm); in simulate_hibernate()
89 trash_stolen(i915); in simulate_hibernate()
91 intel_runtime_pm_put(&i915->runtime_pm, wakeref); in simulate_hibernate()
94 static int igt_pm_prepare(struct drm_i915_private *i915) in igt_pm_prepare() argument
[all …]
/linux/drivers/gpu/drm/i915/gem/
H A Di915_gem_stolen.c40 int i915_gem_stolen_insert_node_in_range(struct drm_i915_private *i915, in i915_gem_stolen_insert_node_in_range() argument
46 if (!drm_mm_initialized(&i915->mm.stolen)) in i915_gem_stolen_insert_node_in_range()
50 if (GRAPHICS_VER(i915) >= 8 && start < 4096) in i915_gem_stolen_insert_node_in_range()
53 mutex_lock(&i915->mm.stolen_lock); in i915_gem_stolen_insert_node_in_range()
54 ret = drm_mm_insert_node_in_range(&i915->mm.stolen, node, in i915_gem_stolen_insert_node_in_range()
57 mutex_unlock(&i915->mm.stolen_lock); in i915_gem_stolen_insert_node_in_range()
62 int i915_gem_stolen_insert_node(struct drm_i915_private *i915, in i915_gem_stolen_insert_node() argument
66 return i915_gem_stolen_insert_node_in_range(i915, node, in i915_gem_stolen_insert_node()
72 void i915_gem_stolen_remove_node(struct drm_i915_private *i915, in i915_gem_stolen_remove_node() argument
75 mutex_lock(&i915->mm.stolen_lock); in i915_gem_stolen_remove_node()
[all …]
/linux/Documentation/gpu/
H A Di915.rst2 drm/i915 Intel GFX Driver
5 The drm/i915 driver supports all (with the exception of some very early
19 .. kernel-doc:: drivers/gpu/drm/i915/intel_runtime_pm.c
22 .. kernel-doc:: drivers/gpu/drm/i915/intel_runtime_pm.c
25 .. kernel-doc:: drivers/gpu/drm/i915/intel_uncore.c
31 .. kernel-doc:: drivers/gpu/drm/i915/i915_irq.c
34 .. kernel-doc:: drivers/gpu/drm/i915/i915_irq.c
37 .. kernel-doc:: drivers/gpu/drm/i915/i915_irq.c
40 .. kernel-doc:: drivers/gpu/drm/i915/i915_irq.c
46 .. kernel-doc:: drivers/gpu/drm/i915/i915_vgpu.c
[all …]
/linux/drivers/gpu/drm/xe/compat-i915-headers/
H A Dvlv_sideband.h27 static inline void vlv_iosf_sb_get(struct drm_i915_private *i915, unsigned long ports) in vlv_iosf_sb_get() argument
30 static inline u32 vlv_iosf_sb_read(struct drm_i915_private *i915, u8 port, u32 reg) in vlv_iosf_sb_read() argument
34 static inline void vlv_iosf_sb_write(struct drm_i915_private *i915, in vlv_iosf_sb_write() argument
38 static inline void vlv_iosf_sb_put(struct drm_i915_private *i915, unsigned long ports) in vlv_iosf_sb_put() argument
41 static inline void vlv_bunit_get(struct drm_i915_private *i915) in vlv_bunit_get() argument
44 static inline u32 vlv_bunit_read(struct drm_i915_private *i915, u32 reg) in vlv_bunit_read() argument
48 static inline void vlv_bunit_write(struct drm_i915_private *i915, u32 reg, u32 val) in vlv_bunit_write() argument
51 static inline void vlv_bunit_put(struct drm_i915_private *i915) in vlv_bunit_put() argument
54 static inline void vlv_cck_get(struct drm_i915_private *i915) in vlv_cck_get() argument
57 static inline u32 vlv_cck_read(struct drm_i915_private *i915, u32 reg) in vlv_cck_read() argument
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