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/linux/Documentation/ABI/testing/
H A Dsysfs-bus-i3c1 What: /sys/bus/i3c/devices/i3c-<bus-id>
3 Contact: linux-i3c@vger.kernel.org
5 An I3C bus. This directory will contain one sub-directory per
6 I3C device present on the bus.
8 What: /sys/bus/i3c/devices/i3c-<bus-id>/current_master
10 Contact: linux-i3c@vger.kernel.org
17 What: /sys/bus/i3c/devices/i3c-<bus-id>/mode
19 Contact: linux-i3c@vger.kernel.org
21 I3C bus mode. Can be "pure", "mixed-fast" or "mixed-slow". See
22 the I3C specification for a detailed description of what each
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/linux/include/linux/i3c/
H A Dmaster.h15 #include <linux/i3c/ccc.h>
16 #include <linux/i3c/device.h>
39 * struct i3c_i2c_dev_desc - Common part of the I3C/I2C device descriptor
40 * @node: node element used to insert the slot into the I2C or I3C device
42 * @master: I3C master that instantiated this device. Will be used to do
43 * I2C/I3C transfers
47 * This structure is describing common I3C/I2C dev information.
65 * @lvr: LVR (Legacy Virtual Register) needed by the I3C core to know about
69 * Each I2C device connected on the I3C bus should have one.
82 * @lvr: LVR (Legacy Virtual Register) needed by the I3C cor
360 unsigned long i3c; global() member
364 struct list_head i3c; global() member
521 struct list_head i3c; global() member
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H A Ddevice.h19 * enum i3c_error_code - I3C error codes
21 * @I3C_ERROR_UNKNOWN: unknown error, usually means the error is not I3C
27 * These are the standard error codes as defined by the I3C specification.
54 * struct i3c_priv_xfer - I3C SDR private transfer
61 * @err: I3C error code
75 * enum i3c_dcr - I3C DCR values
76 * @I3C_DCR_GENERIC_DEVICE: generic I3C device
100 * struct i3c_device_info - I3C device information
114 * These are all basic information that should be advertised by an I3C device.
117 * For each I3C slave attached to a master with
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H A Dccc.h12 #include <linux/i3c/device.h>
14 /* I3C CCC (Common Command Codes) related definitions */
88 * The IBI length is only valid if the I3C slave is IBI capable
97 * struct i3c_ccc_dev_desc - I3C/I2C device descriptor used for DEFSLVS
99 * @dyn_addr: dynamic address assigned to the I3C slave or 0 if the entry is
102 * @lvr: LVR value (not applicable to entries describing I3C devices)
108 * descriptors (one entry per I3C/I2C dev controlled by the master).
154 * Information passed to the ENTTM CCC to instruct an I3C device to enter a
164 * @addr: dynamic address to assign to an I3C device
167 * dynamic address of an I3C device.
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/linux/drivers/i3c/master/
H A DKconfig3 tristate "Cadence I3C master driver"
4 depends on I3C
8 Enable this driver if you want to support Cadence I3C master block.
11 tristate "Synospsys DesignWare I3C master driver"
12 depends on I3C
17 Support for Synopsys DesignWare MIPI I3C Controller.
23 will be called dw-i3c-master.
26 tristate "ASPEED AST2600 I3C master driver"
31 Support for ASPEED AST2600 I3C Controller.
33 This hardware is an instance of the DW I3C controller; this
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H A Dast2600-i3c-master.c14 #include "dw-i3c-master.h"
79 struct ast2600_i3c *i3c = to_ast2600_i3c(dw); in ast2600_i3c_init() local
84 rc = ast2600_i3c_pullup_to_reg(i3c->sda_pullup, &reg); in ast2600_i3c_init()
88 rc = regmap_write(i3c->global_regs, in ast2600_i3c_init()
89 AST2600_I3CG_REG0(i3c->global_idx), reg); in ast2600_i3c_init()
96 reg = AST2600_I3CG_REG1_INST_ID(i3c->global_idx); in ast2600_i3c_init()
97 rc = regmap_write(i3c->global_regs, in ast2600_i3c_init()
98 AST2600_I3CG_REG1(i3c->global_idx), reg); in ast2600_i3c_init()
103 static void ast2600_i3c_set_dat_ibi(struct dw_i3c_master *i3c, in ast2600_i3c_set_dat_ibi() argument
108 * The ast2600 i3c controller will lock up on receiving 4n+1-byte IBIs in ast2600_i3c_set_dat_ibi()
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H A DMakefile2 obj-$(CONFIG_CDNS_I3C_MASTER) += i3c-master-cdns.o
3 obj-$(CONFIG_DW_I3C_MASTER) += dw-i3c-master.o
4 obj-$(CONFIG_AST2600_I3C_MASTER) += ast2600-i3c-master.o
5 obj-$(CONFIG_SVC_I3C_MASTER) += svc-i3c-master.o
6 obj-$(CONFIG_MIPI_I3C_HCI) += mipi-i3c-hci/
H A Dsvc-i3c-master.c3 * Silvaco dual-role I3C master driver
14 #include <linux/i3c/master.h>
162 * struct svc_i3c_master - Silvaco I3C Master structure
163 * @base: I3C master controller
453 * According to I3C spec ver 1.1, 09-Jun-2021, section 5.1.2.5: in svc_i3c_master_ibi_work()
455 * The I3C Controller shall hold SCL low while the Bus is in ACK/NACK Phase of I3C/I2C in svc_i3c_master_ibi_work()
457 * schedule during the whole I3C transaction, otherwise, the I3C bus timeout may happen if in svc_i3c_master_ibi_work()
598 * Set 50% duty-cycle I2C speed to I3C OPEN-DRAIN mode, so the first in svc_i3c_master_set_speed()
599 * broadcast address is visible to all I2C/I3C devices on the I3C bus. in svc_i3c_master_set_speed()
600 * I3C device working as a I2C device will turn off its 50ns Spike in svc_i3c_master_set_speed()
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/linux/Documentation/devicetree/bindings/i3c/
H A Di3c.yaml4 $id: http://devicetree.org/schemas/i3c/i3c.yaml#
7 title: I3C bus
14 I3C busses can be described with a node for the primary I3C controller device
15 and a set of child nodes for each I2C or I3C slave on the bus. Each of them
20 pattern: "^i3c@[0-9a-f]+$"
27 All I3C devices are supposed to support DAA (Dynamic Address Assignment),
28 and are thus discoverable. So, by default, I3C devices do not have to be
32 I3C devices.
34 Another use case for describing an I3C device in the device tree is when
35 this I3C device has a static I2C address and we want to assign it a
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H A Dmipi-i3c-hci.yaml4 $id: http://devicetree.org/schemas/i3c/mipi-i3c-hci.yaml#
7 title: MIPI I3C HCI
13 - $ref: /schemas/i3c/i3c.yaml#
16 MIPI I3C Host Controller Interface
18 The MIPI I3C HCI (Host Controller Interface) specification defines
19 a common software driver interface to support compliant MIPI I3C
27 https://www.mipi.org/specifications/i3c-hci
31 const: mipi-i3c-hci
46 i3c@a0000000 {
47 compatible = "mipi-i3c-hci";
H A Daspeed,ast2600-i3c.yaml4 $id: http://devicetree.org/schemas/i3c/aspeed,ast2600-i3c.yaml#
7 title: ASPEED AST2600 i3c controller
13 - $ref: i3c.yaml#
17 const: aspeed,ast2600-i3c
41 - description: phandle to i3c global register syscon node
42 - description: index of this i3c controller in the global register set
44 A (phandle, controller index) reference to the i3c global register set
60 i3c@2000 {
61 compatible = "aspeed,ast2600-i3c";
H A Dcdns,i3c-master.yaml4 $id: http://devicetree.org/schemas/i3c/cdns,i3c-master.yaml#
7 title: Cadence I3C master block
13 - $ref: i3c.yaml#
17 const: cdns,i3c-master
44 i3c@d040000 {
45 compatible = "cdns,i3c-master";
H A Dsnps,dw-i3c-master.yaml4 $id: http://devicetree.org/schemas/i3c/snps,dw-i3c-master.yaml#
7 title: Synopsys DesignWare I3C master block
13 - $ref: i3c.yaml#
17 const: snps,dw-i3c-master-1.00a
47 i3c@2000 {
48 compatible = "snps,dw-i3c-master-1.00a";
H A Dsilvaco,i3c-master.yaml4 $id: http://devicetree.org/schemas/i3c/silvaco,i3c-master.yaml#
7 title: Silvaco I3C master
13 - $ref: i3c.yaml#
17 const: silvaco,i3c-master-v1
51 i3c@a0000000 {
52 compatible = "silvaco,i3c-master-v1";
/linux/Documentation/driver-api/i3c/
H A Dprotocol.rst4 I3C protocol
12 collisions are prevented, ...) please have a look at the I3C specification.
14 This document is just a brief introduction to the I3C protocol and the concepts
16 I3C specification (can be downloaded here
17 https://resources.mipi.org/mipi-i3c-v1-download).
22 The I3C (pronounced 'eye-three-see') is a MIPI standardized protocol designed
27 I3C Bus
30 An I3C bus is made of several I3C devices and possibly some I2C devices as
31 well, but let's focus on I3C devices for now.
33 An I3C device on the I3C bus can have one of the following roles:
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H A Ddevice-driver-api.rst4 I3C device driver API
7 .. kernel-doc:: include/linux/i3c/device.h
9 .. kernel-doc:: drivers/i3c/device.c
H A Dmaster-driver-api.rst4 I3C master controller driver API
7 .. kernel-doc:: drivers/i3c/master.c
9 .. kernel-doc:: include/linux/i3c/master.h
/linux/drivers/i3c/
H A DKconfig3 menuconfig I3C config
4 tristate "I3C support"
7 I3C is a serial protocol standardized by the MIPI alliance.
13 The I3C protocol also standardizes the slave device types and is
16 If you want I3C support, you should say Y here and also to the
19 This I3C support can also be built as a module. If so, the module
20 will be called i3c.
22 if I3C
23 source "drivers/i3c/master/Kconfig"
24 endif # I3C
H A DMakefile2 i3c-y := device.o master.o
3 obj-$(CONFIG_I3C) += i3c.o
/linux/drivers/net/mctp/
H A Dmctp-i3c.c4 * "DSP0233 Management Component Transport Protocol (MCTP) I3C Transport
13 #include <linux/i3c/device.h>
14 #include <linux/i3c/master.h>
73 struct i3c_device *i3c; member
82 /* I3C dynamic address */
128 /* Make sure netif_rx() is read in the same order as i3c. */ in mctp_i3c_read()
130 rc = i3c_device_do_priv_xfers(mi->i3c, &xfer, 1); in mctp_i3c_read()
135 /* Bad i3c bus driver */ in mctp_i3c_read()
179 static void mctp_i3c_ibi_handler(struct i3c_device *i3c, in mctp_i3c_ibi_handler() argument
182 struct mctp_i3c_device *mi = i3cdev_get_drvdata(i3c); in mctp_i3c_ibi_handler()
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H A DKconfig42 tristate "MCTP I3C transport"
43 depends on I3C
45 Provides a driver to access MCTP devices over I3C transport,
47 A MCTP protocol network device is created for each I3C bus
/linux/drivers/base/regmap/
H A Dregmap-i3c.c5 #include <linux/i3c/device.h>
6 #include <linux/i3c/master.h>
12 struct i3c_device *i3c = dev_to_i3cdev(dev); in regmap_i3c_write() local
21 return i3c_device_do_priv_xfers(i3c, xfers, 1); in regmap_i3c_write()
29 struct i3c_device *i3c = dev_to_i3cdev(dev); in regmap_i3c_read() local
40 return i3c_device_do_priv_xfers(i3c, xfers, 2); in regmap_i3c_read()
48 struct regmap *__devm_regmap_init_i3c(struct i3c_device *i3c, in __devm_regmap_init_i3c() argument
53 return __devm_regmap_init(&i3c->dev, &regmap_i3c, &i3c->dev, config, in __devm_regmap_init_i3c()
59 MODULE_DESCRIPTION("regmap I3C Module");
/linux/drivers/iio/imu/st_lsm6dsx/
H A Dst_lsm6dsx_i3c.c11 #include <linux/i3c/device.h>
12 #include <linux/i3c/master.h>
23 MODULE_DEVICE_TABLE(i3c, st_lsm6dsx_i3c_ids);
37 dev_err(&i3cdev->dev, "Failed to register i3c regmap %ld\n", PTR_ERR(regmap)); in st_lsm6dsx_i3c_probe()
55 MODULE_DESCRIPTION("STMicroelectronics st_lsm6dsx i3c driver");
/linux/drivers/i3c/master/mipi-i3c-hci/
H A Dxfer_mode_rate.h9 * This applies starting from I3C HCI v2.0.
22 #define XFERMODE_IDX_I3C_SDR 0x00 /* I3C SDR Mode */
23 #define XFERMODE_IDX_I3C_HDR_DDR 0x01 /* I3C HDR-DDR Mode */
24 #define XFERMODE_IDX_I3C_HDR_T 0x02 /* I3C HDR-Ternary Mode */
25 #define XFERMODE_IDX_I3C_HDR_BT 0x03 /* I3C HDR-BT Mode */
H A Dcmd_v2.c7 * I3C HCI v2.0 Command Descriptor Handling
9 * Note: The I3C HCI v2.0 spec is still in flux. The code here will change.
13 #include <linux/i3c/master.h>
70 if (bus->scl_rate.i3c >= 12000000) in get_i3c_rate_idx()
72 if (bus->scl_rate.i3c > 8000000) in get_i3c_rate_idx()
74 if (bus->scl_rate.i3c > 6000000) in get_i3c_rate_idx()
76 if (bus->scl_rate.i3c > 4000000) in get_i3c_rate_idx()
78 if (bus->scl_rate.i3c > 2000000) in get_i3c_rate_idx()

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