| /freebsd/sys/contrib/device-tree/Bindings/sound/ |
| H A D | ingenic,aic.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic SoCs AC97 / I2S Controller (AIC)
10 - Paul Cercueil <paul@crapouillou.net>
13 - $ref: dai-common.yaml#
17 pattern: '^audio-controller@'
21 - enum:
22 - ingenic,jz4740-i2s
23 - ingenic,jz4760-i2s
[all …]
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| H A D | rockchip-max98090.txt | 4 - compatible: "rockchip,rockchip-audio-max98090"
5 - rockchip,model: The user-visible name of this sound complex
6 - rockchip,i2s-controller: The phandle of the Rockchip I2S controller that's
10 - rockchip,audio-codec: The phandle of the MAX98090 audio codec.
11 - rockchip,headset-codec: The phandle of Ext chip for jack detection. This is
12 required if there is rockchip,audio-codec.
13 - rockchip,hdmi-codec: The phandle of HDMI device for HDMI codec.
17 /* For max98090-only board. */
19 compatible = "rockchip,rockchip-audio-max98090";
20 rockchip,model = "ROCKCHIP-I2S";
[all …]
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| H A D | rockchip-i2s.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/rockchip-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip I2S controller
10 The I2S bus (Inter-IC sound bus) is a serial link for digital
14 - Heiko Stuebner <heiko@sntech.de>
17 - $ref: dai-common.yaml#
22 - const: rockchip,rk3066-i2s
23 - items:
[all …]
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| H A D | hisilicon,hi6210-i2s.txt | 1 * Hisilicon 6210 i2s controller
5 - compatible: should be one of the following:
6 - "hisilicon,hi6210-i2s"
7 - reg: physical base address of the i2s controller unit and length of
9 - interrupts: should contain the i2s interrupt.
10 - clocks: a list of phandle + clock-specifier pairs, one for each entry
11 in clock-names.
12 - clock-names: should contain following:
13 - "dacodec"
14 - "i2s-base"
[all …]
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| H A D | snps,designware-i2s.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/snps,designware-i2s
[all...] |
| H A D | designware-i2s.txt | 1 DesignWare I2S controller
4 - compatible : Must be "snps,designware-i2s"
5 - reg : Must contain the I2S core's registers location and length
6 - clocks : Pairs of phandle and specifier referencing the controller's
7 clocks. The controller expects one clock: the clock used as the sampling
9 - clock-names : "i2sclk" for the sample rate reference clock.
10 - dmas: Pairs of phandle and specifier for the DMA channels that are used by
13 - dma-names : "tx" for the transmit channel, "rx" for the receive channel.
16 - interrupts: The interrupt line number for the I2S controller. Add this
17 parameter if the I2S controller that you are using does not support DMA.
[all …]
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| H A D | nvidia,tegra210-i2s.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra210 I2S Controller
10 The Inter-IC Sound (I2S) controller implements full-duplex,
11 bi-directional and single direction point-to-point serial
12 interfaces. It can interface with I2S compatible devices.
13 I2S controller can operate both in master and slave mode.
16 - Jon Hunter <jonathanh@nvidia.com>
[all …]
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| H A D | rockchip,i2s-tdm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/rockchip,i2s-tdm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip I2S/TDM Controller
10 The Rockchip I2S/TDM Controller is a Time Division Multiplexed
15 - Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
18 - $ref: dai-common.yaml#
23 - rockchip,px30-i2s-tdm
24 - rockchip,rk1808-i2s-tdm
[all …]
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| H A D | nvidia,tegra20-i2s.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra20-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra20 I2S Controller
10 The I2S Controller streams synchronous serial audio data between system
11 memory and an external audio device. The controller supports the I2S Left
15 - Thierry Reding <treding@nvidia.com>
16 - Jon Hunter <jonathanh@nvidia.com>
20 const: nvidia,tegra20-i2s
[all …]
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| H A D | amlogic,aiu.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Amlogic AIU audio output controller
10 - Jerome Brunet <jbrunet@baylibre.com>
13 - $ref: dai-common.yaml#
17 pattern: "^audio-controller@.*"
19 "#sound-dai-cells":
24 - enum:
25 - amlogic,aiu-gxbb
[all …]
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| H A D | cirrus,ep9301-i2s.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/cirrus,ep9301-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cirrus EP93xx I2S Controller
10 The I2S controller is used to stream serial audio data between the external
11 I2S CODECs’, ADCs/DACs, and the ARM Core. The controller supports I2S, Left-
12 and Right-Justified DSP formats.
15 - Alexander Sverdlin <alexander.sverdlin@gmail.com>
18 - $ref: dai-common.yaml#
[all …]
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| H A D | st,stm32-i2s.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/st,stm32-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 SPI/I2S Controller
10 - Olivier Moysan <olivier.moysan@foss.st.com>
13 The SPI/I2S block supports I2S/PCM protocols when configured on I2S mode.
14 Only some SPI instances support I2S.
17 - $ref: dai-common.yaml#
22 - st,stm32h7-i2s
[all …]
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| H A D | snow.txt | 4 - compatible : Can be one of the following,
5 "google,snow-audio-max98090" or
6 "google,snow-audio-max98091" or
7 "google,snow-audio-max98095"
8 - samsung,i2s-controller (deprecated): The phandle of the Samsung I2S controller
9 - samsung,audio-codec (deprecated): The phandle of the audio codec
11 Required sub-nodes:
13 - 'cpu' subnode with a 'sound-dai' property containing the phandle of the I2S
14 controller
15 - 'codec' subnode with a 'sound-dai' property containing list of phandles
[all …]
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| H A D | atmel-i2s.txt | 1 * Atmel I2S controller
4 - compatible: Should be "atmel,sama5d2-i2s".
5 - reg: Should be the physical base address of the controller and the
7 - interrupts: Should contain the interrupt for the controller.
8 - dmas: Should be one per channel name listed in the dma-names property,
9 as described in atmel-dma.txt and dma.txt files.
10 - dma-names: Two dmas have to be defined, "tx" and "rx".
12 if this mode is used, one "rx-tx" name must be used.
13 - clocks: Must contain an entry for each entry in clock-names.
14 Please refer to clock-bindings.txt.
[all …]
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| H A D | rockchip-rt5645.txt | 4 - compatible: "rockchip,rockchip-audio-rt5645"
5 - rockchip,model: The user-visible name of this sound complex
6 - rockchip,i2s-controller: The phandle of the Rockchip I2S controller that's
8 - rockchip,audio-codec: The phandle of the RT5645/RT5650 audio codec
13 compatible = "rockchip,rockchip-audio-rt5645";
14 rockchip,model = "ROCKCHIP-I2S";
15 rockchip,i2s-controller = <&i2s>;
16 rockchip,audio-codec = <&rt5645>;
|
| H A D | adi,axi-i2s.txt | 1 ADI AXI-I2S controller
7 - compatible : Must be "adi,axi-i2s-1.00.a"
8 - reg : Must contain I2S core's registers location and length
9 - clocks : Pairs of phandle and specifier referencing the controller's clocks.
10 The controller expects two clocks, the clock used for the AXI interface and
12 - clock-names : "axi" for the clock to the AXI interface, "ref" for the sample
14 - dmas: Pairs of phandle and specifier for the DMA channels that are used by
17 - dma-names : "tx" for the transmit channel, "rx" for the receive channel.
19 For more details on the 'dma', 'dma-names', 'clock' and 'clock-names' properties
21 * resource-names.txt
[all …]
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| H A D | intel,keembay-i2s.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/sound/intel,keembay-i2s.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Intel KeemBay I2S
11 - Daniele Alessandrelli <daniele.alessandrelli@intel.com>
12 - Paul J. Murphy <paul.j.murphy@intel.com>
15 Intel KeemBay I2S
18 - $ref: dai-common.yaml#
23 - intel,keembay-i2s
[all …]
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| H A D | mikroe,mikroe-proto.txt | 1 Mikroe-PROTO audio board
4 - compatible: "mikroe,mikroe-proto"
5 - dai-format: Must be "i2s".
6 - i2s-controller: The phandle of the I2S controller.
7 - audio-codec: The phandle of the WM8731 audio codec.
9 - model: The user-visible name of this sound complex.
10 - bitclock-master: Indicates dai-link bit clock master; for details see simple-card.txt (1).
11 - frame-master: Indicates dai-link frame master; for details see simple-card.txt (1).
17 compatible = "mikroe,mikroe-proto";
19 i2s-controller = <&i2s0>;
[all …]
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| H A D | nxp,lpc3220-i2s.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nxp,lpc3220-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP LPC32XX I2S Controller
10 The I2S controller in LPC32XX SoCs, ASoC DAI.
13 - J.M.B. Downing <jonathan.downing@nautel.com>
14 - Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com>
17 - $ref: dai-common.yaml#
22 - nxp,lpc3220-i2s
[all …]
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| H A D | atmel,sama5d2-i2s.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/sound/atmel,sama5d2-i2s.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Atmel I2S controller
11 - Nicolas Ferre <nicolas.ferre@microchip.com>
12 - Alexandre Belloni <alexandre.belloni@bootlin.com>
13 - Claudiu Beznea <claudiu.beznea@microchip.com>
16 Atmel I2S (Inter-IC Sound Controller) bus is the standard
21 const: atmel,sama5d2-i2s
[all …]
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| H A D | zte,zx-i2s.txt | 1 ZTE ZX296702 I2S controller
4 - compatible : Must be one of:
5 "zte,zx296718-i2s", "zte,zx296702-i2s"
6 "zte,zx296702-i2s"
7 - reg : Must contain I2S core's registers location and length
8 - clocks : Pairs of phandle and specifier referencing the controller's clocks.
9 - clock-names: "wclk" for the wclk, "pclk" for the pclk to the I2S interface.
10 - dmas: Pairs of phandle and specifier for the DMA channel that is used by
12 - dma-names : Must be "tx" and "rx"
14 For more details on the 'dma', 'dma-names', 'clock' and 'clock-names' properties
[all …]
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| H A D | samsung,smdk5250.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
15 const: samsung,smdk-wm8994
17 samsung,audio-codec:
21 samsung,i2s-controller:
22 description: Phandle to the Samsung I2S controller.
26 - compatible
[all …]
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| H A D | mchp,i2s-mcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/mchp,i2s-mcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip I2S Multi-Channel Controller
10 - Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
13 The I2SMCC complies with the Inter-IC Sound (I2S) bus specification and
15 multi-channel audio codecs. It consists of a receiver, a transmitter and a
17 Client or Controller modes with receiver and/or transmitter active.
18 On later I2SMCC versions (starting with Microchip's SAMA7G5) I2S
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/powerpc/fsl/ |
| H A D | mpc5200.txt | 2 ----------------------------
4 (c) 2006-2009 Secret Lab Technologies Ltd
8 ------------------
9 For mpc5200 on-chip devices, the format for each compatible value is
10 <chip>-<device>[-<mode>]. The OS should be able to match a device driver
21 "fsl,mpc5200-<device>".
29 compatible = "fsl,mpc5200b-<device>","fsl,mpc5200-<device>";
34 ie. ethernet on mpc5200: compatible = "fsl,mpc5200-fec";
35 ethernet on mpc5200b: compatible = "fsl,mpc5200b-fec", "fsl,mpc5200-fec";
38 end of the compatible field. ie. A PSC in i2s mode would specify
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/clock/ |
| H A D | clk-exynos-audss.txt | 1 * Samsung Audio Subsystem Clock Controller
3 The Samsung Audio Subsystem clock controller generates and supplies clocks
9 - compatible: should be one of the following:
10 - "samsung,exynos4210-audss-clock" - controller compatible with all Exynos4 SoCs.
11 - "samsung,exynos5250-audss-clock" - controller compatible with Exynos5250
13 - "samsung,exynos5410-audss-clock" - controller compatible with Exynos5410
15 - "samsung,exynos5420-audss-clock" - controller compatible with Exynos5420
17 - reg: physical base address and length of the controller's register set.
19 - #clock-cells: should be 1.
21 - clocks:
[all …]
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