1*c66ec88fSEmmanuel Vadot* Atmel I2S controller 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotRequired properties: 4*c66ec88fSEmmanuel Vadot- compatible: Should be "atmel,sama5d2-i2s". 5*c66ec88fSEmmanuel Vadot- reg: Should be the physical base address of the controller and the 6*c66ec88fSEmmanuel Vadot length of memory mapped region. 7*c66ec88fSEmmanuel Vadot- interrupts: Should contain the interrupt for the controller. 8*c66ec88fSEmmanuel Vadot- dmas: Should be one per channel name listed in the dma-names property, 9*c66ec88fSEmmanuel Vadot as described in atmel-dma.txt and dma.txt files. 10*c66ec88fSEmmanuel Vadot- dma-names: Two dmas have to be defined, "tx" and "rx". 11*c66ec88fSEmmanuel Vadot This IP also supports one shared channel for both rx and tx; 12*c66ec88fSEmmanuel Vadot if this mode is used, one "rx-tx" name must be used. 13*c66ec88fSEmmanuel Vadot- clocks: Must contain an entry for each entry in clock-names. 14*c66ec88fSEmmanuel Vadot Please refer to clock-bindings.txt. 15*c66ec88fSEmmanuel Vadot- clock-names: Should be one of each entry matching the clocks phandles list: 16*c66ec88fSEmmanuel Vadot - "pclk" (peripheral clock) Required. 17*c66ec88fSEmmanuel Vadot - "gclk" (generated clock) Optional (1). 18*c66ec88fSEmmanuel Vadot - "muxclk" (I2S mux clock) Optional (1). 19*c66ec88fSEmmanuel Vadot 20*c66ec88fSEmmanuel VadotOptional properties: 21*c66ec88fSEmmanuel Vadot- pinctrl-0: Should specify pin control groups used for this controller. 22*c66ec88fSEmmanuel Vadot- princtrl-names: Should contain only one value - "default". 23*c66ec88fSEmmanuel Vadot 24*c66ec88fSEmmanuel Vadot 25*c66ec88fSEmmanuel Vadot(1) : Only the peripheral clock is required. The generated clock and the I2S 26*c66ec88fSEmmanuel Vadot mux clock are optional and should only be set together, when Master Mode 27*c66ec88fSEmmanuel Vadot is required. 28*c66ec88fSEmmanuel Vadot 29*c66ec88fSEmmanuel VadotExample: 30*c66ec88fSEmmanuel Vadot 31*c66ec88fSEmmanuel Vadot i2s@f8050000 { 32*c66ec88fSEmmanuel Vadot compatible = "atmel,sama5d2-i2s"; 33*c66ec88fSEmmanuel Vadot reg = <0xf8050000 0x300>; 34*c66ec88fSEmmanuel Vadot interrupts = <54 IRQ_TYPE_LEVEL_HIGH 7>; 35*c66ec88fSEmmanuel Vadot dmas = <&dma0 36*c66ec88fSEmmanuel Vadot (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | 37*c66ec88fSEmmanuel Vadot AT91_XDMAC_DT_PERID(31))>, 38*c66ec88fSEmmanuel Vadot <&dma0 39*c66ec88fSEmmanuel Vadot (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | 40*c66ec88fSEmmanuel Vadot AT91_XDMAC_DT_PERID(32))>; 41*c66ec88fSEmmanuel Vadot dma-names = "tx", "rx"; 42*c66ec88fSEmmanuel Vadot clocks = <&i2s0_clk>, <&i2s0_gclk>, <&i2s0muxck>; 43*c66ec88fSEmmanuel Vadot clock-names = "pclk", "gclk", "muxclk"; 44*c66ec88fSEmmanuel Vadot pinctrl-names = "default"; 45*c66ec88fSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2s0_default>; 46*c66ec88fSEmmanuel Vadot }; 47