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/linux/drivers/staging/sm750fb/
H A Dddk750_swi2c.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * swi2c.h --- SM750/SM718 DDK
6 * This file contains the definitions for i2c using software
14 /* Default i2c CLK and Data GPIO. These are the default i2c pins */
19 * This function initializes the i2c attributes and bus
22 * i2cClkGPIO - The GPIO pin to be used as i2c SCL
23 * i2cDataGPIO - The GPIO pin to be used as i2c SDA
26 * -1 - Fail to initialize the i2c
27 * 0 - Success
32 * This function reads the slave device's register
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H A Dddk750_swi2c.c1 // SPDX-License-Identifier: GPL-2.0
5 * swi2c.c --- SM750/SM718 DDK
6 * This file contains the source code for I2C using software
16 * I2C Software Master Driver:
18 * Each i2c cycle is split into 4 sections. Each of these section marks
22 * +-------------+-------------+-------------+-------------+
37 * ---------------+---+---+---+---+
40 * ---------------+---+---+---+---+
43 * ---------------+---+---+---+---+
46 * ---------------+---+---+---+---+
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/linux/drivers/mfd/
H A Dpalmas.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2011-2012 Texas Instruments Inc.
14 #include <linux/i2c.h>
328 struct palmas_pmic_driver_data *pmic_ddata = palmas->pmic_ddata; in palmas_ext_control_req_config()
350 bit_pos = pmic_ddata->sleep_req_info[id].bit_pos; in palmas_ext_control_req_config()
351 reg_add += pmic_ddata->sleep_req_info[id].reg_offset; in palmas_ext_control_req_config()
359 dev_err(palmas->dev, "Resource reg 0x%02x update failed %d\n", in palmas_ext_control_req_config()
368 dev_err(palmas->dev, "POWER_CTRL register update failed %d\n", in palmas_ext_control_req_config()
376 static int palmas_set_pdata_irq_flag(struct i2c_client *i2c, in palmas_set_pdata_irq_flag() argument
379 struct irq_data *irq_data = irq_get_irq_data(i2c->irq); in palmas_set_pdata_irq_flag()
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/linux/drivers/i2c/busses/
H A Di2c-stm32f7.c1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for STMicroelectronics STM32F7 I2C controller
5 * This I2C controller is described in the STM32F75xxx and STM32F74xxx Soc
14 * This driver is based on i2c-stm32f4.c
20 #include <linux/i2c.h>
21 #include <linux/i2c-smbus.h>
39 #include "i2c-stm32.h"
41 /* STM32F7 I2C registers */
53 /* STM32F7 I2C control 1 */
85 /* STM32F7 I2C control 2 */
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H A Di2c-mlxbf.c1 // SPDX-License-Identifier: GPL-2.0
3 * Mellanox BlueField I2C bus driver
13 #include <linux/i2c.h>
59 * memory-mapped region whose addresses are specified in either the DT or
69 /* Reference clock for Bluefield - 156 MHz. */
126 * Slave cause status flags. Note that those bits might be considered
134 /* Slave busy bit reset. */
151 * SMBUS GW0 -> bits[26:25]
152 * SMBUS GW1 -> bits[28:27]
153 * SMBUS GW2 -> bits[30:29]
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H A Di2c-cadence.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * I2C bus driver for the Cadence I2C controller.
5 * Copyright (C) 2009 - 2014 Xilinx, Inc.
10 #include <linux/i2c.h>
21 /* Register offsets for the I2C device. */
24 #define CDNS_I2C_ADDR_OFFSET 0x08 /* I2C Address Register, RW */
25 #define CDNS_I2C_DATA_OFFSET 0x0C /* I2C Data Register, RW */
60 * I2C Address Register Bit mask definitions
62 * bits. A write access to this register always initiates a transfer if the I2C
65 #define CDNS_I2C_ADDR_MASK 0x000003FF /* I2C Address Mask */
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H A Di2c-axxia.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * This driver implements I2C master functionality using the LSI API2C
8 * (-EINVAL) is returned.
14 #include <linux/i2c.h>
84 #define SLV_ADDR_DEC_SA1M BIT(3) /* 10-bit addressing for addr_1 enabled */
86 #define SLV_ADDR_DEC_SA2M BIT(5) /* 10-bit addressing for addr_2 enabled */
107 #define SLV_STATUS_SRS1 BIT(2) /* Slave read from addr 1 */
108 #define SLV_STATUS_SRRS1 BIT(3) /* Repeated start from addr 1 */
111 #define SLV_STATUS_SRAT1 BIT(6) /* Slave Read timed out */
121 * struct axxia_i2c_dev - I2C device context
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H A Di2c-sh7760.c2 * I2C bus driver for the SH7760 I2C Interfaces.
4 * (c) 2005-2008 MSC Vertriebsges.m.b.H, Manuel Lauss <mlau@msc-ge.com>
13 #include <linux/i2c.h>
22 #include <asm/i2c-sh7760.h>
25 #define I2CSCR 0x0 /* slave ctrl */
27 #define I2CSSR 0x8 /* slave status */
29 #define I2CSIER 0x10 /* slave irq enable */
32 #define I2CSAR 0x1c /* slave address */
43 #define MCR_MDBS 0x80 /* non-fifo mode switch */
58 #define MSR_MAT 0x01 /* slave addr xfer done */
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H A Di2c-gxp.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (C) 2022 Hewlett-Packard Enterprise Development Company, L.P. */
6 #include <linux/i2c.h>
15 "gxp-i2c0", "gxp-i2c1", "gxp-i2c2", "gxp-i2c3",
16 "gxp-i2c4", "gxp-i2c5", "gxp-i2c6", "gxp-i2c7",
17 "gxp-i2c8", "gxp-i2c9" };
19 /* GXP I2C Global interrupt status/enable register*/
23 /* GXP I2C registers */
90 struct i2c_client *slave; member
100 drvdata->buf = drvdata->curr_msg->buf; in gxp_i2c_start()
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H A Di2c-npcm7xx.c1 // SPDX-License-Identifier: GPL-2.0
3 * Nuvoton NPCM7xx I2C Controller driver
11 #include <linux/i2c.h>
29 * External I2C Interface driver xfer indication values, which indicate status
58 /* I2C Bank (module had 2 banks of registers) */
64 /* Internal I2C states values (for the I2C module state machine). */
75 /* Module supports setting multiple own slave addresses */
125 #define NPCM_I2CTXF_CTL 0x12 /* Tx-FIFO Control */
128 #define NPCM_I2CTXF_STS 0x1A /* Tx-FIFO Status */
129 #define NPCM_I2CRXF_STS 0x1C /* Rx-FIFO Status */
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H A Di2c-pnx.c2 * Provides I2C support for Philips PNX010x/PNX4008 boards.
7 * 2004-2006 (c) MontaVista Software, Inc. This file is licensed under
17 #include <linux/i2c.h>
82 #define I2C_REG_RX(a) ((a)->ioaddr) /* Rx FIFO reg (RO) */
83 #define I2C_REG_TX(a) ((a)->ioaddr) /* Tx FIFO reg (WO) */
84 #define I2C_REG_STS(a) ((a)->ioaddr + 0x04) /* Status reg (RO) */
85 #define I2C_REG_CTL(a) ((a)->ioaddr + 0x08) /* Ctl reg */
86 #define I2C_REG_CKL(a) ((a)->ioaddr + 0x0c) /* Clock divider low */
87 #define I2C_REG_CKH(a) ((a)->ioaddr + 0x10) /* Clock divider high */
88 #define I2C_REG_ADR(a) ((a)->ioaddr + 0x14) /* I2C address */
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H A Di2c-bcm-iproc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 #include <linux/i2c.h>
138 #define M_RX_FIFO_MAX_THLD_VALUE (M_TX_RX_FIFO_SIZE - 1)
155 * running for less time, max slave read per tasklet is set to 10 bytes.
197 struct i2c_client *slave; member
213 /* tasklet to process slave rx data */
233 if (iproc_i2c->idm_base) { in iproc_i2c_rd_reg()
234 spin_lock_irqsave(&iproc_i2c->idm_lock, flags); in iproc_i2c_rd_reg()
235 writel(iproc_i2c->ape_addr_mask, in iproc_i2c_rd_reg()
236 iproc_i2c->idm_base + IDM_CTRL_DIRECT_OFFSET); in iproc_i2c_rd_reg()
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/linux/drivers/i2c/
H A Di2c-core-smbus.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Linux I2C core SMBus and SMBus emulation code
5 * This file contains the SMBus functions which are always included in the I2C
6 * core because they can be emulated via I2C. SMBus specific extensions
7 * (e.g. smbalert) are handled in a separate i2c-smbus module.
9 * All SMBus-related things are written by Frodo Looijaard <frodol@dds.nl>
15 #include <linux/i2c.h>
16 #include <linux/i2c-smbus.h>
21 #include "i2c-core.h"
43 * i2c_smbus_pec - Incremental CRC8 over the given input data array
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H A Di2c-slave-testunit.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * I2C slave mode testunit
5 * Copyright (C) 2020 by Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
13 #include <linux/i2c.h>
64 gpiod_set_value(tu->gpio, 0); in i2c_slave_testunit_smbalert_cb()
67 *val = tu->regs[TU_REG_DATAL]; in i2c_slave_testunit_smbalert_cb()
71 complete(&tu->alert_done); in i2c_slave_testunit_smbalert_cb()
76 return -EOPNOTSUPP; in i2c_slave_testunit_smbalert_cb()
86 bool is_proc_call = tu->reg_idx == 3 && tu->regs[TU_REG_DATAL] == 1 && in i2c_slave_testunit_slave_cb()
87 tu->regs[TU_REG_CMD] == TU_CMD_SMBUS_BLOCK_PROC_CALL; in i2c_slave_testunit_slave_cb()
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/linux/drivers/media/usb/dvb-usb/
H A Dm920x.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 #include "dvb-usb.h"
27 0x80 write addr
31 0x80 write addr
33 0x80 read addr
38 0x80 read addr
42 Guess at API of the I2C function:
43 I2C operation is done one byte at a time with USB control messages. The
45 the I2C bus state:
47 always send the 7-bit slave I2C address as the 7 MSB, followed by
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/linux/include/linux/
H A Di2c.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * i2c.h - definitions for the Linux i2c bus interface
4 * Copyright (C) 1995-2000 Simon G. Vogl
5 * Copyright (C) 2013-2019 Wolfram Sang <wsa@kernel.org>
24 #include <uapi/linux/i2c.h>
30 /* --- General options ------------------------------------------------ */
43 /* I2C Frequency Modes */
69 * i2c_master_recv - issue a single I2C message in master receive mode
70 * @client: Handle to slave device
71 * @buf: Where to store data read from slave
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/linux/Documentation/devicetree/bindings/fsi/
H A Dfsi.txt4 The FSI bus is probe-able, so the OS is able to enumerate FSI slaves, and
6 nodes to probed engines. This allows for fsi engines to expose non-probeable
8 that is an I2C master - the I2C bus can be described by the device tree under
13 the fsi-master-* binding specifications.
16 represent the FSI slaves and their slave engines. As a basic outline:
18 fsi-master {
19 /* top-level of FSI bus topology, bound to an FSI master driver and
22 fsi-slave@<link,id> {
23 /* this node defines the FSI slave device, and is handled
26 fsi-slave-engine@<addr> {
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/linux/Documentation/devicetree/bindings/soc/tegra/
H A Dnvidia,nvec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
26 - description: divider clock
27 - description: fast clock
29 clock-names:
32 - const: div-clk
33 - const: fast-clk
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/linux/drivers/iio/imu/inv_mpu6050/
H A Dinv_mpu_aux.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2019 TDK-InvenSense, Inc.
15 * i2c master auxiliary bus transfer function.
16 * Requires the i2c operations to be correctly setup before.
32 ret = regmap_write(st->map, st->reg->sample_rate_div, d); in inv_mpu_i2c_master_xfer()
36 /* start i2c master */ in inv_mpu_i2c_master_xfer()
37 user_ctrl = st->chip_config.user_ctrl | INV_MPU6050_BIT_I2C_MST_EN; in inv_mpu_i2c_master_xfer()
38 ret = regmap_write(st->map, st->reg->user_ctrl, user_ctrl); in inv_mpu_i2c_master_xfer()
42 /* wait for xfer: 1 period + half-period margin */ in inv_mpu_i2c_master_xfer()
45 /* stop i2c master */ in inv_mpu_i2c_master_xfer()
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/linux/drivers/media/usb/dvb-usb-v2/
H A Dmxl111sf-i2c.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * mxl111sf-i2c.c - driver for the MaxLinear MXL111SF
5 * Copyright (C) 2010-2014 Michael Krufky <mkrufky@linuxtv.org>
8 #include "mxl111sf-i2c.h"
11 /* SW-I2C ----------------------------------------------------------------- */
79 ret = -EIO; in mxl111sf_i2c_bitbang_sendbyte()
210 /* SDA high to signal last byte read from slave */ in mxl111sf_i2c_nack()
223 /* ------------------------------------------------------------------------ */
232 if (msg->flags & I2C_M_RD) { in mxl111sf_i2c_sw_xfer_msg()
239 (msg->addr << 1) | 0x01); in mxl111sf_i2c_sw_xfer_msg()
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/linux/include/uapi/linux/
H A Di2c.h1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
3 * i2c.h - definitions for the I2C bus interface
5 * Copyright (C) 1995-2000 Simon G. Vogl
16 * struct i2c_msg - an I2C transaction segment beginning with START
18 * @addr: Slave address, either 7 or 10 bits. When this is a 10 bit address,
24 * %I2C_M_RD: read data (from slave to master). Guaranteed to be 0x0001! If
46 * @len: Number of data bytes in @buf being read from or written to the I2C
47 * slave address. For read transactions where %I2C_M_RECV_LEN is set, the
49 * bytes in addition to the initial length byte sent by the slave (plus,
55 * An i2c_msg is the low level representation of one segment of an I2C
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/linux/Documentation/i2c/
H A Dsmbus-protocol.rst11 which is a subset from the I2C protocol. Fortunately, many devices use
14 If you write a driver for some I2C device, please try to use the SMBus
16 I2C protocol). This makes it possible to use the device driver on both
17 SMBus adapters and I2C adapters (the SMBus command set is automatically
18 translated to I2C on I2C adapters, but plain I2C commands can not be
29 the corresponding functionality flag to ensure that the underlying I2C
31 Documentation/i2c/functionality.rst for the details.
44 Addr (7 bits) I2C 7 bit address. Note that this can be expanded to
45 get a 10 bit I2C address.
52 [..] Data sent by I2C device, as opposed to data sent by the host
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/linux/include/linux/i3c/
H A Dccc.h1 /* SPDX-License-Identifier: GPL-2.0 */
30 /* Broadcast-only commands */
36 /* Unicast-only commands */
56 * struct i3c_ccc_events - payload passed to ENEC/DISEC CCC
69 * struct i3c_ccc_mwl - payload passed to SETMWL/GETMWL CCC
81 * struct i3c_ccc_mrl - payload passed to SETMRL/GETMRL CCC
88 * The IBI length is only valid if the I3C slave is IBI capable
97 * struct i3c_ccc_dev_desc - I3C/I2C device descriptor used for DEFSLVS
99 * @dyn_addr: dynamic address assigned to the I3C slave or 0 if the entry is
100 * describing an I2C slave.
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/linux/drivers/media/tuners/
H A Dtda18271.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 tda18271.h - header for the Philips / NXP TDA18271 silicon tuner
12 #include <linux/i2c.h>
60 /* slave tuner output & loop through & xtal oscillator always on */
63 /* slave tuner output loop through off */
81 /* master / slave tuner: master uses main pll, slave uses cal pll */
84 /* use i2c gate provided by analog or digital demod */
90 /* some i2c providers can't write all 39 registers at once */
113 extern struct dvb_frontend *tda18271_attach(struct dvb_frontend *fe, u8 addr,
114 struct i2c_adapter *i2c,
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/linux/drivers/media/usb/em28xx/
H A Dem28xx-i2c.c1 // SPDX-License-Identifier: GPL-2.0+
3 // em28xx-i2c.c - driver for Empia EM2800/EM2820/2840 USB video capture devices
16 #include <linux/i2c.h>
20 #include <media/v4l2-common.h>
23 /* ----------------------------------------------------------- */
27 MODULE_PARM_DESC(i2c_scan, "scan i2c bus at insmod time");
31 MODULE_PARM_DESC(i2c_debug, "i2c debug message level (1: normal debug, 2: show I2C transfers)");
35 dev_printk(KERN_DEBUG, &dev->intf->dev, \
36 "i2c: %s: " fmt, __func__, ## arg); \
40 * Time in msecs to wait for i2c xfers to finish.
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