| /freebsd/sys/contrib/device-tree/Bindings/i2c/ |
| H A D | i2c-pxa.txt | 1 * Marvell MMP I2C controller
5 - reg : Offset and length of the register set for the device
6 - compatible : should be "mrvl,mmp-twsi" where mmp is the name of a
8 For the pxa2xx/pxa3xx, an additional node "mrvl,pxa-i2c" is required
10 For the Armada 3700, the compatible should be "marvell,armada-3700-i2c".
14 - interrupts : the interrupt number
15 - mrvl,i2c-polling : Disable interrupt of i2c controller. Polling
16 status register of i2c controller instead.
17 - mrvl,i2c-fast-mode : Enable fast mode of i2c controller.
20 twsi1: i2c@d4011000 {
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| H A D | i2c-pxa.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-pxa.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Marvell MMP I2C controller
10 - Rob Herring <robh@kernel.org>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
14 - if:
17 - mrvl,i2c-polling
20 - interrupts
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| H A D | nvidia,tegra20-i2c.txt | 1 NVIDIA Tegra20/Tegra30/Tegra114 I2C controller driver.
4 - compatible : For Tegra20, must be one of "nvidia,tegra20-i2c-dvc" or
5 "nvidia,tegra20-i2c". For Tegra30, must be "nvidia,tegra30-i2c".
6 For Tegra114, must be "nvidia,tegra114-i2c". Otherwise, must be
7 "nvidia,<chip>-i2c", plus at least one of the above, where <chip> is
10 nvidia,tegra20-i2c-dvc: Tegra20 has specific I2C controller called as DVC I2C
11 controller. This only support master mode of I2C communication. Register
12 interface/offset and interrupts handling are different than generic I2C
13 controller. Driver of DVC I2C controller is only compatible with
14 "nvidia,tegra20-i2c-dvc".
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| H A D | nvidia,tegra20-i2c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/nvidia,tegra20-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 - Thierry Reding <thierry.reding@gmail.com>
9 - Jon Hunter <jonathanh@nvidia.com>
11 title: NVIDIA Tegra I2C controller driver
16 - description: Tegra20 has 4 generic I2C controller. This can support
17 master and slave mode of I2C communication. The i2c-tegra driver
18 only support master mode of I2C communication. Driver of I2C
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| H A D | st,stm32-i2c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/st,stm32-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: I2C controller embedded in STMicroelectronics STM32 I2C platform
10 - Pierre-Yves MORDRET <pierre-yves.mordret@foss.st.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
14 - if:
19 - st,stm32f7-i2c
20 - st,stm32mp13-i2c
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| H A D | i2c-st.txt | 1 ST SSC binding, for I2C mode operation
4 - compatible : Must be "st,comms-ssc-i2c" or "st,comms-ssc4-i2c"
5 - reg : Offset and length of the register set for the device
6 - interrupts : the interrupt specifier
7 - clock-names: Must contain "ssc".
8 - clocks: Must contain an entry for each name in clock-names. See the common
10 - A pinctrl state named "default" must be defined to set pins in mode of
11 operation for I2C transfer.
14 - clock-frequency : Desired I2C bus clock frequency in Hz. If not specified,
15 the default 100 kHz frequency will be used. As only Normal and Fast modes
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| H A D | i2c-exynos5.txt | 1 * Samsung's High Speed I2C controller
3 The Samsung's High Speed I2C controller is used to interface with I2C devices
7 - compatible: value should be.
8 -> "samsung,exynos5-hsi2c", (DEPRECATED)
9 for i2c compatible with HSI2C available
11 -> "samsung,exynos5250-hsi2c", for i2c compatible with HSI2C available
13 -> "samsung,exynos5260-hsi2c", for i2c compatible with HSI2C available
15 -> "samsung,exynos7-hsi2c", for i2c compatible with HSI2C available
18 - reg: physical base address of the controller and length of memory mapped
20 - interrupts: interrupt number to the cpu.
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| H A D | i2c-rk3x.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-rk3x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip RK3xxx I2C controller
10 This driver interfaces with the native I2C controller present in Rockchip
14 - $ref: /schemas/i2c/i2c-controller.yaml#
17 - Heiko Stuebner <heiko@sntech.de>
23 - const: rockchip,rv1108-i2c
24 - const: rockchip,rk3066-i2c
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| H A D | i2c-exynos5.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-exynos5.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung's High Speed I2C controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 The Samsung's High Speed I2C controller is used to interface with I2C devices
18 define USI node in device tree file, choosing "i2c" configuration. Please see
19 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml for details.
24 - enum:
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| /freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
| H A D | brcm,bcm11351-pinctrl.txt | 10 - compatible: Must be "brcm,bcm11351-pinctrl"
11 - reg: Base address of the PAD Controller register block and the size
17 compatible = "brcm,bcm11351-pinctrl";
27 Each pin configuration node is a sub-node of the pin controller node and is a
31 Please refer to the pinctrl-bindings.txt in this directory for details of the
45 details generic pin config properties, please refer to pinctrl-bindings.txt
46 and <include/linux/pinctrl/pinconfig-generic.h>.
49 Standard, I2C, and HDMI. Each type accepts a different set of pin config
54 - pins: Multiple strings. Specifies the name(s) of one or more pins to
59 - function: String. Specifies the pin mux selection. Values
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| /freebsd/sys/contrib/device-tree/Bindings/power/supply/ |
| H A D | richtek,rt5033-charger.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/supply/richtek,rt5033-charger.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jakob Hauser <jahau@rocketmail.com>
14 under sub-node named "charger" using the following format.
18 const: richtek,rt5033-charger
20 monitored-battery:
26 precharge-current-microamp:
27 Current of pre-charge mode. The pre-charge current levels are 350 mA
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| H A D | summit,smb347-charger.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/supply/summit,smb347-charger.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - David Heidelberg <david@ixit.cz>
11 - Dmitry Osipenko <digetx@gmail.com>
16 - summit,smb345
17 - summit,smb347
18 - summit,smb358
26 monitored-battery:
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| /freebsd/sys/dev/ichiic/ |
| H A D | ig4_reg.h | 36 * Intel fourth generation mobile cpus integrated I2C device.
40 * https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/4th-gen-core-family-mobile-i-o-datasheet.pdf
42 * This is a from-scratch driver under the BSD license using the Intel data
48 * This controller is an I2C maste
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| /freebsd/sys/contrib/device-tree/src/arm/aspeed/ |
| H A D | aspeed-bmc-facebook-yosemite4.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later
4 /dts-v1/;
5 #include "aspeed-g6.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/leds/leds-pca955x.h>
8 #include <dt-bindings/i2c/i2c.h>
12 compatible = "facebook,yosemite4-bmc", "aspeed,ast2600";
23 stdout-path = "serial4:57600n8";
31 iio-hwmon {
32 compatible = "iio-hwmon";
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| H A D | aspeed-bmc-inventec-transformers.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later
4 /dts-v1/;
6 #include "aspeed-g6.dtsi"
7 #include "aspeed-g6-pinctrl.dtsi"
8 #include <dt-binding
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| /freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
| H A D | fsl-lx2160a-bluebox3.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 // Copyright 2020-2021 NXP
7 /dts-v1/;
9 #include "fsl-lx2160a.dtsi"
13 compatible = "fsl,lx2160a-bluebox3", "fsl,lx2160a";
23 stdout-path = "serial0:115200n8";
26 sb_3v3: regulator-sb3v3 {
27 compatible = "regulator-fixed";
28 regulator-name = "MC34717-3.3VSB";
29 regulator-min-microvolt = <3300000>;
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| H A D | fsl-lx2160a-cex7.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 // Device Tree file for LX2160A-CEx7
7 /dts-v1/;
9 #include "fsl-lx2160a.dtsi"
13 compatible = "solidrun,lx2160a-cex7", "fsl,lx2160a";
19 sb_3v3: regulator-sb3v3 {
20 compatible = "regulator-fixed";
21 regulator-name = "RT7290";
22 regulator-min-microvolt = <3300000>;
23 regulator-max-microvolt = <3300000>;
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| /freebsd/sys/contrib/device-tree/Bindings/mfd/ |
| H A D | max77693.txt | 1 Maxim MAX77693 multi-function device
4 - PMIC,
5 - CHARGER,
6 - LED,
7 - MUIC,
8 - HAPTIC
10 It is interfaced to host controller using i2c.
14 - compatible : Must be "maxim,max77693".
15 - reg : Specifies the i2c slave address of PMIC block.
16 - interrupts : This i2c device has an IRQ line connected to the main SoC.
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| H A D | max14577.txt | 1 Maxim MAX14577/77836 Multi-Function Device
3 MAX14577 is a Multi-Function Device with Micro-USB Interface Circuit, Li+
5 interfaced to host controller using I2C.
13 - compatible : Must be "maxim,max14577" or "maxim,max77836".
14 - reg : I2C slave address for the max14577 chip (0x25 for max14577/max77836)
15 - interrupts : IRQ line for the chip.
19 - charger :
22 - compatible : "maxim,max14577-charger"
23 or "maxim,max77836-charger"
24 - maxim,fast-charge-uamp : Current in uA for Fast Charge;
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| /freebsd/sys/contrib/device-tree/Bindings/clock/ |
| H A D | nvidia,tegra124-dfll.txt | 4 Documentation/devicetree/bindings/clock/clock-bindings.txt
7 the fast CPU cluster. It consists of a free-running voltage controlled
10 communicating with an off-chip PMIC either via an I2C bus or via PWM signals.
13 - compatible : should be one of:
14 - "nvidia,tegra124-dfll": for Tegra124
15 - "nvidia,tegra210-dfll": for Tegra210
16 - reg : Defines the following set of registers, in the order listed:
17 - registers for the DFLL control logic.
18 - registers for the I2C output logic.
19 - registers for the integrated I2C master controller.
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| /freebsd/sys/contrib/device-tree/Bindings/i3c/ |
| H A D | i3c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
11 - Miquel Raynal <miquel.raynal@bootlin.com>
15 and a set of child nodes for each I2C or I3C slave on the bus. Each of them
20 pattern: "^i3c@[0-9a-f]+$"
22 "#address-cells":
25 Each I2C device connected to the bus should be described in a subnode.
35 this I3C device has a static I2C address and we want to assign it a
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| H A D | i3c.txt | 8 -------------------
10 - #address-cells - should be <3>. Read more about addresses below.
11 - #size-cells - should be <0>.
12 - compatible - name of the I3C master controller driving the I3C bus
16 The node describing an I3C bus should be named i3c-master.
19 -------------------
24 - i3c-scl-hz: frequency of the SCL signal used for I3C transfers.
27 - i2c-scl-hz: frequency of the SCL signal used for I2C transfers.
29 values of I2C devices described in the device tree to determine
30 the maximum I2C frequency.
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| /freebsd/sys/contrib/device-tree/src/arm64/marvell/ |
| H A D | armada-3720-uDPU.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include "armada-3720-uDPU.dtsi"
11 sfp_eth0: sfp-eth0 {
13 i2c-bus = <&i2c0>;
14 los-gpios = <&gpiosb 2 GPIO_ACTIVE_HIGH>;
15 mod-def0-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
16 tx-disable-gpios = <&gpiosb 4 GPIO_ACTIVE_HIGH>;
17 tx-fault-gpios = <&gpiosb 5 GPIO_ACTIVE_HIGH>;
18 maximum-power-milliwatt = <3000>;
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| /freebsd/sys/arm/ti/ |
| H A D | ti_i2c.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
31 * Driver for the I2C module on the TI SoC.
72 * I2C device driver context, a pointer to this is stored in the device
100 uint8_t psc; /* Fast/Standard mode prescale divider */
101 uint8_t scll; /* Fast/Standard mode SCL low time */
102 uint8_t sclh; /* Fast/Standard mode SCL high time */
103 uint8_t hsscll; /* High Speed mode SCL low time */
104 uint8_t hssclh; /* High Speed mode SCL high time */
109 * OMAP4 i2c bus clock is 96MHz / ((psc + 1) * (scll + 7 + sclh + 5)).
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| /freebsd/sys/contrib/device-tree/src/arm/intel/socfpga/ |
| H A D | socfpga_cyclone5_vining_fpga.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR X11)
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
12 compatible = "samtec,vining", "altr,socfpga-cyclone5", "altr,socfpga";
16 stdout-path = "serial0:115200n8";
34 gpio-keys {
35 compatible = "gpio-keys";
68 regulator-usb-nrst {
69 compatible = "regulator-fixed";
70 regulator-name = "usb_nrst";
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