Lines Matching +full:i2c +full:- +full:fast +full:- +full:mode
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
31 * Driver for the I2C module on the TI SoC.
72 * I2C device driver context, a pointer to this is stored in the device
100 uint8_t psc; /* Fast/Standard mode prescale divider */
101 uint8_t scll; /* Fast/Standard mode SCL low time */
102 uint8_t sclh; /* Fast/Standard mode SCL high time */
103 uint8_t hsscll; /* High Speed mode SCL low time */
104 uint8_t hssclh; /* High Speed mode SCL high time */
109 * AM335x i2c bus clock is 48MHZ / ((psc + 1) * (scll + 7 + sclh + 5))
123 #define TI_I2C_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
124 #define TI_I2C_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
126 mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->sc_dev), \
128 #define TI_I2C_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx)
129 #define TI_I2C_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED)
130 #define TI_I2C_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED)
134 device_printf((_sc)->sc_dev, fmt, ##args)
140 * ti_i2c_read_2 - reads a 16-bit value from one of the I2C registers
141 * @sc: I2C device context
149 * 16-bit value read from the register.
155 return (bus_read_2(sc->sc_mem_res, off)); in ti_i2c_read_2()
159 * ti_i2c_write_2 - writes a 16-bit value to one of the I2C registers
160 * @sc: I2C device context
168 * 16-bit value read from the register.
174 bus_write_2(sc->sc_mem_res, off, val); in ti_i2c_write_2()
189 sc->sc_error = ENXIO; in ti_i2c_transfer_intr()
194 sc->sc_error = ENXIO; in ti_i2c_transfer_intr()
199 /* Register access ready - transaction complete basically. */ in ti_i2c_transfer_intr()
201 if (sc->sc_error != 0 && sc->sc_buffer->flags & IIC_M_NOSTOP) { in ti_i2c_transfer_intr()
203 sc->sc_con_reg | I2C_CON_STP); in ti_i2c_transfer_intr()
211 if (sc->sc_buffer->flags & IIC_M_RD) { in ti_i2c_transfer_intr()
215 * Receive draining interrupt - last data received. in ti_i2c_transfer_intr()
224 amount = sc->sc_buffer->len - sc->sc_buffer_pos; in ti_i2c_transfer_intr()
227 * Receive data ready interrupt - FIFO has reached the in ti_i2c_transfer_intr()
232 amount = min(sc->sc_fifo_trsh, in ti_i2c_transfer_intr()
233 sc->sc_buffer->len - sc->sc_buffer_pos); in ti_i2c_transfer_intr()
238 sc->sc_buffer->buf[sc->sc_buffer_pos++] = in ti_i2c_transfer_intr()
250 * Transmit draining interrupt - FIFO level is below in ti_i2c_transfer_intr()
260 amount = sc->sc_buffer->len - sc->sc_buffer_pos; in ti_i2c_transfer_intr()
263 * Transmit data ready interrupt - the FIFO level in ti_i2c_transfer_intr()
268 amount = min(sc->sc_fifo_trsh, in ti_i2c_transfer_intr()
269 sc->sc_buffer->len - sc->sc_buffer_pos); in ti_i2c_transfer_intr()
275 sc->sc_buffer->buf[sc->sc_buffer_pos++]); in ti_i2c_transfer_intr()
287 * ti_i2c_intr - interrupt handler for the I2C module
288 * @dev: i2c device handle
323 if (sc->sc_buffer != NULL) in ti_i2c_intr()
327 sc->sc_error = EINVAL; in ti_i2c_intr()
339 * ti_i2c_transfer - called to perform the transfer
340 * @dev: i2c device handle
363 while (sc->sc_bus_inuse == 1) in ti_i2c_transfer()
364 mtx_sleep(sc, &sc->sc_mtx, 0, "i2cbuswait", 0); in ti_i2c_transfer()
366 /* Now we have control over the I2C controller. */ in ti_i2c_transfer()
367 sc->sc_bus_inuse = 1; in ti_i2c_transfer()
372 sc->sc_buffer = &msgs[i]; in ti_i2c_transfer()
373 sc->sc_buffer_pos = 0; in ti_i2c_transfer()
374 sc->sc_error = 0; in ti_i2c_transfer()
377 if (sc->sc_buffer == NULL || sc->sc_buffer->buf == NULL || in ti_i2c_transfer()
378 sc->sc_buffer->len == 0) { in ti_i2c_transfer()
383 /* Check if the i2c bus is free. */ in ti_i2c_transfer()
401 if (sc->sc_buffer->flags & IIC_M_NOSTOP) in ti_i2c_transfer()
408 ti_i2c_write_2(sc, I2C_REG_CNT, sc->sc_buffer->len); in ti_i2c_transfer()
415 reg = sc->sc_con_reg | I2C_CON_STT; in ti_i2c_transfer()
418 if ((sc->sc_buffer->flags & IIC_M_RD) == 0) in ti_i2c_transfer()
423 err = mtx_sleep(sc, &sc->sc_mtx, 0, "i2ciowait", sc->sc_timeout); in ti_i2c_transfer()
425 err = sc->sc_error; in ti_i2c_transfer()
439 /* Put the controller in master mode again. */ in ti_i2c_transfer()
441 ti_i2c_write_2(sc, I2C_REG_CON, sc->sc_con_reg); in ti_i2c_transfer()
443 sc->sc_buffer = NULL; in ti_i2c_transfer()
444 sc->sc_bus_inuse = 0; in ti_i2c_transfer()
469 panic("Unknown TI SoC, unable to reset the i2c"); in ti_i2c_reset()
480 if (sc->sc_iicbus == NULL) in ti_i2c_reset()
483 busfreq = IICBUS_GET_FREQUENCY(sc->sc_iicbus, speed); in ti_i2c_reset()
491 * 23.1.4.3 - HS I2C Software Reset in ti_i2c_reset()
496 sc->sc_con_reg = 0; in ti_i2c_reset()
497 ti_i2c_write_2(sc, I2C_REG_CON, sc->sc_con_reg); in ti_i2c_reset()
500 bus_write_2(sc->sc_mem_res, I2C_REG_SYSC, I2C_REG_SYSC_SRST); in ti_i2c_reset()
518 * Disable the I2C controller once again, now that the reset has in ti_i2c_reset()
521 ti_i2c_write_2(sc, I2C_REG_CON, sc->sc_con_reg); in ti_i2c_reset()
536 ti_i2c_write_2(sc, I2C_REG_PSC, clkcfg->psc); in ti_i2c_reset()
542 * (see Table 23-8). in ti_i2c_reset()
544 scll = clkcfg->scll & I2C_SCLL_MASK; in ti_i2c_reset()
545 sclh = clkcfg->sclh & I2C_SCLH_MASK; in ti_i2c_reset()
550 * 400K bps or 3.4M bps (for the second phase of HS mode). These in ti_i2c_reset()
552 * Table 23-8). in ti_i2c_reset()
564 * 6. Configure the Own Address of the I2C controller by storing it in in ti_i2c_reset()
567 * for each I2C controller. in ti_i2c_reset()
569 * Note: For a 10-bit address, set the corresponding expand Own Address in ti_i2c_reset()
572 * Driver currently always in single master mode so ignore this step. in ti_i2c_reset()
576 * 7. Set the TX threshold (in transmitter mode) and the RX threshold in ti_i2c_reset()
577 * (in receiver mode) by setting the I2Ci.I2C_BUF[5:0]XTRSH field to in ti_i2c_reset()
578 * (TX threshold - 1) and the I2Ci.I2C_BUF[13:8]RTRSH field to (RX in ti_i2c_reset()
579 * threshold - 1), where the TX and RX thresholds are greater than in ti_i2c_reset()
584 fifo_trsh = (sc->sc_fifo_trsh - 1) & I2C_BUF_TRSH_MASK; in ti_i2c_reset()
589 * 8. Take the I2C controller out of reset by setting the in ti_i2c_reset()
592 * 23.1.5.1.1.1.2 - Initialize the I2C Controller in ti_i2c_reset()
594 * To initialize the I2C controller, perform the following steps: in ti_i2c_reset()
597 * . For master or slave mode, set the I2Ci.I2C_CON[10] MST bit in ti_i2c_reset()
599 * . For transmitter or receiver mode, set the I2Ci.I2C_CON[9] TRX in ti_i2c_reset()
603 /* Enable the I2C controller in master mode. */ in ti_i2c_reset()
604 sc->sc_con_reg |= I2C_CON_I2C_EN | I2C_CON_MST; in ti_i2c_reset()
605 ti_i2c_write_2(sc, I2C_REG_CON, sc->sc_con_reg); in ti_i2c_reset()
674 * ti_i2c_deactivate - deactivates the controller and releases resources
675 * @dev: i2c device handle
690 /* Disable the controller - cancel all transactions. */ in ti_i2c_deactivate()
696 if (sc->sc_irq_h != NULL) { in ti_i2c_deactivate()
697 bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_irq_h); in ti_i2c_deactivate()
698 sc->sc_irq_h = NULL; in ti_i2c_deactivate()
701 /* Unmap the I2C controller registers. */ in ti_i2c_deactivate()
702 if (sc->sc_mem_res != NULL) { in ti_i2c_deactivate()
703 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); in ti_i2c_deactivate()
704 sc->sc_mem_res = NULL; in ti_i2c_deactivate()
708 if (sc->sc_irq_res != NULL) { in ti_i2c_deactivate()
709 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res); in ti_i2c_deactivate()
710 sc->sc_irq_res = NULL; in ti_i2c_deactivate()
753 val = sc->sc_timeout; in ti_i2c_sysctl_timeout()
758 if ((err == 0) && (req->newptr != NULL)) { in ti_i2c_sysctl_timeout()
760 sc->sc_timeout = val; in ti_i2c_sysctl_timeout()
773 if (!ofw_bus_is_compatible(dev, "ti,omap4-i2c")) in ti_i2c_probe()
775 device_set_desc(dev, "TI I2C Controller"); in ti_i2c_probe()
790 sc->sc_dev = dev; in ti_i2c_attach()
794 sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, in ti_i2c_attach()
796 if (sc->sc_mem_res == NULL) { in ti_i2c_attach()
803 sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, in ti_i2c_attach()
805 if (sc->sc_irq_res == NULL) { in ti_i2c_attach()
806 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); in ti_i2c_attach()
820 /* Read the version number of the I2C module */ in ti_i2c_attach()
821 sc->sc_rev = ti_i2c_read_2(sc, I2C_REG_REVNB_HI) & 0xff; in ti_i2c_attach()
828 device_printf(dev, "I2C revision %d.%d FIFO size: %d bytes\n", in ti_i2c_attach()
829 sc->sc_rev >> 4, sc->sc_rev & 0xf, 8 << fifosz); in ti_i2c_attach()
832 sc->sc_fifo_trsh = 5; in ti_i2c_attach()
834 /* Set I2C bus timeout */ in ti_i2c_attach()
835 sc->sc_timeout = 5*hz; in ti_i2c_attach()
841 ti_i2c_sysctl_clk, "IU", "I2C bus clock"); in ti_i2c_attach()
845 ti_i2c_sysctl_timeout, "IU", "I2C bus timeout (in ticks)"); in ti_i2c_attach()
848 err = bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_MISC | INTR_MPSAFE, in ti_i2c_attach()
849 NULL, ti_i2c_intr, sc, &sc->sc_irq_h); in ti_i2c_attach()
854 if ((sc->sc_iicbus = device_add_child(dev, "iicbus", in ti_i2c_attach()