/linux/arch/riscv/boot/dts/sophgo/ |
H A D | sg2042-cpus.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #address-cells = <1>; 9 #size-cells = <0>; 10 timebase-frequency = <50000000>; 12 cpu-map { 260 riscv,isa-base = "rv64i"; 261 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", 265 i-cache-block-size = <64>; 266 i-cache-size = <65536>; 267 i-cache-sets = <512>; [all …]
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H A D | sg2044-cpus.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 #address-cells = <2>; 8 #size-cells = <2>; 11 #address-cells = <1>; 12 #size-cells = <0>; 13 timebase-frequency = <50000000>; 18 i-cache-block-size = <64>; 19 i-cache-size = <65536>; 20 i-cache-sets = <512>; 21 d-cache-block-size = <64>; [all …]
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H A D | cv180x-cpus.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 9 #address-cells = <1>; 10 #size-cells = <0>; 11 timebase-frequency = <25000000>; 17 d-cache-block-size = <64>; 18 d-cache-sets = <512>; 19 d-cache-size = <65536>; 20 i-cache-block-size = <64>; 21 i-cache-sets = <128>; 22 i-cache-size = <32768>; [all …]
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/linux/arch/riscv/boot/dts/spacemit/ |
H A D | k1.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 6 #include <dt-bindings/clock/spacemit,k1-syscon.h> 8 /dts-v1/; 10 #address-cells = <2>; 11 #size-cells = <2>; 16 #address-cells = <1>; 17 #size-cells = <0>; 18 timebase-frequency = <24000000>; 20 cpu-map { 57 riscv,isa-base = "rv64i"; [all …]
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/linux/arch/riscv/boot/dts/sifive/ |
H A D | fu540-c000.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 2 /* Copyright (c) 2018-2019 SiFive, Inc */ 4 /dts-v1/; 6 #include <dt-bindings/clock/sifive-fu540-prci.h> 9 #address-cells = <2>; 10 #size-cells = <2>; 11 compatible = "sifive,fu540-c000", "sifive,fu540"; 23 #address-cells = <1>; 24 #size-cells = <0>; 28 i-cache-block-size = <64>; [all …]
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H A D | fu740-c000.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 /dts-v1/; 6 #include <dt-bindings/clock/sifive-fu740-prci.h> 9 #address-cells = <2>; 10 #size-cells = <2>; 11 compatible = "sifive,fu740-c000", "sifive,fu740"; 23 #address-cells = <1>; 24 #size-cells = <0>; 28 i-cache-block-size = <64>; 29 i-cache-sets = <128>; [all …]
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/linux/Documentation/devicetree/bindings/riscv/ |
H A D | cpus.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: RISC-V CPUs 10 - Paul Walmsley <paul.walmsley@sifive.com> 11 - Palmer Dabbelt <palmer@sifive.com> 12 - Conor Dooley <conor@kernel.org> 15 This document uses some terminology common to the RISC-V community 19 mandated by the RISC-V ISA: a PC and some registers. This 27 - $ref: /schemas/cpu.yaml# [all …]
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/linux/arch/riscv/boot/dts/microchip/ |
H A D | mpfs.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 2 /* Copyright (c) 2020-2021 Microchip Technology Inc */ 4 /dts-v1/; 5 #include "dt-bindings/clock/microchip,mpfs-clock.h" 8 #address-cells = <2>; 9 #size-cells = <2>; 14 #address-cells = <1>; 15 #size-cells = <0>; 16 timebase-frequency = <1000000>; 21 i-cache-block-size = <64>; [all …]
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/linux/fs/affs/ |
H A D | file.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * (c) 1996 Hans-Joachim Widmaier - Rewritten 7 * (C) 1993 Ray Burr - Modified for Amiga FFS filesystem. 11 * (C) 1991 Linus Torvalds - minix filesystem 27 inode->i_ino, atomic_read(&AFFS_I(inode)->i_opencnt)); in affs_file_open() 28 atomic_inc(&AFFS_I(inode)->i_opencnt); in affs_file_open() 36 inode->i_ino, atomic_read(&AFFS_I(inode)->i_opencnt)); in affs_file_release() 38 if (atomic_dec_and_test(&AFFS_I(inode)->i_opencnt)) { in affs_file_release() 40 if (inode->i_size != AFFS_I(inode)->mmu_private) in affs_file_release() 52 struct super_block *sb = inode->i_sb; in affs_grow_extcache() [all …]
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/linux/arch/powerpc/kernel/ |
H A D | cacheinfo.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Processor cache information made available to userspace via sysfs; 26 /* per-cpu object for tracking: 27 * - a "cache" kobject for the top-level directory 28 * - a list of "index" objects representing the cpu's local cache hierarchy 31 struct kobject *kobj; /* bare (not embedded) kobject for cache 36 /* "index" object: each cpu's cache directory has an index 37 * subdirectory corresponding to a cache object associated with the 43 struct cache *cache; member 47 * cache type */ [all …]
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/linux/Documentation/admin-guide/device-mapper/ |
H A D | vdo.rst | 1 .. SPDX-License-Identifier: GPL-2.0-only 3 dm-vdo 6 The dm-vdo (virtual data optimizer) device mapper target provides 7 block-level deduplication, compression, and thin provisioning. As a device 20 https://github.com/dm-vdo/vdo/ 25 enter or come up in read-only mode. Because read-only mode is indicative of 26 data-loss, a positive action must be taken to bring vdo out of read-only 28 prepare a read-only vdo to exit read-only mode. After running this tool, 34 inspect a vdo target's on-disk metadata. Fortunately, these tools are 35 rarely needed except by dm-vdo developers. [all …]
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H A D | dm-clone.rst | 1 .. SPDX-License-Identifier: GPL-2.0-only 4 dm-clone 10 dm-clone is a device mapper target which produces a one-to-one copy of an 11 existing, read-only source device into a writable destination device: It 12 presents a virtual block device which makes all data appear immediately, and 15 The main use case of dm-clone is to clone a potentially remote, high-latency, 16 read-only, archival-type block device into a writable, fast, primary-type device 17 for fast, low-latency I/O. The cloned device is visible/mountable immediately 19 background, in parallel with user I/O. 21 For example, one could restore an application backup from a read-only copy, [all …]
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H A D | cache.rst | 2 Cache title 8 dm-cache is a device mapper target written by Joe Thornber, Heinz 11 It aims to improve performance of a block device (eg, a spindle) by 15 This device-mapper solution allows us to insert this caching at 17 a thin-provisioning pool. Caching solutions that are integrated more 20 The target reuses the metadata library used in the thin-provisioning 23 The decision as to what data to migrate and when is left to a plug-in 32 Movement of the primary copy of a logical block from one 39 The origin device always contains a copy of the logical block, which 40 may be out of date or kept in sync with the copy on the cache device [all …]
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/linux/fs/squashfs/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 3 tristate "SquashFS 4.0 - Squashed file system support" 4 depends on BLOCK 7 Read-Only File System). Squashfs is a highly compressed read-only 11 Block sizes greater than 4K are supported up to a maximum of 1 Mbytes 12 (default block size 128K). SquashFS 4.0 supports 64 bit filesystems 16 Squashfs is intended for general read-only filesystem use, for 17 archival use (i.e. in cases where a .tar.gz file may be used), and in 19 and tools are available from github.com/plougher/squashfs-tools. 35 intermediate buffer and then memcopied it into the page cache. [all …]
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H A D | cache.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Squashfs - a compressed read only filesystem for Linux 8 * cache.c 15 * This file implements a generic cache implementation used for both caches, 16 * plus functions layered ontop of the generic cache implementation to 19 * To avoid out of memory and fragmentation issues with vmalloc the cache 22 * It should be noted that the cache is not used for file datablocks, these 23 * are decompressed and cached in the page-cache in the normal way. The 24 * cache is only used to temporarily cache fragment and metadata blocks 25 * which have been read as as a result of a metadata (i.e. inode or [all …]
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/linux/arch/powerpc/boot/dts/ |
H A D | microwatt.dts | 1 /dts-v1/; 2 #include <dt-bindings/gpio/gpio.h> 5 #size-cells = <0x02>; 6 #address-cells = <0x02>; 8 compatible = "microwatt-soc"; 15 reserved-memory { 16 #size-cells = <0x02>; 17 #address-cells = <0x02>; 28 #clock-cells = <0>; 29 compatible = "fixed-clock"; [all …]
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H A D | iss4xx-mpic.dts | 15 /dts-v1/; 20 #address-cells = <2>; 21 #size-cells = <1>; 22 model = "ibm,iss-4xx"; 23 compatible = "ibm,iss-4xx"; 24 dcr-parent = <&{/cpus/cpu@0}>; 31 #address-cells = <1>; 32 #size-cells = <0>; 38 clock-frequency = <100000000>; // 100Mhz :-) 39 timebase-frequency = <100000000>; [all …]
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/linux/drivers/md/ |
H A D | dm-cache-target.c | 1 // SPDX-License-Identifier: GPL-2.0-only 9 #include "dm-bio-prison-v2.h" 10 #include "dm-bio-record.h" 11 #include "dm-cache-metadata.h" 12 #include "dm-io-tracker.h" 13 #include "dm-cache-background-tracker.h" 15 #include <linux/dm-io.h> 16 #include <linux/dm-kcopyd.h> 25 #define DM_MSG_PREFIX "cache" 28 "A percentage of time allocated for copying to and/or from cache"); [all …]
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/linux/arch/riscv/boot/dts/thead/ |
H A D | th1520.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 #include <dt-bindings/interrupt-controller/irq.h> 8 #include <dt-bindings/clock/thead,th1520-clk-ap.h> 9 #include <dt-bindings/power/thead,th1520-power.h> 13 #address-cells = <2>; 14 #size-cells = <2>; 17 #address-cells = <1>; 18 #size-cells = <0>; 19 timebase-frequency = <3000000>; 25 riscv,isa-base = "rv64i"; [all …]
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/linux/Documentation/admin-guide/ |
H A D | bcache.rst | 2 A block layer cache (bcache) 6 nice if you could use them as cache... Hence bcache. 11 This is the git repository of bcache-tools: 12 https://git.kernel.org/pub/scm/linux/kernel/git/colyli/bcache-tools.git/ 17 It's designed around the performance characteristics of SSDs - it only allocates 18 in erase block sized buckets, and it uses a hybrid btree/log to track cached 19 extents (which can be anywhere from a single sector to the bucket size). It's 20 designed to avoid random writes at all costs; it fills up an erase block 25 great lengths to protect your data - it reliably handles unclean shutdown. (It 29 Writeback caching can use most of the cache for buffering writes - writing [all …]
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/linux/fs/btrfs/ |
H A D | zoned.c | 1 // SPDX-License-Identifier: GPL-2.0 12 #include "rcu-string.h" 13 #include "disk-io.h" 14 #include "block-group.h" 15 #include "dev-replace.h" 16 #include "space-info.h" 24 #define WP_MISSING_DEV ((u64)-1) 26 #define WP_CONVENTIONAL ((u64)-2) 31 * - primary superblock: 0B (zone 0) 32 * - first copy: 512G (zone starting at that offset) [all …]
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/linux/arch/riscv/boot/dts/starfive/ |
H A D | jh7110.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 7 /dts-v1/; 8 #include <dt-bindings/clock/starfive,jh7110-crg.h> 9 #include <dt-bindings/power/starfive,jh7110-pmu.h> 10 #include <dt-bindings/reset/starfive,jh7110-crg.h> 11 #include <dt-bindings/thermal/thermal.h> 15 #address-cells = <2>; 16 #size-cells = <2>; 19 #address-cells = <1>; 20 #size-cells = <0>; [all …]
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/linux/drivers/md/bcache/ |
H A D | debug.c | 1 // SPDX-License-Identifier: GPL-2.0 24 #define for_each_written_bset(b, start, i) \ argument 25 for (i = (start); \ 26 (void *) i < (void *) (start) + (KEY_SIZE(&b->key) << 9) &&\ 27 i->seq == (start)->seq; \ 28 i = (void *) i + set_blocks(i, block_bytes(b->c->cache)) * \ 29 block_bytes(b->c->cache)) 33 struct btree *v = b->c->verify_data; in bch_btree_verify() 37 if (!b->c->verify || !b->c->verify_ondisk) in bch_btree_verify() 40 down(&b->io_mutex); in bch_btree_verify() [all …]
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/linux/fs/nilfs2/ |
H A D | btnode.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * NILFS B-tree node cache 5 * Copyright (C) 2005-2008 Nippon Telegraph and Telephone Corporation. 15 #include <linux/backing-dev.h> 25 * nilfs_init_btnc_inode - initialize B-tree node cache inode 28 * nilfs_init_btnc_inode() sets up an inode for B-tree node cache. 34 btnc_inode->i_mode = S_IFREG; in nilfs_init_btnc_inode() 35 ii->i_flags = 0; in nilfs_init_btnc_inode() 36 memset(&ii->i_bmap_data, 0, sizeof(struct nilfs_bmap)); in nilfs_init_btnc_inode() 37 mapping_set_gfp_mask(btnc_inode->i_mapping, GFP_NOFS); in nilfs_init_btnc_inode() [all …]
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/linux/arch/mips/include/asm/octeon/ |
H A D | cvmx-fpa.h | 7 * Copyright (c) 2003-2008 Cavium Networks 14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty 21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 41 #include <asm/octeon/cvmx-address.h> 42 #include <asm/octeon/cvmx-fpa-defs.h> 56 * the (64-bit word) location in scratchpad to write 62 /* the ID of the device on the non-coherent bus */ 84 /* Size of each block */ 85 uint64_t size; member 86 /* The base memory address of whole block */ [all …]
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