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/freebsd/sys/contrib/device-tree/Bindings/mmc/
H A Dmmc-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
25 "#address-cell
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H A Dsdhci-am654.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/mmc/sdhci-am654.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Ulf Hansson <ulf.hansson@linaro.org>
14 - $ref: sdhci-common.yaml#
19 - enum:
20 - ti,am62-sdhci
21 - ti,am64-sdhci-4bit
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/freebsd/sys/contrib/zstd/
H A DCHANGELOG2 perf: Regain Minimal memset()-ing During Reuse of Compression Contexts (@Cyan4973, #2969)
7 perf: rebalanced compression levels, to better match the intended speed/level curve, by @senhuang42
9 perf: slightly faster high speed modes (strategies fast & dfast), by @felixhandte
11 perf: new row64 mode, used notably in level 12, by @senhuang42
12 perf: faster mid-level compression speed in presence of highly repetitive patterns, by @senhuang42
13 perf: minor compression ratio improvements for small data at high levels, by @cyan4973
15 perf: faster compression speed on incompressible data, by @bindhvo
16 perf: on-demand reduced ZSTD_DCtx state size, using build macro ZSTD_DECODER_INTERNAL_BUFFER, at a …
20 build: improved meson unofficial build, by @eli-schwartz
22 …t advanced parameters information when compressing in very verbose mode (``-vv`), by @Svetlitski-FB
[all …]
/freebsd/sys/contrib/device-tree/Bindings/i2c/
H A Di2c-exynos5.txt1 * Samsung's High Speed I2C controller
3 The Samsung's High Speed I2C controller is used to interface with I2C devices
7 - compatible: value should be.
8 -> "samsung,exynos5-hsi2c", (DEPRECATED)
11 -> "samsung,exynos5250-hsi2c", for i2c compatible with HSI2C available
13 -> "samsung,exynos5260-hsi2c", for i2c compatible with HSI2C available
15 -> "samsung,exynos7-hsi2c", for i2c compatible with HSI2C available
18 - reg: physical base address of the controller and length of memory mapped
20 - interrupts: interrupt number to the cpu.
21 - #address-cells: always 1 (for i2c addresses)
[all …]
H A Di2c-exynos5.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-exynos
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/freebsd/sys/contrib/device-tree/include/dt-bindings/pinctrl/
H A Dk210-fpioa.h1 /* SPDX-License-Identifier: GPL-2.0+ */
11 * kendryte-standalone-sdk/lib/drivers/include/fpioa.h
16 #define K210_PCF_JTAG_TMS 2 /* JTAG Test Mode Select */
32 #define K210_PCF_UARTHS_RX 18 /* UART High speed Receiver */
33 #define K210_PCF_UARTHS_TX 19 /* UART High speed Transmitter */
38 #define K210_PCF_GPIOHS0 24 /* GPIO High speed 0 */
39 #define K210_PCF_GPIOHS1 25 /* GPIO High speed 1 */
40 #define K210_PCF_GPIOHS2 26 /* GPIO High speed 2 */
41 #define K210_PCF_GPIOHS3 27 /* GPIO High speed 3 */
42 #define K210_PCF_GPIOHS4 28 /* GPIO High speed 4 */
[all …]
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dnvidia,tegra-pinmux-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra-pinmux-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
14 Please refer to pinctrl-bindings.txt in this directory for details of the
22 pin configuration parameters, such as pull-up, tristate, drive strength,
46 $ref: /schemas/types.yaml#/definitions/string-array
57 description: Pull-down/up setting to apply to the pin.
[all …]
H A Dnvidia,tegra20-pinmux.txt4 - compatible: "nvidia,tegra20-pinmux"
5 - reg: Should contain the register physical address and length for each of
6 the tri-state, mux, pull-up/down, and pad control register sets.
8 Please refer to pinctrl-bindings.txt in this directory for details of the
16 parameters, such as pull-up, tristate, drive strength, etc.
30 Required subnode-properties:
31 - nvidia,pins : An array of strings. Each string contains the name of a pin or
34 Optional subnode-properties:
35 - nvidia,function: A string containing the name of the function to mux to the
38 - nvidia,pull: Integer, representing the pull-down/up to apply to the pin.
[all …]
/freebsd/sys/contrib/device-tree/Bindings/media/i2c/
H A Dadv7343.txt3 The ADV7343 are high speed, digital-to-analog video encoders in a 64-lead LQFP
4 package. Six high speed, 3.3 V, 11-bit video DACs provide support for composite
5 (CVBS), S-Video (Y-C), and component (YPrPb/RGB) analog outputs in standard
6 definition (SD), enhanced definition (ED), or high definition (HD) video
10 - compatible: Must be "adi,adv7343"
13 - adi,power-mode-sleep-mode: on enable the current consumption is reduced to
16 - adi,power-mode-pll-ctrl: PLL and oversampling control. This control allows
19 - ad,adv7343-power-mode-dac: array configuring the power on/off DAC's 1..6,
22 - ad,adv7343-sd-config-dac-out: array configure SD DAC Output's 1 and 2, 0 = OFF
38 adi,power-mode-sleep-mode;
[all …]
/freebsd/sys/dev/sound/isa/
H A Dsb.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
66 #define DSP_CMD_DAC8 0x14 /* single cycle 8-bit dma out */
67 #define DSP_CMD_ADC8 0x24 /* single cycle 8-bit dma in */
70 #define DSP_CMD_DAC8_AUTO 0x1c /* auto 8-bit dma out */
71 #define DSP_CMD_ADC8_AUTO 0x2c /* auto 8-bit dma out */
73 #define DSP_CMD_HSSIZE 0x48 /* high speed dma count */
74 #define DSP_CMD_HSDAC_AUTO 0x90 /* high speed dac, auto */
75 #define DSP_CMD_HSADC_AUTO 0x98 /* high speed adc, auto */
82 #define DSP_CMD_DAC2 0x16 /* 2-bit adpcm dma out (cont) */
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/freebsd/share/man/man4/
H A Dspigen.436 .Bd -ragged -offset indent
45 .Bd -literal -offset indent
54 device is associated with a single chip-select
56 with that chip-select line asserted.
58 SPI data transfers are inherently bi-directional; there are no separate
75 .Bl -tag -width indent
83 .Bd -literal
91 The buffers for the transfer are a previously-mmap'd region.
100 is non-zero, the data appears in the memory region immediately
104 .Bd -literal
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H A Dcc_htcp.43 .\" Copyright (c) 2010-2011 The FreeBSD Foundation
36 .Nd H-TCP Congestion Control Algorithm
38 The H-TCP congestion control algorithm was designed to provide increased
39 throughput in fast and long-distance networks.
41 speed scenarios where NewReno is able to operate adequately.
46 congestion event, and then switches to a high-speed mode based on a quadratic
49 The implementation was done in a clean-room fashion, and is based on the
59 .Bl -tag -width ".Va adaptive_backoff"
62 network queues non-empty during congestion recovery episodes.
66 window increase during congestion avoidance mode invariant with respect to RTT.
[all …]
H A Dmx25l.430 .Nd driver for SpiFlash(tm) compatible non-volatile storage devices
35 .Bd -ragged -offset indent
42 .Bd -literal -offset indent
48 driver provides support for the family of non-volatile storage
72 .Bl -bullet -compact
140 The most commonly-used ones are documented below.
145 .Bl -tag -width indent
147 Must be the string "jedec,spi-nor".
150 .It Va spi-max-frequency
152 Actual bus speed may be lower, depending on the capabilities of the SPI
[all …]
H A Dat45d.430 .Nd driver for DataFlash(tm) non-volatile storage devices
35 .Bd -ragged -offset indent
42 .Bd -literal -offset indent
48 driver provides support for the family of non-volatile storage
75 .Bl -bullet -compact
107 The most commonly-used ones are documented below.
112 .Bl -tag -width indent
117 .It Va spi-max-frequency
119 Actual bus speed may be lower, depending on the capabilities of the SPI
126 .Bl -tag -width indent
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/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dstih410-b2260.dts1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
12 compatible = "st,stih410-b2260", "st,stih410";
15 stdout-path = &uart1;
29 compatible = "gpio-leds";
30 led-user-green-1 {
33 linux,default-trigger = "heartbeat";
34 default-state = "off";
37 led-user-green-2 {
[all …]
/freebsd/sys/dev/ichiic/
H A Dig4_reg.h40 * https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/4th-gen-core-family-mobile-i-o-datasheet.pdf
42 * This is a from-scratch driver under the BSD license using the Intel data
50 * and fast mode plus (1MB/s) is supported. High spee
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/freebsd/sys/contrib/device-tree/Bindings/usb/
H A Dci-hdrc-usb2.txt4 - compatible: should be one of:
5 "fsl,imx23-usb"
6 "fsl,imx27-usb"
7 "fsl,imx28-usb"
8 "fsl,imx6q-usb"
9 "fsl,imx6sl-usb"
10 "fsl,imx6sx-usb"
11 "fsl,imx6ul-usb"
12 "fsl,imx7d-usb"
13 "fsl,imx7ulp-usb"
[all …]
H A Dgeneric.txt4 - maximum-speed: tells USB controllers we want to work up to a certain
5 speed. Valid arguments are "super-speed-plus",
6 "super-speed", "high-speed", "full-speed" and
7 "low-speed". In case this isn't passed via DT, USB
10 - dr_mode: tells Dual-Role USB controllers that we want to work on a
11 particular mode. Valid arguments are "host",
15 - phy_type: tells USB controllers that we want to configure the core to support
16 a UTMI+ PHY with an 8- or 16-bit interface if UTMI+ is
20 - otg-rev: tells usb driver the release number of the OTG and EH supplement
22 in binary-coded decimal (i.e. 2.0 is 0200H). This
[all …]
H A Dsamsung-hsotg.txt1 Samsung High Speed USB OTG controller
2 -----------------------------
5 It gives functionality of OTG-compliant USB 2.0 host and device with
6 support for USB 2.0 high-speed (480Mbps) and full-speed (12 Mbps)
9 Currently only device mode is supported.
12 -----
15 - compatible: "samsung,s3c6400-hsotg" should be used for all currently
17 - interrupts: specifier of interrupt signal of interrupt controller,
19 - clocks: contains an array of clock specifiers:
20 - first entry: OTG clock
[all …]
/freebsd/usr.bin/mkuzip/
H A Dmkuzip.81 .\"-
2 .\" Copyright (c) 2004-2016 Maxim Sobolev <sobomax@FreeBSD.org>
48 class will be able to decompress the resulting image at run-time.
56 .Bl -enum
69 .Bl -tag -width indent
79 It has vastly slower compression speed and moderately slower decompression
80 speed.
85 It also has faster compression and decompression speed than zlib.
86 In the very high compression
88 settings, it does not offer quite as high a compression ratio as
[all …]
/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dnvidia,tegra124-xusb-padctl.txt11 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
12 super-speed USB. Other lanes are for various types of low-speed, full-speed
13 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
14 contains a software-configurable mux that sits between the I/O controller
17 In addition to per-lane configuration, USB 3.0 ports may require additional
18 settings on a per-board basis.
20 Pads will be represented as children of the top-level XUSB pad controller
23 PHY bindings, as described by the phy-bindings.txt file in this directory.
34 --------------------
35 - compatible: Must be:
[all …]
H A Dqcom,usb-snps-femto-v2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,usb-snps-femto-v2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Synopsys Femto High-Speed USB PHY V2
10 - Wesley Cheng <quic_wcheng@quicinc.com>
13 Qualcomm High-Speed USB PHY
18 - enum:
19 - qcom,sc8180x-usb-hs-phy
20 - qcom,usb-snps-femto-v2-phy
[all …]
H A Dnvidia,tegra194-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra194-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
/freebsd/sys/dev/usb/serial/
H A Dumcs.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
50 #define MCS7840_DEV_REG_PINPONGHIGH 0x02 /* High bits of ping-pong
52 #define MCS7840_DEV_REG_PINPONGLOW 0x03 /* Low bits of ping-pong
67 #define MCS7840_DEV_REG_PLL_DIV_M 0x0e /* Pre-diviedr for PLL, R/W */
78 /* DCRx_2-DCRx_4 Registers goes here (see below, they are documented) */
109 #define MCS7840_DEV_REG_BI_FIFO_STAT1 0x32 /* Bulk-In FIFO Stat for Port
112 #define MCS7840_DEV_REG_BO_FIFO_STAT1 0x33 /* Bulk-out FIFO Stat for Port
115 #define MCS7840_DEV_REG_BI_FIFO_STAT2 0x34 /* Bulk-In FIFO Stat for Port
118 #define MCS7840_DEV_REG_BO_FIFO_STAT2 0x35 /* Bulk-out FIFO Stat for Port
[all …]
/freebsd/sys/dev/sk/
H A Dyukonreg.h2 /*-
21 #define YU_GPSR_SPEED 0x8000 /* speed 0 - 10Mbps, 1 - 100Mbps */
22 #define YU_GPSR_DUPLEX 0x4000 /* 0 - half duplex, 1 - full duplex */
23 #define YU_GPSR_FCTL_TX 0x2000 /* Tx flow control, 1 - disabled */
30 #define YU_GPSR_GIG_SPEED 0x0010 /* Gigabit Speed (0 - use speed bit) */
31 #define YU_GPSR_PARTITION 0x0008 /* partition mode */
32 #define YU_GPSR_FCTL_RX 0x0004 /* Rx flow control, 1 - disabled */
33 #define YU_GPSR_PROMS_EN 0x0002 /* promiscuous mode, 1 - enabled */
41 #define YU_GPCR_BURSTEN 0x0400 /* Burst Mode Enable */
44 #define YU_GPCR_GIG 0x0080 /* Gigabit Speed 1000Mbps */
[all …]

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