/linux/drivers/clk/samsung/ |
H A D | clk-s3c64xx.c | 163 DIV(HCLK, "hclk", "hclkx2", CLK_DIV0, 8, 1), 191 DIV(DOUT_FIMC, "dout_fimc", "hclk", CLK_DIV1, 24, 4), 197 GATE_BUS(HCLK_UHOST, "hclk_uhost", "hclk", HCLK_GATE, 29), 198 GATE_BUS(HCLK_SECUR, "hclk_secur", "hclk", HCLK_GATE, 28), 199 GATE_BUS(HCLK_SDMA1, "hclk_sdma1", "hclk", HCLK_GATE, 27), 200 GATE_BUS(HCLK_SDMA0, "hclk_sdma0", "hclk", HCLK_GATE, 26), 201 GATE_ON(HCLK_DDR1, "hclk_ddr1", "hclk", HCLK_GATE, 24), 202 GATE_BUS(HCLK_USB, "hclk_usb", "hclk", HCLK_GATE, 20), 203 GATE_BUS(HCLK_HSMMC2, "hclk_hsmmc2", "hclk", HCLK_GATE, 19), 204 GATE_BUS(HCLK_HSMMC1, "hclk_hsmmc1", "hclk", HCLK_GATE, 18), [all …]
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H A D | clk-s5pv210-audss.c | 70 struct clk *hclk, *pll_ref, *pll_in, *cdclk, *sclk_audio; in s5pv210_audss_clk_probe() local 86 hclk = devm_clk_get(&pdev->dev, "hclk"); in s5pv210_audss_clk_probe() 87 if (IS_ERR(hclk)) { in s5pv210_audss_clk_probe() 88 dev_err(&pdev->dev, "failed to get hclk clock\n"); in s5pv210_audss_clk_probe() 89 return PTR_ERR(hclk); in s5pv210_audss_clk_probe() 140 hclk_p = __clk_get_name(hclk); in s5pv210_audss_clk_probe()
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/linux/drivers/clk/ |
H A D | clk-stm32h7.c | 73 "hclk", "pll1_q", "pll2_r", "per_ck" }; 76 "hclk", "pll1_q", "pll2_r", "per_ck" }; 517 hws[HCLK] = clk_hw_register_divider_table(NULL, "hclk", "d1cpre", in register_core_and_bus_clocks() 527 hws[PCLK3] = clk_hw_register_divider_table(NULL, "pclk3", "hclk", 0, in register_core_and_bus_clocks() 533 hws[PCLK1] = clk_hw_register_divider_table(NULL, "pclk1", "hclk", 0, in register_core_and_bus_clocks() 542 hws[PCLK2] = clk_hw_register_divider_table(NULL, "pclk2", "hclk", 0, in register_core_and_bus_clocks() 551 hws[PCLK4] = clk_hw_register_divider_table(NULL, "pclk4", "hclk", 0, in register_core_and_bus_clocks() 998 PER_CLK(RCC_AHB3ENR, 31, "d1sram1", "hclk"), 999 PER_CLK(RCC_AHB3ENR, 30, "itcm", "hclk"), 1000 PER_CLK(RCC_AHB3ENR, 29, "dtcm2", "hclk"), [all …]
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/linux/drivers/clk/imx/ |
H A D | clk-imx1.c | 22 static const char *clko_sel_clks[] = { "per1", "hclk", "clk48m", "clk16m", 52 clk[IMX1_CLK_HCLK] = imx_clk_divider("hclk", "spll_gate", CCM_CSCR, 10, 4); in mx1_clocks_init_dt() 58 clk[IMX1_CLK_UART3_GATE] = imx_clk_gate("uart3_gate", "hclk", SCM_GCCR, 6); in mx1_clocks_init_dt() 59 clk[IMX1_CLK_SSI2_GATE] = imx_clk_gate("ssi2_gate", "hclk", SCM_GCCR, 5); in mx1_clocks_init_dt() 60 clk[IMX1_CLK_BROM_GATE] = imx_clk_gate("brom_gate", "hclk", SCM_GCCR, 4); in mx1_clocks_init_dt() 61 clk[IMX1_CLK_DMA_GATE] = imx_clk_gate("dma_gate", "hclk", SCM_GCCR, 3); in mx1_clocks_init_dt() 62 clk[IMX1_CLK_CSI_GATE] = imx_clk_gate("csi_gate", "hclk", SCM_GCCR, 2); in mx1_clocks_init_dt() 63 clk[IMX1_CLK_MMA_GATE] = imx_clk_gate("mma_gate", "hclk", SCM_GCCR, 1); in mx1_clocks_init_dt()
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/linux/drivers/net/ethernet/cadence/ |
H A D | macb_pci.c | 68 plat_data.hclk = clk_register_fixed_rate(&pdev->dev, "hclk", NULL, 0, in macb_probe() 70 if (IS_ERR(plat_data.hclk)) { in macb_probe() 71 err = PTR_ERR(plat_data.hclk); in macb_probe() 99 clk_unregister(plat_data.hclk); in macb_probe() 114 clk_unregister(plat_data->hclk); in macb_remove()
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/linux/sound/soc/rockchip/ |
H A D | rockchip_spdif.c | 36 struct clk *hclk; member 72 clk_disable_unprepare(spdif->hclk); in rk_spdif_runtime_suspend() 88 ret = clk_prepare_enable(spdif->hclk); in rk_spdif_runtime_resume() 91 dev_err(spdif->dev, "hclk clock enable failed %d\n", ret); in rk_spdif_runtime_resume() 101 clk_disable_unprepare(spdif->hclk); in rk_spdif_runtime_resume() 313 spdif->hclk = devm_clk_get(&pdev->dev, "hclk"); in rk_spdif_probe() 314 if (IS_ERR(spdif->hclk)) in rk_spdif_probe() 315 return PTR_ERR(spdif->hclk); in rk_spdif_probe() 325 spdif->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "hclk", regs, in rk_spdif_probe()
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H A D | rockchip_pdm.c | 33 struct clk *hclk; member 415 clk_disable_unprepare(pdm->hclk); in rockchip_pdm_runtime_suspend() 431 ret = clk_prepare_enable(pdm->hclk); in rockchip_pdm_runtime_resume() 610 pdm->hclk = devm_clk_get(&pdev->dev, "pdm_hclk"); in rockchip_pdm_probe() 611 if (IS_ERR(pdm->hclk)) in rockchip_pdm_probe() 612 return PTR_ERR(pdm->hclk); in rockchip_pdm_probe() 614 ret = clk_prepare_enable(pdm->hclk); in rockchip_pdm_probe() 654 clk_disable_unprepare(pdm->hclk); in rockchip_pdm_probe() 668 clk_disable_unprepare(pdm->hclk); in rockchip_pdm_remove()
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H A D | rockchip_i2s_tdm.c | 50 struct clk *hclk; member 132 clk_disable_unprepare(i2s_tdm->hclk); in i2s_tdm_runtime_suspend() 142 ret = clk_prepare_enable(i2s_tdm->hclk); in i2s_tdm_runtime_resume() 162 clk_disable_unprepare(i2s_tdm->hclk); in i2s_tdm_runtime_resume() 1272 i2s_tdm->hclk = devm_clk_get(&pdev->dev, "hclk"); in rockchip_i2s_tdm_probe() 1273 if (IS_ERR(i2s_tdm->hclk)) { in rockchip_i2s_tdm_probe() 1274 return dev_err_probe(i2s_tdm->dev, PTR_ERR(i2s_tdm->hclk), in rockchip_i2s_tdm_probe() 1275 "Failed to get clock hclk\n"); in rockchip_i2s_tdm_probe() 1332 ret = clk_prepare_enable(i2s_tdm->hclk); in rockchip_i2s_tdm_probe() 1335 "Failed to enable clock hclk\n"); in rockchip_i2s_tdm_probe() [all …]
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/linux/drivers/char/hw_random/ |
H A D | jh7110-trng.c | 98 struct clk *hclk; member 241 clk_disable_unprepare(trng->hclk); in starfive_trng_cleanup() 306 trng->hclk = devm_clk_get(&pdev->dev, "hclk"); in starfive_trng_probe() 307 if (IS_ERR(trng->hclk)) in starfive_trng_probe() 308 return dev_err_probe(&pdev->dev, PTR_ERR(trng->hclk), in starfive_trng_probe() 321 clk_prepare_enable(trng->hclk); in starfive_trng_probe() 344 clk_disable_unprepare(trng->hclk); in starfive_trng_probe() 356 clk_disable_unprepare(trng->hclk); in starfive_trng_suspend() 366 clk_prepare_enable(trng->hclk); in starfive_trng_resume()
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/linux/arch/arm/boot/dts/st/ |
H A D | ste-nomadik-stn8815.dtsi | 226 /* HCLK divides the PLL1 with 1,2,3 or 4 */ 227 hclk: hclk@0 { label 229 compatible = "st,nomadik-hclk-clock"; 232 /* The PCLK domain uses HCLK right off */ 238 clocks = <&hclk>; 302 clocks = <&hclk>; 308 clocks = <&hclk>; 314 clocks = <&hclk>; 320 clocks = <&hclk>; 326 clocks = <&hclk>; [all …]
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/linux/Documentation/devicetree/bindings/usb/ |
H A D | atmel-usb.txt | 13 "hclk" for the host clock 25 clock-names = "ohci_clk", "hclk", "uhpck"; 67 "hclk" for the AHB clock 78 clock-names = "pclk", "hclk"; 98 "hclk" for the host clock 123 clock-names = "hclk", "pclk";
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/linux/arch/arm/mach-mv78xx0/ |
H A D | common.c | 47 int hclk; in get_hclk() local 50 * HCLK tick rate is configured by DEV_D[7:5] pins. in get_hclk() 54 hclk = 166666667; in get_hclk() 57 hclk = 200000000; in get_hclk() 60 hclk = 266666667; in get_hclk() 63 hclk = 333333333; in get_hclk() 66 hclk = 400000000; in get_hclk() 69 panic("unknown HCLK PLL setting: %.8x\n", in get_hclk() 73 return hclk; in get_hclk() 76 static void get_pclk_l2clk(int hclk, int core_index, int *pclk, int *l2clk) in get_pclk_l2clk() argument [all …]
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/linux/Documentation/devicetree/bindings/clock/ |
H A D | st,nomadik.txt | 34 HCLK nodes: these represent the clock gates on individual 35 lines from the HCLK clock tree and the gate for individual 38 Requires properties for the HCLK nodes: 39 - compatible: must be "st,nomadik-hclk-clock"
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/linux/Documentation/devicetree/bindings/mtd/ |
H A D | fsmc-nand.txt | 19 byte 2 THIZ : number of HCLK clock cycles during which the data bus is 23 byte 3 THOLD : number of HCLK clock cycles to hold the address (and data 26 byte 4 TWAIT : number of HCLK clock cycles to assert the command to the 29 byte 5 TSET : number of HCLK clock cycles to assert the address before the
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/linux/arch/arm/mach-lpc32xx/ |
H A D | pm.c | 21 * The ARM CPU clock (HCLK_PLL), HCLK bus clock, and PCLK bus clocks are 22 * derived from the HCLK PLL. The HCLK and PCLK bus rates are divided from 26 * The ARM CPU clock, HCLK bus clock, and PCLK bus clocks are driven from 57 * HCLK PLL state is restored
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H A D | suspend.S | 89 @ Save HCLK PLL state and disable HCLK PLL 105 @ Restore original HCLK PLL value and wait for PLL lock
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/linux/drivers/gpu/drm/rockchip/ |
H A D | rk3066_hdmi.c | 46 struct clk *hclk; member 761 hdmi->hclk = devm_clk_get(dev, "hclk"); in rk3066_hdmi_bind() 762 if (IS_ERR(hdmi->hclk)) { in rk3066_hdmi_bind() 763 DRM_DEV_ERROR(dev, "unable to get HDMI hclk clock\n"); in rk3066_hdmi_bind() 764 return PTR_ERR(hdmi->hclk); in rk3066_hdmi_bind() 767 ret = clk_prepare_enable(hdmi->hclk); in rk3066_hdmi_bind() 769 DRM_DEV_ERROR(dev, "cannot enable HDMI hclk clock: %d\n", ret); in rk3066_hdmi_bind() 781 /* internal hclk = hdmi_hclk / 25 */ in rk3066_hdmi_bind() 821 clk_disable_unprepare(hdmi->hclk); in rk3066_hdmi_bind() 835 clk_disable_unprepare(hdmi->hclk); in rk3066_hdmi_unbind()
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/linux/drivers/spi/ |
H A D | spi-rockchip-sfc.c | 177 struct clk *hclk; member 646 sfc->hclk = devm_clk_get(&pdev->dev, "hclk_sfc"); in rockchip_sfc_probe() 647 if (IS_ERR(sfc->hclk)) in rockchip_sfc_probe() 648 return dev_err_probe(&pdev->dev, PTR_ERR(sfc->hclk), in rockchip_sfc_probe() 662 ret = clk_prepare_enable(sfc->hclk); in rockchip_sfc_probe() 730 clk_disable_unprepare(sfc->hclk); in rockchip_sfc_probe() 744 clk_disable_unprepare(sfc->hclk); in rockchip_sfc_remove() 753 clk_disable_unprepare(sfc->hclk); in rockchip_sfc_runtime_suspend() 763 ret = clk_prepare_enable(sfc->hclk); in rockchip_sfc_runtime_resume() 769 clk_disable_unprepare(sfc->hclk); in rockchip_sfc_runtime_resume()
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/linux/Documentation/devicetree/bindings/net/ |
H A D | cdns,macb.yaml | 85 - enum: [ ether_clk, hclk, pclk ] 86 - enum: [ hclk, pclk ] 188 clock-names = "pclk", "hclk", "tx_clk"; 216 clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
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/linux/drivers/accel/amdxdna/ |
H A D | aie2_smu.c | 71 ndev->priv->dpm_clk_tbl[dpm_level].hclk, &freq); in npu1_set_dpm() 74 ndev->priv->dpm_clk_tbl[dpm_level].hclk, ret); in npu1_set_dpm() 104 ndev->hclk_freq = ndev->priv->dpm_clk_tbl[dpm_level].hclk; in npu4_set_dpm()
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/linux/Documentation/devicetree/bindings/media/ |
H A D | rockchip-isp1.yaml | 42 - description: ISP AHB clock (for imx8mp, hclk) 52 - const: hclk 191 clock-names = "isp", "aclk", "hclk"; 279 clock-names = "isp", "aclk", "hclk", "pclk";
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/linux/drivers/slimbus/ |
H A D | qcom-ctrl.c | 117 struct clk *hclk; member 282 clk_prepare_enable(ctrl->hclk); in qcom_clk_pause_wakeup() 498 ctrl->hclk = devm_clk_get(&pdev->dev, "iface"); in qcom_slim_probe() 499 if (IS_ERR(ctrl->hclk)) in qcom_slim_probe() 500 return PTR_ERR(ctrl->hclk); in qcom_slim_probe() 562 ret = clk_prepare_enable(ctrl->hclk); in qcom_slim_probe() 623 clk_disable_unprepare(ctrl->hclk); in qcom_slim_probe() 637 clk_disable_unprepare(ctrl->hclk); in qcom_slim_remove() 657 clk_disable_unprepare(ctrl->hclk); in qcom_slim_runtime_suspend()
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/linux/Documentation/devicetree/bindings/rng/ |
H A D | starfive,jh7110-trng.yaml | 30 - const: hclk 55 clock-names = "hclk", "ahb";
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/linux/Documentation/devicetree/bindings/net/can/ |
H A D | bosch,m_can.yaml | 50 - const: hclk 147 clock-names = "hclk", "cclk"; 164 clock-names = "hclk", "cclk";
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/linux/Documentation/devicetree/bindings/rtc/ |
H A D | renesas,rzn1-rtc.yaml | 39 const: hclk 67 clock-names = "hclk";
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