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/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/
H A Dsynopsys.txt3 The ZynqMP DDR ECC controller has an optional ECC support in 64-bit and 32-bit
6 The Zynq DDR ECC controller has an optional ECC support in half-bus width
7 (16-bit) configuration.
9 These both ECC controllers correct single bit ECC errors and detect double bit
10 ECC errors.
13 - compatible: One of:
14 - 'xlnx,zynq-ddrc-a05' : Zynq DDR ECC controller
15 - 'xlnx,zynqmp-ddrc-2.40a' : ZynqMP DDR ECC controller
16 - reg: Should contain DDR controller registers location and length.
18 Required properties for "xlnx,zynqmp-ddrc-2.40a":
[all …]
H A Dsynopsys,ddrc-ecc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/synopsys,ddrc-ecc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Manish Narani <manish.narani@xilinx.com>
12 - Michal Simek <michal.simek@xilinx.com>
15 The ZynqMP DDR ECC controller has an optional ECC support in 64-bit and
16 32-bit bus width configurations.
18 The Zynq DDR ECC controller has an optional ECC support in half-bus width
[all …]
H A Dsnps,dw-umctl2-ddrc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/snps,dw-umctl2-ddrc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare Universal Multi-Protocol Memory Controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Michal Simek <michal.simek@amd.com>
16 be equipped with SEC/DEC ECC feature if DRAM data bus width is either
17 16-bits or 32-bits or 64-bits wide.
20 controller. It has an optional SEC/DEC ECC support in 64- and 32-bits
[all …]
H A Dxlnx,zynq-ddrc-a05.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/memory-controller
[all...]
/freebsd/sys/contrib/device-tree/Bindings/mtd/
H A Datmel-nand.txt4 Documentation/devicetree/bindings/memory-controllers/atmel,ebi.txt).
6 The NAND controller might be connected to an ECC engine.
11 - compatible: should be one of the following
12 "atmel,at91rm9200-nand-controller"
13 "atmel,at91sam9260-nand-controller"
14 "atmel,at91sam9261-nand-controller"
15 "atmel,at91sam9g45-nand-controller"
16 "atmel,sama5d3-nand-controller"
17 "microchip,sam9x60-nand-controller"
18 - ranges: empty ranges property to forward EBI ranges definitions.
[all …]
H A Dbrcm,brcmnand.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Brian Norris <computersforpeace@gmail.com>
11 - Kamal Dasu <kdasu.kdev@gmail.com>
12 - William Zhang <william.zhang@broadcom.com>
15 The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND
16 flash chips. It has a memory-mapped register interface for both control
27 -- Additional SoC-specific NAND controller properties --
35 interesting ways, sometimes with registers that lump multiple NAND-related
[all …]
H A Dbrcm,brcmnand.txt3 The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND
4 flash chips. It has a memory-mapped register interface for both control
15 - compatible : May contain an SoC-specific compatibility string (see below)
16 to account for any SoC-specific hardware bits that may be
21 string, like "brcm,brcmnand-v7.0"
23 brcm,brcmnand-v2.1
24 brcm,brcmnand-v2.2
25 brcm,brcmnand-v4.0
26 brcm,brcmnand-v5.0
27 brcm,brcmnand-v6.0
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H A Draw-nand-chip.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/raw-nand-chip.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Miquel Raynal <miquel.raynal@bootlin.com>
13 - $ref: nand-chip.yaml#
16 The ECC strength and ECC step size properties define the user
18 they request the ECC engine to correct {strength} bit errors per
21 The interpretation of these parameters is implementation-defined, so
28 pattern: "^nand@[a-f0-9]$"
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H A Dvf610-nfc.txt7 - compatible: Should be set to "fsl,vf610-nfc".
8 - reg: address range of the NFC.
9 - interrupts: interrupt of the NFC.
10 - #address-cells: shall be set to 1. Encode the nand CS.
11 - #size-cells : shall be set to 0.
12 - assigned-clocks: main clock from the SoC, for Vybrid <&clks VF610_CLK_NFC>;
13 - assigned-clock-rates: The NAND bus timing is derived from this clock
17 there might be restrictions on maximum rates when using hardware ECC.
19 - #address-cells, #size-cells : Must be present if the device has sub-nodes
27 - compatible: Should be set to "fsl,vf610-nfc-cs".
[all …]
/freebsd/sys/contrib/device-tree/Bindings/net/can/
H A Dxilinx,can.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
16 - xlnx,zynq-can-1.0
17 - xlnx,axi-can-1.00.a
18 - xlnx,canfd-1.0
19 - xlnx,canfd-2.0
31 clock-names:
34 power-domains:
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/freebsd/crypto/openssl/doc/man3/
H A DSSL_CTX_set_security_level.pod5 …_security_ex_data, SSL_CTX_get0_security_ex_data, SSL_get0_security_ex_data - SSL/TLS security fra…
77 DSA and DH keys shorter than 1024 bits and ECC keys shorter than 160 bits
87 shorter than 2048 bits and ECC keys shorter than 224 bits are prohibited.
94 shorter than 3072 bits and ECC keys shorter than 256 bits are prohibited.
102 DH keys shorter than 7680 bits and ECC keys shorter than 384 bits are
109 shorter than 15360 bits and ECC keys shorter than 512 bits are prohibited.
120 setting B<-DOPENSSL_TLS_SECURITY_LEVEL=level>. If not set then 1 is used.
132 cipher suite encryption algorithms, supported ECC curves, supported
135 settings an application has set: so if the cipher suite is set to B<ALL>
138 See SP800-57 for how the security limits are related to individual
[all …]
/freebsd/sys/contrib/device-tree/src/arm/marvell/
H A Darmada-xp-db-xc3-24g4xg.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for DB-XC3-24G4XG board
7 * Based on armada-xp-db.dts
9 * Note: this Device Tree assumes that the bootloader has remapped the
12 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
19 /dts-v1/;
20 #include "armada-xp-98dx3336.dtsi"
23 model = "DB-XC3-24G4XG";
24 compatible = "marvell,db-xc3-24g4xg", "marvell,armadaxp-98dx3336", "marvell,armada-370-xp";
37 arm,parity-enable;
[all …]
H A Darmada-xp-db-dxbc2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for DB-DXBC2 board
7 * Based on armada-xp-db.dts
9 * Note: this Device Tree assumes that the bootloader has remapped the
12 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
19 /dts-v1/;
20 #include "armada-xp-98dx4251.dtsi"
24 compatible = "marvell,db-dxbc2", "marvell,armadaxp-98dx4251", "marvell,armada-370-xp";
43 devbus,bus-width = <16>;
44 devbus,turn-off-ps = <60000>;
[all …]
/freebsd/sys/contrib/dev/iwlwifi/
H A Diwl-eeprom-read.c
/freebsd/sys/contrib/device-tree/Bindings/scsi/
H A Dhisilicon-sas.txt6 - compatible : value should be as follows:
7 (a) "hisilicon,hip05-sas-v1" for v1 hw in hip05 chipset
8 (b) "hisilicon,hip06-sas-v2" for v2 hw in hip06 chipset
9 (c) "hisilicon,hip07-sas-v2" for v2 hw in hip07 chipset
10 - sas-addr : array of 8 bytes for host SAS address
11 - reg : Contains two regions. The first is the address and length of the SAS
15 - hisilicon,sas-syscon: phandle of syscon used for sas control
16 - ctrl-reset-reg : offset to controller reset register in ctrl reg
17 - ctrl-reset-sts-reg : offset to controller reset status register in ctrl reg
18 - ctrl-clock-ena-reg : offset to controller clock enable register in ctrl reg
[all …]
/freebsd/secure/lib/libcrypto/man/man3/
H A DSSL_CTX_set_security_level.318 .\" Set up some character translations and predefined strings. \*(-- will
24 .tr \(*W-
27 . ds -- \(*W-
29 . if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
30 . if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
37 . ds -- \|\(em\|
71 .\" Fear. Run. Save yourself. No user-serviceable parts.
81 . ds #H ((1u-(\\\\n(.fu%2u))*.13m)
97 . ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
98 . ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
[all …]
/freebsd/crypto/openssl/crypto/ec/
H A Dec_key.c2 * Copyright 2002-2022 The OpenSSL Project Authors. All Rights Reserved.
50 ret->group = EC_GROUP_new_by_curve_name_ex(ctx, propq, nid); in EC_KEY_new_by_curve_name_ex()
51 if (ret->group == NULL) { in EC_KEY_new_by_curve_name_ex()
55 if (ret->meth->set_group != NULL in EC_KEY_new_by_curve_name_ex()
56 && ret->meth->set_group(ret, ret->group) == 0) { in EC_KEY_new_by_curve_name_ex()
77 CRYPTO_DOWN_REF(&r->references, &i, r->lock); in EC_KEY_free()
83 if (r->meth != NULL && r->meth->finish != NULL) in EC_KEY_free()
84 r->meth->finish(r); in EC_KEY_free()
87 ENGINE_finish(r->engine); in EC_KEY_free()
90 if (r->group && r->group->meth->keyfinish) in EC_KEY_free()
[all …]
/freebsd/crypto/libecc/scripts/
H A Dcrossbuild.sh2 # * Copyright (C) 2017 - This file is part of libecc project
7 # * Jean-Pierre FLORI <jean-pierre.flori@ssi.gouv.fr>
21 if [ -e $1 ]
58 mkdir -p $ROOT_DIR
60 cp -r $SRC_DIR/src/ $ROOT_DIR/
61 cp -r $SRC_DIR/include/ $ROOT_DIR/
64 mkdir -p $ROOT_DIR/build
65 mkdir -p $CROSSBUILD_OUTPUT/compilation_log
66 mkdir -p $CROSSBUILD_OUTPUT/error_log
69 …r 64 bit triplets, multiarch/crossbuild docker's gcc 4.9 has a bug handling loop unrolling in -O3 …
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/freebsd/crypto/openssl/crypto/x509/
H A Dx509_txt.c2 * Copyright 1995-2023 The OpenSSL Project Authors. All Rights Reserved.
45 return "certificate has expired"; in X509_verify_cert_error_string()
49 return "CRL has expired"; in X509_verify_cert_error_string()
61 return "self-signed certificate"; in X509_verify_cert_error_string()
63 return "self-signed certificate in certificate chain"; in X509_verify_cert_error_string()
99 return "invalid non-CA certificate (has CA markings)"; in X509_verify_cert_error_string()
142 return "Suite B: invalid ECC curve"; in X509_verify_cert_error_string()
148 return "Suite B: cannot sign P-384 with P-256"; in X509_verify_cert_error_string()
186 return "Path length invalid for non-CA cert"; in X509_verify_cert_error_string()
190 return "Key usage keyCertSign invalid for non-CA cert"; in X509_verify_cert_error_string()
[all …]
/freebsd/crypto/openssl/doc/man7/
H A DEVP_PKEY-EC.pod5 EVP_PKEY-EC,
6 EVP_KEYMGMT-EC
7 - EVP_PKEY EC keytype and algorithm support
17 used that specify "field-type", "p", "a", "b", "generator" and "order".
23 built-in EC algorithm:
31 =item "field-type" (B<OSSL_PKEY_PARAM_EC_FIELD_TYPE>) <UTF8 string>
33 The value should be either "prime-field" or "characteristic-two-field",
39 represents the irreducible polynomial - each bit represents a term in the
67 I<order> - 1.
71 =item "decoded-from-explicit" (B<OSSL_PKEY_PARAM_EC_DECODED_FROM_EXPLICIT_PARAMS>) <integer>
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/broadcom/bcm4908/
H A Dbcm4908-asus-gt-ac5300.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
9 compatible = "asus,gt-ac5300", "brcm,bcm4908";
10 model = "Asus GT-AC5300";
17 gpio-keys-polled {
18 compatible = "gpio-keys-polled";
19 poll-interval = <100>;
21 key-wifi {
27 key-wps {
[all …]
/freebsd/share/doc/papers/sysperf/
H A D5.t51 only by hosts at that site. To off-site hosts machines on a site's
58 The broadcast address may be set at boot time on a per-interface basis.
62 The organization of network interfaces has been
88 The \fIsetsockopt\fP system call has been extended to allow such requests.
90 are now interfaced to the protocol level allowing protocol-specific
96 the previous hard limit of 30 open files per process has been relaxed.
98 32-bit words, removing the dependency on file descriptors from
101 The default per-process descriptor limit was raised from 20 to 64,
109 The limit on physical memory has been changed from 8 megabyte to 64 megabyte,
110 and the limit of 15 mounted file systems has been changed to 255.
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/xilinx/
H A Dzynqmp-zc1751-xm016-dc2.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP zc1751-xm016-dc2
5 * (C) Copyright 2015 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
11 /dts-v1/;
14 #include "zynqmp-clk-ccf.dtsi"
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
19 model = "ZynqMP zc1751-xm016-dc2 RevA";
20 compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
[all …]
/freebsd/crypto/libecc/
H A DREADME.md11 Copyright (C) 2017-2023
20 * Jean-Pierre FLORI (<mailto:jpflori@gmail.com>)
29 cryptography (ECC). The API supports signature algorithms specified
30 in the [ISO 14888-3:2018](https://www.iso.org/standard/76382.html)
34 * Core ISO 14888-3:2018 algorithms: ECDSA, ECKCDSA, ECGDSA, ECRDSA, EC{,O}SDSA, ECFSDSA, SM2.
36 …* BIGN (as standardized in [STB 34.101.45-2013](https://github.com/bcrypto/bign)). We allow a more…
38 … "Schnorr" Bitcoin proposal, as specified in [bip-0340](https://github.com/bitcoin/bips/blob/maste…
39 …tandard as we allow any curve and any hash function (the standard mandates SECP256K1 with SHA-256).
42 …ECC-CDH (Elliptic Curve Cryptography Cofactor Diffie-Hellman) as described in [section 5.7.1.2 of …
45 …STR3410-2001-CryptoPro{A,B,C,XchA,XchB,Test}-ParamSet, GOSTR3410-2012-{256,512}-ParamSet{A,B,C}, G…
[all …]
/freebsd/secure/lib/libcrypto/man/man7/
H A DEVP_PKEY-EC.718 .\" Set up some character translations and predefined strings. \*(-- will
24 .tr \(*W-
27 . ds -- \(*W-
29 . if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
30 . if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
37 . ds -- \|\(em\|
71 .\" Fear. Run. Save yourself. No user-serviceable parts.
81 . ds #H ((1u-(\\\\n(.fu%2u))*.13m)
97 . ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
98 . ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
[all …]

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