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/linux/drivers/irqchip/
H A Dirq-riscv-aplic-msi.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/irqchip/riscv-aplic.h>
13 #include <linux/irqchip/riscv-imsic.h>
21 #include "irq-riscv-aplic-main.h"
43 * The section "4.9.2 Special consideration for level-sensitive interrupt in aplic_msi_irq_retrigger_level()
44 * sources" of the RISC-V AIA specification says: in aplic_msi_irq_retrigger_level()
52 writel(d->hwirq, priv->regs + APLIC_SETIPNUM_LE); in aplic_msi_irq_retrigger_level()
60 * EOI handling is required only for level-triggered interrupts in aplic_msi_irq_eoi()
73 * Updating sourcecfg register for level-triggered interrupts in aplic_msi_irq_set_type()
84 struct aplic_msicfg *mc = &priv->msicfg; in aplic_msi_write_msg()
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H A Dirq-riscv-intc.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2017-2018 SiFive
8 #define pr_fmt(fmt) "riscv-intc: " fmt
11 #include <linux/bits.h>
31 unsigned long cause = regs->cause & ~CAUSE_IRQ_FLAG; in riscv_intc_irq()
46 * On RISC-V systems local interrupts are masked or unmasked by writing
48 * on the local hart, these functions can only be called on the hart that
54 if (IS_ENABLED(CONFIG_32BIT) && d->hwirq >= BITS_PER_LONG) in riscv_intc_irq_mask()
55 csr_clear(CSR_IEH, BIT(d->hwirq - BITS_PER_LONG)); in riscv_intc_irq_mask()
57 csr_clear(CSR_IE, BIT(d->hwirq)); in riscv_intc_irq_mask()
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H A Dirq-riscv-imsic-state.c1 // SPDX-License-Identifier: GPL-2.0
7 #define pr_fmt(fmt) "riscv-imsic: " fmt
22 #include "irq-riscv-imsic-state.h"
63 return imsic ? &imsic->global : NULL; in imsic_get_global_config()
74 imask = BIT(id & (__riscv_xlen - 1)); in __imsic_eix_read_clear()
102 * are XLEN-wide and we must not touch IDs which in __imsic_eix_update()
106 for (i = id & (__riscv_xlen - 1); id < last_id && i < __riscv_xlen; i++) { in __imsic_eix_update()
134 lockdep_assert_held(&lpriv->lock); in __imsic_local_sync()
136 for_each_set_bit(i, lpriv->dirty_bitmap, imsic->global.nr_ids + 1) { in __imsic_local_sync()
139 vec = &lpriv->vectors[i]; in __imsic_local_sync()
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H A Dirq-sifive-plic.c1 // SPDX-License-Identifier: GPL-2.0
6 #define pr_fmt(fmt) "riscv-plic: " fmt
25 * This driver implements a version of the RISC-V PLIC with the actual layout
28 * https://static.dev.sifive.com/U54-MC-RVCoreIP.pdf
30 * The largest number supported by devices marked as 'sifive,plic-1.0.0', is
31 * 1024, of which device 0 is defined as non-existent by the RISC-V Privileged
46 * Each hart context has a vector of interrupt enable bits associated with it.
53 * Each hart context has a set of control registers associated with it. Right
54 * now there's only two: a source priority threshold over which the hart will
112 raw_spin_lock_irqsave(&handler->enable_lock, flags); in plic_toggle()
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H A Dirq-riscv-imsic-platform.c1 // SPDX-License-Identifier: GPL-2.0
7 #define pr_fmt(fmt) "riscv-imsic: " fmt
23 #include <linux/irqchip/irq-msi-lib.h>
24 #include "irq-riscv-imsic-state.h"
32 global = &imsic->global; in imsic_cpu_page_phys()
33 local = per_cpu_ptr(global->local, cpu); in imsic_cpu_page_phys()
35 if (BIT(global->guest_index_bits) <= guest_index) in imsic_cpu_page_phys()
39 *out_msi_pa = local->msi_pa + (guest_index * IMSIC_MMIO_PAGE_SZ); in imsic_cpu_page_phys()
60 return -ENOENT; in imsic_irq_retrigger()
62 local = per_cpu_ptr(imsic->global.local, vec->cpu); in imsic_irq_retrigger()
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/linux/include/linux/irqchip/
H A Driscv-imsic.h1 /* SPDX-License-Identifier: GPL-2.0-only */
50 * XLEN-1 12 0
52 * -------------------------------------------------------------
53 * |xxxxxx|Group Index|xxxxxxxxxxx|HART Index|Guest Index| 0 |
54 * -------------------------------------------------------------
57 /* Bits representing Guest index, HART index, and Group index */
72 /* Per-CPU IMSIC addresses */
/linux/arch/riscv/include/asm/
H A Dkvm_aia.h1 /* SPDX-License-Identifier: GPL-2.0-only */
18 /* In-kernel irqchip created */
21 /* In-kernel irqchip initialized */
33 /* Number of group bits in IMSIC address */
36 /* Position of group bits in IMSIC address */
39 /* Number of hart bits in IMSIC address */
42 /* Number of guest bits in IMSIC address */
69 /* HART index of IMSIC extacted from guest physical address */
76 #define KVM_RISCV_AIA_UNDEF_ADDR (-1)
78 #define kvm_riscv_aia_initialized(k) ((k)->arch.aia.initialized)
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/linux/arch/riscv/kvm/
H A Daia_device.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/bits.h>
11 #include <linux/irqchip/riscv-imsic.h>
19 struct kvm *kvm = dev->kvm; in aia_create()
23 return -EEXIST; in aia_create()
25 ret = -EBUSY; in aia_create()
30 if (vcpu->arch.ran_atleast_once) in aia_create()
35 kvm->arch.aia.in_kernel = true; in aia_create()
50 struct kvm_aia *aia = &kvm->arch.aia; in aia_config()
54 return -EBUSY; in aia_config()
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/linux/drivers/iio/addac/
H A Dad74413r.c1 // SPDX-License-Identifier: GPL-2.0
29 #include <dt-bindings/iio/addac/adi,ad74413r.h>
67 * Synchronize consecutive operations when doing a one-shot
177 ad74413r_format_reg_write(reg, val, st->reg_tx_buf); in ad74413r_reg_write()
179 return spi_write(st->spi, st->reg_tx_buf, AD74413R_FRAME_SIZE); in ad74413r_reg_write()
187 dev_err(st->dev, "Bad CRC %02x for %02x%02x%02x\n", in ad74413r_crc_check()
189 return -EINVAL; in ad74413r_crc_check()
200 .tx_buf = st->reg_tx_buf, in ad74413r_reg_read()
205 .rx_buf = st->reg_rx_buf, in ad74413r_reg_read()
212 st->reg_tx_buf); in ad74413r_reg_read()
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/linux/drivers/platform/x86/
H A Dwmi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * ACPI-WMI mapping driver
5 * Copyright (C) 2007-2008 Carlos Corbacho <carlos@strangeworlds.co.uk>
9 * Copyright (c) 2001-2007 Anton Altaparmakov
12 * WMI bus infrastructure by Andrew Lutomirski and Darren Hart:
20 #include <linux/bits.h>
37 MODULE_DESCRIPTION("ACPI-WMI Mapping Driver");
117 id = wdriver->id_table; in find_guid_context()
121 while (*id->guid_string) { in find_guid_context()
122 if (guid_parse_and_compare(id->guid_string, &wblock->gblock.guid)) in find_guid_context()
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/linux/Documentation/admin-guide/media/
H A Dbttv.rst1 .. SPDX-License-Identifier: GPL-2.0
8 ----------------------
12 ./scripts/config -e PCI
13 ./scripts/config -m I2C
14 ./scripts/config -m INPUT
15 ./scripts/config -m MEDIA_SUPPORT
16 ./scripts/config -e MEDIA_PCI_SUPPORT
17 ./scripts/config -e MEDIA_ANALOG_TV_SUPPORT
18 ./scripts/config -e MEDIA_DIGITAL_TV_SUPPORT
19 ./scripts/config -e MEDIA_RADIO_SUPPORT
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/linux/kernel/futex/
H A Dcore.c1 // SPDX-License-Identifier: GPL-2.0-or-later
16 * PI-futex support started by Ingo Molnar and Thomas Gleixner
23 * Requeue-PI support by Darren Hart <dvhltc@us.ibm.com>
29 * Kirkwood for proof-of-concept implementation.
42 #include <linux/fault-inject.h>
115 debugfs_create_bool("ignore-private", mode, dir, in fail_futex_debugfs()
140 * futexes -- see comment with union futex_key. in futex_key_is_private()
142 return !(key->both.offset & (FUT_OFF_INODE | FUT_OFF_MMSHARED)); in futex_key_is_private()
153 wake_up_var(fph->mm); in futex_private_hash_put()
157 * futex_hash_get - Get an additional reference for the local hash.
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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