gpio0 (full) in projects: linux - OpenGrok search results

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×illumos-gate

Searched full:gpio0 (Results 1 – 12 of 12) sorted by relevance

/illumos-gate/usr/src/uts/sun4u/io/i2c/clients/
H A D	adm1026.c	`57 * GPIO_GET_OUTPUT -- Read GPIO0-GPIO15 bits in Status Register 5 & 6 58 * GPIO_SET_OUTPUT -- Modify GPIO0-GPIO15 bits in Status Register 5 & 6 59 * GPIO_GET_POLARITY -- Read GPIO0-GPIO15 Polarity bits in GPIO Config 1-4 60 * GPIO_SET_POLARITY -- Modify GPIO0-GPIO15 Polarity bits in GPIO Config 1-4 61 * GPIO_GET_CONFIG -- Read GPIO0-GPIO15 Direction bits in GPIO Config 1-4 62 * GPIO_SET_CONFIG -- Modify GPIO0-GPIO15 Direction bits in GPIO Config 1-4 72 * access GPIO15 and GPIO0.`
/illumos-gate/usr/src/uts/common/io/audio/drv/audiocmihd/
H A D	audiocmihd.c	`1013 /* GPIO0 = 0x001controls output */ in cmediahd_hwinit()`
/illumos-gate/usr/src/uts/common/io/qede/579xx/drivers/ecore/
H A D	ecore_int.c	`501 {"GPIO0 function%d", (32 << ATTENTION_LENGTH_SHIFT), OSAL_NULL, MAX_BLOCK_ID},`
/illumos-gate/usr/src/uts/common/io/qede/579xx/hsi/mcp/
H A D	nvm_meta.txt	`69 array set gpio_control {0 {NA} 1 {GPIO0} 2 {GPIO1} 3 {GPIO2} 4 {GPIO3} 5 {GPIO4} 6 {GPIO5} 7 {GPIO6…`
/illumos-gate/usr/src/uts/common/io/bnxe/577xx/common/
H A D	bnxe_clc.c	`9434 /* Set 8727 GPIOs to input to allow reading from the 8727 GPIO0 in elink_8727_specific_func() 10470 /* Check over-current using 8727 GPIO0 input*/ in elink_8727_read_status()`
/illumos-gate/usr/src/uts/common/io/qede/579xx/hsi/hw/
H A D	reg_addr_ah_compile15.h	30002 …20 First 32b for enabling the output for output0. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 30011 …20 First 32b for enabling the output for output1. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 30020 …20 First 32b for enabling the output for output2. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 30029 …20 First 32b for enabling the output for output3. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 30038 …20 First 32b for enabling the output for output4. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 30047 …20 First 32b for enabling the output for output5. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 30056 …20 First 32b for enabling the output for output6. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 30065 …20 First 32b for enabling the output for output7. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 30074 …2b for enabling the output for close the gate nig. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 30083 …2b for enabling the output for close the gate pxp. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… [all …]
H A D	reg_addr_e5.h	33478 … // First 32b for enabling the output for output0. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 33487 … // First 32b for enabling the output for output1. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 33496 … // First 32b for enabling the output for output2. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 33505 … // First 32b for enabling the output for output3. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 33514 … // First 32b for enabling the output for output4. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 33523 … // First 32b for enabling the output for output5. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 33532 … // First 32b for enabling the output for output6. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 33541 … // First 32b for enabling the output for output7. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 33550 …2b for enabling the output for close the gate nig. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 33559 …2b for enabling the output for close the gate pxp. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… [all …]
H A D	reg_addr_k2.h	33478 … // First 32b for enabling the output for output0. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 33487 … // First 32b for enabling the output for output1. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 33496 … // First 32b for enabling the output for output2. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 33505 … // First 32b for enabling the output for output3. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 33514 … // First 32b for enabling the output for output4. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 33523 … // First 32b for enabling the output for output5. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 33532 … // First 32b for enabling the output for output6. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 33541 … // First 32b for enabling the output for output7. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 33550 …2b for enabling the output for close the gate nig. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 33559 …2b for enabling the output for close the gate pxp. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… [all …]
H A D	reg_addr_bb.h	33478 … // First 32b for enabling the output for output0. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 33487 … // First 32b for enabling the output for output1. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 33496 … // First 32b for enabling the output for output2. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 33505 … // First 32b for enabling the output for output3. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 33514 … // First 32b for enabling the output for output4. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 33523 … // First 32b for enabling the output for output5. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 33532 … // First 32b for enabling the output for output6. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 33541 … // First 32b for enabling the output for output7. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 33550 …2b for enabling the output for close the gate nig. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 33559 …2b for enabling the output for close the gate pxp. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… [all …]
H A D	reg_addr.h	33510 … // First 32b for enabling the output for output0. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 33519 … // First 32b for enabling the output for output1. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 33528 … // First 32b for enabling the output for output2. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 33537 … // First 32b for enabling the output for output3. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 33546 … // First 32b for enabling the output for output4. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 33555 … // First 32b for enabling the output for output5. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 33564 … // First 32b for enabling the output for output6. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 33573 … // First 32b for enabling the output for output7. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 33582 …2b for enabling the output for close the gate nig. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… 33591 …2b for enabling the output for close the gate pxp. Mapped as follows: [0] GPIO0; [1] GPIO1; [2] GP… [all …]
/illumos-gate/usr/src/cmd/cxgbetool/
H A D	reg_defs_t6.c	`20214 { "GPIO0", 0, 1 }, 20243 { "GPIO0", 0, 1 },`
H A D	reg_defs_t5.c	`20563 { "GPIO0", 0, 1 }, 20592 { "GPIO0", 0, 1 },`