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/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dmsm8996-pins.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
12 function = "gpio";
15 config {
17 drive-strength = <2>; /* 2 mA */
18 bias-pull-down; /* pull down */
19 input-enable;
28 function = "gpio";
30 config {
32 drive-strength = <16>;
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/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dste-hrefv60plus.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2012 ST-Ericsson AB
6 #include "ste-href.dtsi"
9 model = "ST-Ericsson HREF (v60+) platform with Device Tree";
10 compatible = "st-ericsson,hrefv60+", "st-ericsso
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H A Dste-ux500-samsung-gavini.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Devicetree for the Samsung Galaxy Beam GT-I8530 also known as Gavini.
6 /dts-v1/;
7 #include "ste-db8500.dtsi"
8 #include "ste-ab8500.dtsi"
9 #include "ste-dbx5x0-pinctr
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H A Dste-ux500-samsung-janice.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Devicetree for the Samsung Galaxy S Advance GT-I9070 also known as Janice.
6 /dts-v1/;
7 #include "ste-db8500.dtsi"
8 #include "ste-ab8500.dtsi"
9 #include "ste-dbx5x0-pinctr
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H A Dste-ux500-samsung-codina.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Devicetree for the Samsung Galaxy Ace 2 GT-I8160 also known as Codina.
11 * The Samsung tree further talks about GT-I8160P and GT-I8160chn (China).
12 * The GT-I8160 plain is known as the "europe" variant.
13 * The GT-I8160P is the CDMA version and it appears to not use the ST
15 * The GT-I8160ch
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H A Dste-ux500-samsung-kyle.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Devicetree for the Samsung Galaxy Amp SGH-I407 also known as Kyle.
10 /dts-v1/;
11 #include "ste-db8500.dtsi"
12 #include "ste-ab8505.dtsi"
13 #include "ste-dbx5x0-pinctr
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H A Dste-ux500-samsung-codina-tmo.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Devicetree for the Samsung Galaxy Exhibit SGH-T599 also known as Codina-TMO,
4 * the "TMO" shall be read "T-Mobile" as this phone was produced exlusively
5 * for T-Mobile in the United States.
8 * - No CPU speed cap, full ~1GHz rate
9 * - Differen
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H A Dste-ux500-samsung-skomer.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Devicetree for the Samsung XCover 2 GT-S7710 also known as Skomer.
6 /dts-v1/;
7 #include "ste-db8500.dtsi"
8 #include "ste-ab8505.dtsi"
9 #include "ste-dbx5x0-pinctrl.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
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H A Dste-ux500-samsung-golden.dts1 // SPDX-License-Identifier: GPL-2.0-only
2 /dts-v1/;
4 #include "ste-db8500.dtsi"
5 #include "ste-ab8505.dtsi"
6 #include "ste-dbx5x0-pinctrl.dtsi"
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
14 * You need an intermediate, device-tree compatible bootloader
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H A Dste-snowball.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2011 ST-Ericsson AB
6 /dts-v1/;
7 #include "ste-db9500.dtsi"
8 #include "ste-href-ab850
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H A Dste-href-stuib.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2012 ST-Ericsson AB
6 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "gpio-keys";
11 #address-cells = <1>;
12 #size-cells = <0>;
13 vdd-supply = <&ab8500_ldo_aux1_reg>;
14 pinctrl-names = "default";
15 pinctrl-0 = <&prox_stuib_mode>, <&hall_stuib_mode>;
33 stmpe1601: port-expander@40 {
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H A Dste-href-tvk1281618-r2.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/input/input.h>
11 compatible = "gpio-key
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/freebsd/sys/contrib/device-tree/Bindings/arm/
H A Dvexpress-sysreg.txt2 --------------------------------------
9 - compatible value : = "arm,vexpress,sysreg";
10 - reg : physical base address and the size of the registers window
12 Deprecated properties, replaced by GPIO subnodes (see below):
13 - gpio-controller : specifies that the node is a GPIO controller
14 - #gpio-cells : size of the GPIO specifier, should be 2:
15 - first cell is the pseudo-GPIO line number:
16 0 - MMC CARDIN
17 1 - MMC WPROT
18 2 - NOR FLASH WPn
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/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Datmel,at91-pinctrl.txt10 Please refer to pinctrl-bindings.txt in this directory for details of the
15 used for a specific device or function. This node represents both mux and config
17 mode) this pin can work on and the 'config' configures various pad settings
18 such as pull-up, multi drive, etc.
21 - compatible: "atmel,at91rm9200-pinctrl" or "atmel,at91sam9x5-pinctrl"
22 or "atmel,sama5d3-pinctrl" or "microchip,sam9x60-pinctrl"
23 - atmel,mux-mask: array of mask (periph per bank) to describe if a pin can be
45 From the datasheet Table 10-2.
83 - atmel,pins: 4 integers array, represents a group of pins mux and config
84 setting. The format is atmel,pins = <PIN_BANK PIN_BANK_NUM PERIPH CONFIG>.
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H A Dste,nomadik.txt4 - compatible: "stericsson,db8500-pinctrl", "stericsson,db8540-pinctrl",
5 "stericsson,stn8815-pinctrl"
6 - nomadik-gpio-chips: array of phandles to the corresponding GPIO chips
8 - prcm: phandle to the PRCMU managing the back end of this pin controller
10 Please refer to pinctrl-bindings.txt in this directory for details of the
23 (see pinctrl-bindings.txt):
26 - function: A string containing the name of the function to mux to the
28 - groups : An array of strings. Each string contains the name of a pin
30 set-up.
33 - pins: A string array describing the pins affected by the configuration
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H A Dfsl,imx27-pinctrl.txt4 - compatible: "fsl,imx27-iomuxc"
9 - fsl,pins: three integers array, represents a group of pins mux and config
10 setting. The format is fsl,pins = <PIN MUX_ID CONFIG>.
21 0 - Primary function
22 1 - Alternate function
23 2 - GPIO
24 Registers: GIUS (GPIO In Use), GPR (General Purpose Register)
28 0 - Input
29 1 - Output
32 gpio_oconf configures the gpio submodule output signal. This does not
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H A Drockchip,pinctrl.txt6 muxing options with option 0 being the use as a GPIO.
8 Please refer to pinctrl-bindings.txt in this directory for details of the
14 config of the pins in that group. The 'pins' selects the function mode(also
15 named pin mode) this pin can work on and the 'config' configures various pad
16 settings such as pull-up, etc.
19 defined as gpio sub-nodes of the pinmux controller.
22 - compatible: should be
23 "rockchip,px30-pinctrl": for Rockchip PX30
24 "rockchip,rv1108-pinctrl": for Rockchip RV1108
25 "rockchip,rk2928-pinctrl": for Rockchip RK2928
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H A Dsamsung-pinctrl.txt1 Samsung GPIO and Pin Mux/Config controller
3 Samsung's ARM based SoC's integrates a GPIO and Pin mux/config hardware
6 on-chip controllers onto these pads.
9 - compatible: should be one of the following.
10 - "samsung,s3c2412-pinctrl": for S3C2412-compatible pin-controller,
11 - "samsung,s3c2416-pinctrl": for S3C2416-compatible pin-controller,
12 - "samsung,s3c2440-pinctrl": for S3C2440-compatible pin-controller,
13 - "samsung,s3c2450-pinctrl": for S3C2450-compatible pin-controller,
14 - "samsung,s3c64xx-pinctrl": for S3C64xx-compatible pin-controller,
15 - "samsung,s5pv210-pinctrl": for S5PV210-compatible pin-controller,
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/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dadi,adau1701.txt5 - compatible: Should contain "adi,adau1701"
6 - reg: The i2c address. Value depends on the state of ADDR0
11 - reset-gpio: A GPIO spec to define which pin is connected to the
14 - adi,pll-mode-gpios: An array of two GPIO specs to describe the GPIOs
15 the ADAU's PLL config pins are connected to.
19 - adi,pin-config: An array of 12 numerical values selecting one of the
23 - avdd-supply: Power supply for AVDD, providing 3.3V
24 - dvdd-supply: Power supply for DVDD, providing 3.3V
32 reset-gpio = <&gpio 23 0>;
33 avdd-supply = <&vdd_3v3_reg>;
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H A Drt5677.txt7 - compatible : "realtek,rt5677".
9 - reg : The I2C address of the device.
11 - interrupts : The CODEC's interrupt output.
13 - gpio-controller : Indicates this device is a GPIO controller.
15 - #gpio-cells : Should be two. The first cell is the pin number and the
20 - realtek,pow-ldo2-gpio : The GPIO that controls the CODEC's POW_LDO2 pin.
21 - realtek,reset-gpio : The GPIO that controls the CODEC's RESET pin. Active low.
23 - realtek,in1-differential
24 - realtek,in2-differential
25 - realtek,lout1-differential
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H A Dtlv320adcx140.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Texas Instruments TLV320ADCX140 Quad Channel Analog-t
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/freebsd/sys/contrib/device-tree/Bindings/regulator/
H A Dlp872x.txt4 - compatible: "ti,lp8720" or "ti,lp8725"
5 - reg: I2C slave address. 0x7d = LP8720, 0x7a = LP8725
8 - ti,general-config: the value of LP872X_GENERAL_CFG register (u8)
27 - ti,update-config: define it when LP872X_GENERAL_CFG register should be set
28 - ti,dvs-gpio: GPIO specifier for external DVS pin control of LP872x devices.
29 - ti,dvs-vsel: DVS selector. 0 = SEL_V1, 1 = SEL_V2.
30 - ti,dvs-state: initial DVS pin state. 0 = DVS_LOW, 1 = DVS_HIGH.
31 - enable-gpios: GPIO specifier for EN pin control of LP872x devices.
40 - LP8720: https://www.ti.com/lit/ds/symlink/lp8720.pdf
41 - LP8725: https://www.ti.com/lit/ds/symlink/lp8725.pdf
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/freebsd/sys/dev/bhnd/bhndb/
H A Dbhndb_pcireg.h1 /*-
36 * - PCI (cid=0x804, revision <= 12)
43 * [0x1E00+0x0200] fixed pci core siba config registers
47 * - PCI (cid=0x804, revision >= 13)
48 * - PCIE (cid=0x820) with ChipCommon (revision <= 31)
59 * - PCIE (cid=0x820) with ChipCommon (revision >= 32)
70 * - PCIE Gen 2 (cid=0x83c)
82 * [0x0000+0x????] fixed ARM tightly-coupled memory (TCM).
89 * - Mapped GPIO CSRs into the PCI config space. Refer to
93 * - Mapped the clock CSR into the PCI config space. Refer to
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/freebsd/sys/contrib/device-tree/src/mips/cavium-octeon/
H A Docteon_3xxx.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 /dts-v1/;
7 compatible = "cavium,octeon-3860";
8 #address-cells = <2>;
9 #size-cells = <2>;
10 interrupt-parent = <&ciu>;
13 compatible = "simple-bus";
14 #address-cells = <2>;
15 #size-cells = <2>;
18 ciu: interrupt-controller@1070000000000 {
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/freebsd/share/man/man4/
H A Dsnd_hda.41 .\" Copyright (c) 2006-2008 Joel Dahl <joel@FreeBSD.org>
35 .Bd -ragged -offset indent
43 .Bd -literal -offset indent
90 .Ss Boot-time Configuration
91 The following variables are available at boot-time through the
94 .Bl -tag -width ".Va hint.hdac.%d.config"-offset indent
95 .It Va hint.hdac.%d.config
109 .It Va hint.hdac.%d.cad%d.nid%d.config
111 .Va hint.hdaa.%d.nid%d.config
112 .It Va hint.hdaa.%d.config
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