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Searched full:gphy (Results 1 – 22 of 22) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/net/dsa/
H A Dlantiq-gswip.txt28 Required properties for GPHY firmware loading:
29 - compatible : "lantiq,xrx200-gphy-fw", "lantiq,gphy-fw"
30 "lantiq,xrx300-gphy-fw", "lantiq,gphy-fw"
31 "lantiq,xrx330-gphy-fw", "lantiq,gphy-fw"
33 GPHY core of the SoC.
36 The GPHY firmware loader has a list of GPHY entries, one for each
37 embedded GPHY
39 - reg : Offset of the GPHY firmware register in the RCU
41 - resets : list of resets of the embedded GPHY
126 gphy-fw {
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H A Dbrcm,sf2.yaml61 brcm,num-gphy:
153 brcm,num-gphy = <1>;
163 label = "gphy";
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dbrcm,bcm7445-switch-v4.0.txt31 brcm,num-gphy = <1>;
43 label = "gphy";
H A Dbrcm,iproc-mdio.txt20 enet-gphy@0 {
/freebsd/sys/contrib/device-tree/Bindings/gpio/
H A Dgpio-stp-xway.yaml68 The gphy core can control 3 bits of the gpio cascade. In the xRX200 family
/freebsd/sys/contrib/device-tree/Bindings/leds/
H A Dleds-lgm.yaml123 function = "gphy";
/freebsd/sys/dev/alc/
H A Dif_alc.c1091 uint32_t gphy; in alc_phy_down() local
1101 gphy = CSR_READ_4(sc, ALC_GPHY_CFG); in alc_phy_down()
1102 gphy &= ~(GPHY_CFG_EXT_RESET | GPHY_CFG_LED_MODE | in alc_phy_down()
1104 gphy |= GPHY_CFG_HIB_EN | GPHY_CFG_HIB_PULSE | in alc_phy_down()
1106 gphy |= GPHY_CFG_PHY_IDDQ | GPHY_CFG_PWDOWN_HW; in alc_phy_down()
1107 CSR_WRITE_4(sc, ALC_GPHY_CFG, gphy); in alc_phy_down()
1114 * GPHY power down caused more problems on AR8151 v2.0. in alc_phy_down()
1115 * When driver is reloaded after GPHY power down, in alc_phy_down()
2599 uint32_t gphy, mac, master, pmcs, reg; in alc_setwol_816x() local
2607 gphy = CSR_READ_4(sc, ALC_GPHY_CFG); in alc_setwol_816x()
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/freebsd/sys/dev/msk/
H A Dif_mskreg.h333 #define PCI_ASPM_GPHY_LINK_DOWN BIT_14 /* GPHY Link Down (A1 only) */
352 #define PCI_REL_GPHY_REC_PACKET BIT_25 /* GPHY Received Packet */
361 #define PCI_REL_GPHY_LINK_UP BIT_16 /* GPHY Link Up */
364 #define PCI_GAT_GPHY_N_REC_PACKET BIT_9 /* GPHY Not Received Packet */
373 #define PCI_GAT_GPHY_LINK_DOWN BIT_0 /* GPHY Link Down */
741 /* GMAC and GPHY Control Registers (YUKON only) */
743 #define GPHY_CTRL 0x0f04 /* 32 bit GPHY Control Reg */
1700 #define GM_PHY_ADDR 0x0088 /* 16 bit r/w GPHY Address Register */
1903 /* GM_PHY_ADDR 16 bit r/w GPHY Address Register */
2080 /* GPHY_CTRL 32 bit GPHY Control Reg (YUKON only) */
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H A Dif_msk.c1415 /* Reset GPHY/GMAC Control */ in mskc_reset()
1417 /* GPHY Control reset. */ in mskc_reset()
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dlantiq,pinctrl-xway.txt89 spi, usif, cgu, exin, stp, gpt, nmi, pci, ebu, mdio, dfe, gphy
/freebsd/sys/dev/sfxge/common/
H A Defx_port.c189 "GPHY",
H A Defx_nic.c777 LOOPBACK_CHECK(GPHY, GPHY); in efx_loopback_mask()
H A Defx_regs_mcdi.h3379 /* enum: GPhy. */
3495 /* enum: GPhy. */
/freebsd/sys/dev/sk/
H A Dif_skreg.h1062 /* Block 30 -- GMAC/GPHY Control Registers (Yukon Only)*/
1064 #define SK_GPHY_CTRL 0x0f04 /* GPHY Control Register */
1121 #define SK_GPHY_RESET_CLEAR 0x00000002 /* Clear GPHY Reset */
1122 #define SK_GPHY_RESET_SET 0x00000001 /* Set GPHY Reset */
H A Dif_sk.c3269 /* GMAC and GPHY Reset */ in sk_init_yukon()
/freebsd/sys/contrib/device-tree/src/arm64/broadcom/bcm4908/
H A Dbcm4908.dtsi180 brcm,num-gphy = <5>;
/freebsd/sys/contrib/device-tree/src/arm64/broadcom/bcmbca/
H A Dbcm4908.dtsi227 brcm,num-gphy = <5>;
/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3399-kobol-helios64.dts444 gphy_reset: gphy-reset {
/freebsd/sys/dev/bxe/
H A Dbxe_elink.c11198 /* Wait for GPHY to come out of reset */ in elink_848x3_config_init()
11864 /* Drive pin high to bring the GPHY out of reset. */ in elink_54618se_config_init()
11867 /* wait for GPHY to reset */ in elink_54618se_config_init()
11875 /* Wait for GPHY to reset */ in elink_54618se_config_init()
12091 /* In case of no EPIO routed to reset the GPHY, put it in elink_54618se_link_reset()
12105 /* Drive pin low to put GPHY in reset. */ in elink_54618se_link_reset()
/freebsd/sys/dev/bge/
H A Dif_bgereg.h1327 /* CPMU GPHY Strap register */
H A Dif_bge.c4087 * Set GPHY Power Down Override to leave GPHY in bge_reset()
/freebsd/sys/dev/bwn/
H A Dif_bwn.c5918 struct bwn_phy_g *gphy = &phy->phy_g;
5937 tmp = gphy->pg_nrssi_lt[in_rssi]; in bwn_rx_rssi_calc()
5926 struct bwn_phy_g *gphy = &phy->phy_g; bwn_rx_rssi_calc() local