gmii\-to\-sgmii\-2 (full) in projects: freebsd

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Searched +full:gmii +full:- +full:to +full:- +full:sgmii +full:- +full:2 (Results 1 – 22 of 22) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/net/
H A D	altr,gmii-to-sgmii-2.0.yaml	`1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 4 --- 5 $id: http://devicetree.org/schemas/net/altr,gmii-to-sgmii-2.0.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Altera GMII to SGMII Converter 11 - Matthew Gerlach <matthew.gerlach@altera.com> 14 This binding describes the Altera GMII to SGMII converter. 18 const: altr,gmii-to-sgmii-2.0 22 - description: Registers for the emac splitter IP 23 - description: Registers for the GMII to SGMII converter. [all …]`
H A D	altr,socfpga-stmmac.yaml	`1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/net/altr,socfpga-stmmac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Matthew Gerlach <matthew.gerlach@altera.com> 16 # TODO: Determine how to handle the Arria10 reset-name, stmmaceth-ocp, that 24 - altr,socfpga-stmmac 25 - altr,socfpga-stmmac-a10-s10 26 - altr,socfpga-stmmac-agilex5 29 - compatible [all …]`
H A D	microchip,lan966x-switch.yaml	1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/net/microchip,lan966x-switch.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Horatiu Vultur <horatiu.vultur@microchip.com> 13 The lan966x switch is a multi-port Gigabit AVB/TSN Ethernet Switch with 14 two integrated 10/100/1000Base-T PHYs. In addition to the integrated PHYs, 15 it supports up to 2RGMII/RMII, up to 3BASE-X/SERDES/2.5GBASE-X and up to 16 2 Quad-SGMII/Quad-USGMII interfaces. 20 pattern: "^switch@[0-9a-f]+$" [all …]
H A D	xlnx,axi-ethernet.yaml	`1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/xlnx,axi-ethernet.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 provides connectivity to an external ethernet PHY supporting different 12 interfaces: MII, GMII, RGMII, SGMII, 1000BaseX. It also includes two 22 - Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> 27 - xlnx,axi-ethernet-1.00.a 28 - xlnx,axi-ethernet-1.01.a 29 - xlnx,axi-ethernet-2.01.a [all …]`
H A D	ti,dp83867.yaml	1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - $ref: ethernet-controller.yaml# 14 - Andrew Davis <afd@ti.com> 18 transceiver with integrated PMD sublayers to support 10BASE-Te, 100BASE-TX 19 and 1000BASE-T Ethernet protocols. 22 LANs. It interfaces directly to twisted pair media via an external 23 transformer. This device interfaces directly to the MAC layer through the 25 Media Independent Interface (GMII) or Reduced GMII (RGMII). [all …]
H A D	xilinx_axienet.txt	2 -------------------------------------------------------- 5 provides connectivity to an external ethernet PHY supporting different 6 interfaces: MII, GMII, RGMII, SGMII, 1000BaseX. It also includes two 18 - compatible : Must be one of "xlnx,axi-ethernet-1.00.a", 19 "xlnx,axi-ethernet-1.01.a", "xlnx,axi-ethernet-2.01.a" 20 - reg : Address and length of the IO space, as well as the address 22 axistream-connected is specified, in which case the reg 24 - interrupts : Should be a list of 2 or 3 interrupts: TX DMA, RX DMA, 25 and optionally Ethernet core. If axistream-connected is 29 - phy-handle : Should point to the external phy device if exists. Pointing [all …]
H A D	ti,dp83869.yaml	1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - $ref: ethernet-phy.yaml# 14 - Andrew Davis <afd@ti.com> 17 The DP83869HM device is a robust, fully-featured Gigabit (PHY) transceiver 18 with integrated PMD sublayers that supports 10BASE-Te, 100BASE-TX and 19 1000BASE-T Ethernet protocols. The DP83869 also supports 1000BASE-X and 20 100BASE-FX Fiber protocols. 21 This device interfaces to the MAC layer through Reduced GMII (RGMII) and [all …]
H A D	marvell,pp2.yaml	`1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Marcin Wojtas <mw@semihalf.com> 11 - Russell King <linux@armlinux.org> 15 Marvell Armada 7K/8K Ethernet Controller (PPv2.2) 21 - marvell,armada-375-pp2 22 - marvell,armada-7k-pp22 28 "#address-cells": 31 "#size-cells": [all …]`
H A D	ibm,emac.txt	4 the Axon bridge. To operate this needs to interact with a this 6 interface. In addition to the nodes and properties described 8 correct clock-frequency property. 13 - device_type : "network" 15 - compatible : compatible list, contains 2 entries, first is 16 "ibm,emac-CHIP" where CHIP is the host ASIC (440gx, 18 "ibm,emac4". For Axon, thus, we have: "ibm,emac-axon", 20 - interrupts : <interrupt mapping for EMAC IRQ and WOL IRQ> 21 - reg : <registers mapping> 22 - local-mac-address : 6 bytes, MAC address [all …]
H A D	ethernet-controller.yaml	`1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/net/ethernet-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - David S. Miller <davem@davemloft.net> 19 max-speed: 24 nvmem-cells: 27 Reference to an nvmem node for the MAC address 29 nvmem-cell-names: 30 const: mac-address [all …]`
H A D	snps,dwmac.yaml	`1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Alexandre Torgue <alexandre.torgue@foss.st.com> 11 - Giuseppe Cavallaro <peppe.cavallaro@st.com> 12 - Jose Abreu <joabreu@synopsys.com> 15 # will be able to report a warning when we have that compatible, since 16 # we will validate the node thanks to the select, but won't report it 23 - snps,dwmac 24 - snps,dwmac-3.40a [all …]`
/freebsd/sys/contrib/ncsw/inc/flib/
H A D	fsl_enet.h	2 * Copyright 2008-2012 Freescale Semiconductor Inc. 12 * names of its contributors may be used to endorse or promote products 18 * Foundation, either version 2 of that License or (at your option) any 22 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 37 @Description Ethernet MAC-PHY Interface 44 E_ENET_IF_GMII = 0x00040000, /*< GMII interface / 48 E_ENET_IF_SGMII = 0x00080000, /*< SGMII interface / 72 @Description Enum for inter-module interrupts registration 168 /*< dTSEC Time-Stamp Receive Error / [all …]
/freebsd/sys/contrib/ncsw/inc/
H A D	enet_ext.h	1 /* Copyright (c) 2008-2012 Freescale Semiconductor, Inc 12 * names of its contributors may be used to endorse or promote products 18 * Foundation, either version 2 of that License or (at your option) any 22 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 45 #define ENET_NUM_OCTETS_PER_ADDRESS 6 /< Number of octets (8-bit bytes) in an ethernet addres… 65 @Description Ethernet MAC-PHY Interface 72 e_ENET_IF_GMII = E_ENET_IF_GMII, /< GMII interface / 76 e_ENET_IF_SGMII = E_ENET_IF_SGMII, /< SGMII interface / 82 #define ENET_IF_SGMII_BASEX 0x80000000 /**< SGMII/QSGII interface with 1000BaseX [all …]
/freebsd/sys/dev/sfxge/common/
H A D	efx_port.c	1 /- 2 SPDX-License-Identifier: BSD-2-Clause 4 * Copyright (c) 2009-2016 Solarflare Communications Inc. 12 * 2. Redistributions in binary form must reproduce the above copyright notice, 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 21 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 41 efx_port_t epp = &(enp->en_port); in efx_port_init() 42 const efx_phy_ops_t epop = epp->ep_epop; in efx_port_init() 45 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); in efx_port_init() 46 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE); in efx_port_init() [all …]
H A D	efx_nic.c	1 /- 2 SPDX-License-Identifier: BSD-2-Clause 4 * Copyright (c) 2007-2016 Solarflare Communications Inc. 12 * 2. Redistributions in binary form must reproduce the above copyright notice, 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 21 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 50 * manftest must be able to cope with this device id. in efx_family() 63 * manftest must be able to cope with this device id. in efx_family() 82 * manftest must be able to cope with this device id. in efx_family() 99 * manftest must be able to cope with this device id. in efx_family() [all …]
H A D	efx_regs_mcdi.h	1 /- 2 SPDX-License-Identifier: BSD-2-Clause 4 * Copyright 2008-2013 Solarflare Communications Inc. All rights reserved. 11 * 2. Redistributions in binary form must reproduce the above copyright 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 /* Values to be written into FMCR_CZ_RESET_STATE_REG to control boot. / 32 / Power-on reset state / 35 possible to jump into IMEM without loading code from flash. */ 36 #define MC_FW_WARM_BOOT_OK (2) [all …]
/freebsd/sys/contrib/alpine-hal/eth/
H A D	al_hal_eth_mac_regs.h	`1 /- 10 found at http://www.gnu.org/licenses/gpl-2.0.html 25 ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 29 (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 58 uint32_t reserved1[2]; 365 uint32_t phy_id[2]; 387 uint32_t rsrvd_0[2]; 416 / [0x44] MDIO control register for MDIO interface 2 / 418 / [0x48] MDIO information register for MDIO interface 2 / 420 / [0x4c] XGMII 32 to 64 data FIFO control */ [all …]`
/freebsd/sys/contrib/device-tree/Bindings/net/dsa/
H A D	mediatek,mt7530.yaml	`1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Arınç ÜNAL <arinc.unal@arinc9.com> 11 - Landen Chao <Landen.Chao@mediatek.com> 12 - DENG Qingfang <dqfext@gmail.com> 13 - Sean Wang <sean.wang@mediatek.com> 14 - Daniel Golle <daniel@makrotopia.org> 17 There are three versions of MT7530, standalone, in a multi-chip module and 18 built-into a SoC. [all …]`
/freebsd/sys/dev/mii/
H A D	mii_fdt.c	1 /- 12 2. Redistributions in binary form must reproduce the above copyright 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 52 * Table to translate MII_CONTYPE_xxxx constants to/from devicetree strings. 53 * We explicitly associate the enum values with the strings in a table to avoid 55 * and to avoid problems if the enum gains new types that aren't in the FDT 65 {MII_CONTYPE_GMII, "gmii"}, 66 {MII_CONTYPE_SGMII, "sgmii"}, 69 {MII_CONTYPE_REVMII, "rev-mii"}, [all …]
/freebsd/sys/dev/dpaa2/
H A D	dpaa2_mac.c	`1 /- 2 SPDX-License-Identifier: BSD-2-Clause 4 * Copyright © 2021-2022 Dmitry Salychev 11 * 2. Redistributions in binary form must reproduce the above copyright 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 78 * NOTE: MC command portals (MCPs) are used to send commands to, and 84 /* --- / 86 / --- / 94 / Subroutines to get text representation. */ [all …]`
/freebsd/sys/dev/bxe/
H A D	bxe_elink.c	1 /- 2 SPDX-License-Identifier: BSD-2-Clause 4 * Copyright (c) 2007-2017 QLogic Corporation. All rights reserved. 12 * 2. Redistributions in binary form must reproduce the above copyright 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 434 #define MDIO_PCS_REG_7101_SPI_FIFO_ADDR_PAGE_PROGRAM_CMD (2) 501 /* These pins configure the BCM84823 interface to MAC after reset. / 504 / These pins configure the BCM84823 interface to Line after reset. / 508 / When this pin is active high during reset, 10GBASE-T core is power [all …]
/freebsd/sys/dev/qlnx/qlnxe/
H A D	reg_addr.h	2 * Copyright (c) 2017-2018 Cavium, Inc. 11 * 2. Redistributions in binary form must reproduce the above copyright 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 … (0x1<<0) // Signals an unknown address to the rf module. 43 … (0x1<<0) // Signals an unknown address to the rf module. 48 … (0x1<<0) // Signals an unknown address to the rf module. 53 … 0x001d14UL //Access:RW DataWidth:0x8 // DBMUX register for selecting a line to output 54 … line) in the selected line (before shift).for selecting a line to output 78 …- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl… [all …]